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15637ed4 RG |
1 | /* Common subexpression elimination for GNU compiler. |
2 | Copyright (C) 1987, 1988, 1989 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 1, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | #include "config.h" | |
22 | #include "rtl.h" | |
23 | #include "regs.h" | |
24 | #include "hard-reg-set.h" | |
25 | #include "flags.h" | |
26 | #include "real.h" | |
27 | ||
28 | #include <setjmp.h> | |
29 | ||
30 | /* The basic idea of common subexpression elimination is to go | |
31 | through the code, keeping a record of expressions that would | |
32 | have the same value at the current scan point, and replacing | |
33 | expressions encountered with the cheapest equivalent expression. | |
34 | ||
35 | It is too complicated to keep track of the different possibilities | |
36 | when control paths merge; so, at each label, we forget all that is | |
37 | known and start fresh. This can be described as processing each | |
38 | basic block separately. Note, however, that these are not quite | |
39 | the same as the basic blocks found by a later pass and used for | |
40 | data flow analysis and register packing. We do not need to start fresh | |
41 | after a conditional jump instruction if there is no label there. | |
42 | ||
43 | We use two data structures to record the equivalent expressions: | |
44 | a hash table for most expressions, and several vectors together | |
45 | with "quantity numbers" to record equivalent (pseudo) registers. | |
46 | ||
47 | The use of the special data structure for registers is desirable | |
48 | because it is faster. It is possible because registers references | |
49 | contain a fairly small number, the register number, taken from | |
50 | a contiguously allocated series, and two register references are | |
51 | identical if they have the same number. General expressions | |
52 | do not have any such thing, so the only way to retrieve the | |
53 | information recorded on an expression other than a register | |
54 | is to keep it in a hash table. | |
55 | ||
56 | Registers and "quantity numbers": | |
57 | ||
58 | At the start of each basic block, all of the (hardware and pseudo) | |
59 | registers used in the function are given distinct quantity | |
60 | numbers to indicate their contents. During scan, when the code | |
61 | copies one register into another, we copy the quantity number. | |
62 | When a register is loaded in any other way, we allocate a new | |
63 | quantity number to describe the value generated by this operation. | |
64 | `reg_qty' records what quantity a register is currently thought | |
65 | of as containing. | |
66 | ||
67 | We also maintain a bidirectional chain of registers for each | |
68 | quantity number. `qty_first_reg', `qty_last_reg', | |
69 | `reg_next_eqv' and `reg_prev_eqv' hold these chains. | |
70 | ||
71 | The first register in a chain is the one whose lifespan is least local. | |
72 | Among equals, it is the one that was seen first. | |
73 | We replace any equivalent register with that one. | |
74 | ||
75 | Constants and quantity numbers | |
76 | ||
77 | When a quantity has a known constant value, that value is stored | |
78 | in the appropriate element of qty_const. This is in addition to | |
79 | putting the constant in the hash table as is usual for non-regs. | |
80 | ||
81 | Regs are preferred to constants as they are to everything else, | |
82 | but expressions containing constants can be simplified, by fold_rtx. | |
83 | ||
84 | When a quantity has a known nearly constant value (such as an address | |
85 | of a stack slot), that value is stored in the appropriate element | |
86 | of qty_const. | |
87 | ||
88 | Integer constants don't have a machine mode. However, cse | |
89 | determines the intended machine mode from the destination | |
90 | of the instruction that moves the constant. The machine mode | |
91 | is recorded in the hash table along with the actual RTL | |
92 | constant expression so that different modes are kept separate. | |
93 | ||
94 | Other expressions: | |
95 | ||
96 | To record known equivalences among expressions in general | |
97 | we use a hash table called `table'. It has a fixed number of buckets | |
98 | that contain chains of `struct table_elt' elements for expressions. | |
99 | These chains connect the elements whose expressions have the same | |
100 | hash codes. | |
101 | ||
102 | Other chains through the same elements connect the elements which | |
103 | currently have equivalent values. | |
104 | ||
105 | Register references in an expression are canonicalized before hashing | |
106 | the expression. This is done using `reg_qty' and `qty_first_reg'. | |
107 | The hash code of a register reference is computed using the quantity | |
108 | number, not the register number. | |
109 | ||
110 | When the value of an expression changes, it is necessary to remove from the | |
111 | hash table not just that expression but all expressions whose values | |
112 | could be different as a result. | |
113 | ||
114 | 1. If the value changing is in memory, except in special cases | |
115 | ANYTHING referring to memory could be changed. That is because | |
116 | nobody knows where a pointer does not point. | |
117 | The function `invalidate_memory' removes what is necessary. | |
118 | ||
119 | The special cases are when the address is constant or is | |
120 | a constant plus a fixed register such as the frame pointer | |
121 | or a static chain pointer. When such addresses are stored in, | |
122 | we can tell exactly which other such addresses must be invalidated | |
123 | due to overlap. `invalidate' does this. | |
124 | All expressions that refer to non-constant | |
125 | memory addresses are also invalidated. `invalidate_memory' does this. | |
126 | ||
127 | 2. If the value changing is a register, all expressions | |
128 | containing references to that register, and only those, | |
129 | must be removed. | |
130 | ||
131 | Because searching the entire hash table for expressions that contain | |
132 | a register is very slow, we try to figure out when it isn't necessary. | |
133 | Precisely, this is necessary only when expressions have been | |
134 | entered in the hash table using this register, and then the value has | |
135 | changed, and then another expression wants to be added to refer to | |
136 | the register's new value. This sequence of circumstances is rare | |
137 | within any one basic block. | |
138 | ||
139 | The vectors `reg_tick' and `reg_in_table' are used to detect this case. | |
140 | reg_tick[i] is incremented whenever a value is stored in register i. | |
141 | reg_in_table[i] holds -1 if no references to register i have been | |
142 | entered in the table; otherwise, it contains the value reg_tick[i] had | |
143 | when the references were entered. If we want to enter a reference | |
144 | and reg_in_table[i] != reg_tick[i], we must scan and remove old references. | |
145 | Until we want to enter a new entry, the mere fact that the two vectors | |
146 | don't match makes the entries be ignored if anyone tries to match them. | |
147 | ||
148 | Registers themselves are entered in the hash table as well as in | |
149 | the equivalent-register chains. However, the vectors `reg_tick' | |
150 | and `reg_in_table' do not apply to expressions which are simple | |
151 | register references. These expressions are removed from the table | |
152 | immediately when they become invalid, and this can be done even if | |
153 | we do not immediately search for all the expressions that refer to | |
154 | the register. | |
155 | ||
156 | A CLOBBER rtx in an instruction invalidates its operand for further | |
157 | reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK | |
158 | invalidates everything that resides in memory. | |
159 | ||
160 | Related expressions: | |
161 | ||
162 | Constant expressions that differ only by an additive integer | |
163 | are called related. When a constant expression is put in | |
164 | the table, the related expression with no constant term | |
165 | is also entered. These are made to point at each other | |
166 | so that it is possible to find out if there exists any | |
167 | register equivalent to an expression related to a given expression. */ | |
168 | ||
169 | /* One plus largest register number used in this function. */ | |
170 | ||
171 | static int max_reg; | |
172 | ||
173 | /* Length of vectors indexed by quantity number. | |
174 | We know in advance we will not need a quantity number this big. */ | |
175 | ||
176 | static int max_qty; | |
177 | ||
178 | /* Next quantity number to be allocated. | |
179 | This is 1 + the largest number needed so far. */ | |
180 | ||
181 | static int next_qty; | |
182 | ||
183 | /* Indexed by quantity number, gives the first (or last) (pseudo) register | |
184 | in the chain of registers that currently contain this quantity. */ | |
185 | ||
186 | static int *qty_first_reg; | |
187 | static int *qty_last_reg; | |
188 | ||
189 | /* Indexed by quantity number, gives the rtx of the constant value of the | |
190 | quantity, or zero if it does not have a known value. | |
191 | A sum of the frame pointer (or arg pointer) plus a constant | |
192 | can also be entered here. */ | |
193 | ||
194 | static rtx *qty_const; | |
195 | ||
196 | /* Indexed by qty number, gives the insn that stored the constant value | |
197 | recorded in `qty_const'. */ | |
198 | ||
199 | static rtx *qty_const_insn; | |
200 | ||
201 | /* Value stored in CC0 by previous insn: | |
202 | 0 if previous insn didn't store in CC0. | |
203 | else 0100 + (M&7)<<3 + (N&7) | |
204 | where M is 1, 0 or -1 if result was >, == or < as signed number | |
205 | and N is 1, 0 or -1 if result was >, == or < as unsigned number. | |
206 | 0200 bit may also be set, meaning that only == and != comparisons | |
207 | have known results. */ | |
208 | ||
209 | static int prev_insn_cc0; | |
210 | ||
211 | /* For machines where CC0 is one bit, we may see CC0 assigned a | |
212 | constant value (after fold_rtx). | |
213 | Record here the value stored in the previous insn (0 if none). */ | |
214 | ||
215 | static rtx prev_insn_explicit_cc0; | |
216 | ||
217 | /* Previous actual insn. 0 if at first insn of basic block. */ | |
218 | ||
219 | static rtx prev_insn; | |
220 | ||
221 | /* Insn being scanned. */ | |
222 | ||
223 | static rtx this_insn; | |
224 | ||
225 | /* Index by (pseudo) register number, gives the quantity number | |
226 | of the register's current contents. */ | |
227 | ||
228 | static int *reg_qty; | |
229 | ||
230 | /* Index by (pseudo) register number, gives the number of the next | |
231 | (pseudo) register in the chain of registers sharing the same value. | |
232 | Or -1 if this register is at the end of the chain. */ | |
233 | ||
234 | static int *reg_next_eqv; | |
235 | ||
236 | /* Index by (pseudo) register number, gives the number of the previous | |
237 | (pseudo) register in the chain of registers sharing the same value. | |
238 | Or -1 if this register is at the beginning of the chain. */ | |
239 | ||
240 | static int *reg_prev_eqv; | |
241 | ||
242 | /* Index by (pseudo) register number, gives the latest rtx | |
243 | to use to insert a ref to that register. */ | |
244 | ||
245 | static rtx *reg_rtx; | |
246 | ||
247 | /* Index by (pseudo) register number, gives the number of times | |
248 | that register has been altered in the current basic block. */ | |
249 | ||
250 | static int *reg_tick; | |
251 | ||
252 | /* Index by (pseudo) register number, gives the reg_tick value at which | |
253 | rtx's containing this register are valid in the hash table. | |
254 | If this does not equal the current reg_tick value, such expressions | |
255 | existing in the hash table are invalid. | |
256 | If this is -1, no expressions containing this register have been | |
257 | entered in the table. */ | |
258 | ||
259 | static int *reg_in_table; | |
260 | ||
261 | /* Two vectors of max_reg ints: | |
262 | one containing all -1's; in the other, element i contains i. | |
263 | These are used to initialize various other vectors fast. */ | |
264 | ||
265 | static int *all_minus_one; | |
266 | static int *consec_ints; | |
267 | ||
268 | /* Set nonzero in cse_insn to tell cse_basic_block to skip immediately | |
269 | to the next basic block and treat it as a continuation of this one. */ | |
270 | ||
271 | static int cse_skip_to_next_block; | |
272 | ||
273 | /* CUID of insn that starts the basic block currently being cse-processed. */ | |
274 | ||
275 | static int cse_basic_block_start; | |
276 | ||
277 | /* CUID of insn that ends the basic block currently being cse-processed. */ | |
278 | ||
279 | static int cse_basic_block_end; | |
280 | ||
281 | /* Vector mapping INSN_UIDs to cuids. | |
282 | The cuids are like uids but increase monononically always. | |
283 | We use them to see whether a reg is used outside a given basic block. */ | |
284 | ||
285 | static short *uid_cuid; | |
286 | ||
287 | /* Get the cuid of an insn. */ | |
288 | ||
289 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) | |
290 | ||
291 | /* Nonzero if cse has altered conditional jump insns | |
292 | in such a way that jump optimization should be redone. */ | |
293 | ||
294 | static int cse_jumps_altered; | |
295 | ||
296 | /* canon_hash stores 1 in do_not_record | |
297 | if it notices a reference to CC0, CC1 or PC. */ | |
298 | ||
299 | static int do_not_record; | |
300 | ||
301 | /* canon_hash stores 1 in hash_arg_in_memory | |
302 | if it notices a reference to memory within the expression being hashed. */ | |
303 | ||
304 | static int hash_arg_in_memory; | |
305 | ||
306 | /* canon_hash stores 1 in hash_arg_in_struct | |
307 | if it notices a reference to memory that's part of a structure. */ | |
308 | ||
309 | static int hash_arg_in_struct; | |
310 | ||
311 | /* The hash table contains buckets which are chains of `struct table_elt's, | |
312 | each recording one expression's information. | |
313 | That expression is in the `exp' field. | |
314 | ||
315 | Those elements with the same hash code are chained in both directions | |
316 | through the `next_same_hash' and `prev_same_hash' fields. | |
317 | ||
318 | Each set of expressions with equivalent values | |
319 | are on a two-way chain through the `next_same_value' | |
320 | and `prev_same_value' fields, and all point with | |
321 | the `first_same_value' field at the first element in | |
322 | that chain. The chain is in order of increasing cost. | |
323 | Each element's cost value is in its `cost' field. | |
324 | ||
325 | The `in_memory' field is nonzero for elements that | |
326 | involve any reference to memory. These elements are removed | |
327 | whenever a write is done to an unidentified location in memory. | |
328 | To be safe, we assume that a memory address is unidentified unless | |
329 | the address is either a symbol constant or a constant plus | |
330 | the frame pointer or argument pointer. | |
331 | ||
332 | The `in_struct' field is nonzero for elements that | |
333 | involve any reference to memory inside a structure or array. | |
334 | ||
335 | The `equivalence_only' field means that this expression came from a | |
336 | REG_EQUIV or REG_EQUAL note; it is not valid for substitution into an insn. | |
337 | ||
338 | The `related_value' field is used to connect related expressions | |
339 | (that differ by adding an integer). | |
340 | The related expressions are chained in a circular fashion. | |
341 | `related_value' is zero for expressions for which this | |
342 | chain is not useful. | |
343 | ||
344 | The `mode' field is usually the same as GET_MODE (`exp'), but | |
345 | if `exp' is a CONST_INT and has no machine mode then the `mode' | |
346 | field is the mode it was being used as. Each constant is | |
347 | recorded separately for each mode it is used with. */ | |
348 | ||
349 | ||
350 | struct table_elt | |
351 | { | |
352 | rtx exp; | |
353 | struct table_elt *next_same_hash; | |
354 | struct table_elt *prev_same_hash; | |
355 | struct table_elt *next_same_value; | |
356 | struct table_elt *prev_same_value; | |
357 | struct table_elt *first_same_value; | |
358 | struct table_elt *related_value; | |
359 | int cost; | |
360 | enum machine_mode mode; | |
361 | char in_memory; | |
362 | char in_struct; | |
363 | char equivalence_only; | |
364 | }; | |
365 | ||
366 | #define HASH(x, m) (canon_hash (x, m) % NBUCKETS) | |
367 | /* We don't want a lot of buckets, because we rarely have very many | |
368 | things stored in the hash table, and a lot of buckets slows | |
369 | down a lot of loops that happen frequently. */ | |
370 | #define NBUCKETS 31 | |
371 | ||
372 | static struct table_elt *table[NBUCKETS]; | |
373 | ||
374 | /* Chain of `struct table_elt's made so far for this function | |
375 | but currently removed from the table. */ | |
376 | ||
377 | static struct table_elt *free_element_chain; | |
378 | ||
379 | /* Number of `struct table_elt' structures made so far for this function. */ | |
380 | ||
381 | static int n_elements_made; | |
382 | ||
383 | /* Maximum value `n_elements_made' has had so far in this compilation | |
384 | for functions previously processed. */ | |
385 | ||
386 | static int max_elements_made; | |
387 | ||
388 | /* Bits describing what kind of values in memory must be invalidated | |
389 | for a particular instruction. If all three bits are zero, | |
390 | no memory refs need to be invalidated. Each bit is more powerful | |
391 | than the preceding ones, and if a bit is set then the preceding | |
392 | bits are also set. | |
393 | ||
394 | Here is how the bits are set. | |
395 | Writing at a fixed address invalidates only variable addresses, | |
396 | writing in a structure element at variable address | |
397 | invalidates all but scalar variables, | |
398 | and writing in anything else at variable address invalidates everything. */ | |
399 | ||
400 | struct write_data | |
401 | { | |
402 | int var : 1; /* Invalidate variable addresses. */ | |
403 | int nonscalar : 1; /* Invalidate all but scalar variables. */ | |
404 | int all : 1; /* Invalidate all memory refs. */ | |
405 | }; | |
406 | ||
407 | /* Nonzero if X has the form (PLUS frame-pointer integer). */ | |
408 | ||
409 | #define FIXED_BASE_PLUS_P(X) \ | |
410 | (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
411 | && (XEXP (X, 0) == frame_pointer_rtx || XEXP (X, 0) == arg_pointer_rtx)) | |
412 | ||
413 | static struct table_elt *lookup (); | |
414 | static void free_element (); | |
415 | ||
416 | static void remove_invalid_refs (); | |
417 | static int exp_equiv_p (); | |
418 | int refers_to_p (); | |
419 | int refers_to_mem_p (); | |
420 | static void invalidate_from_clobbers (); | |
421 | static int safe_hash (); | |
422 | static int canon_hash (); | |
423 | static rtx equiv_constant (); | |
424 | static int get_integer_term (); | |
425 | static rtx get_related_value (); | |
426 | static void note_mem_written (); | |
427 | static int cse_rtx_addr_varies_p (); | |
428 | static int fold_cc0 (); | |
429 | \f | |
430 | /* Return an estimate of the cost of computing rtx X. | |
431 | The only use of this is to compare the costs of two expressions | |
432 | to decide whether to replace one with the other. */ | |
433 | ||
434 | static int | |
435 | rtx_cost (x) | |
436 | rtx x; | |
437 | { | |
438 | register int i, j; | |
439 | register enum rtx_code code; | |
440 | register char *fmt; | |
441 | register int total; | |
442 | ||
443 | if (x == 0) | |
444 | return 0; | |
445 | ||
446 | code = GET_CODE (x); | |
447 | switch (code) | |
448 | { | |
449 | case REG: | |
450 | return 1; | |
451 | case SUBREG: | |
452 | return 2; | |
453 | CONST_COSTS (x, code); | |
454 | } | |
455 | ||
456 | total = 2; | |
457 | if (code == MEM) | |
458 | total = 2 * GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD; | |
459 | ||
460 | /* Sum the costs of the sub-rtx's, plus 2 just put in. */ | |
461 | ||
462 | fmt = GET_RTX_FORMAT (code); | |
463 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
464 | if (fmt[i] == 'e') | |
465 | total += rtx_cost (XEXP (x, i)); | |
466 | else if (fmt[i] == 'E') | |
467 | for (j = 0; j < XVECLEN (x, i); j++) | |
468 | total += rtx_cost (XVECEXP (x, i, j)); | |
469 | ||
470 | return total; | |
471 | } | |
472 | \f | |
473 | /* Clear the hash table and initialize each register with its own quantity, | |
474 | for a new basic block. */ | |
475 | ||
476 | static void | |
477 | new_basic_block () | |
478 | { | |
479 | register int i; | |
480 | register int vecsize = max_reg * sizeof (rtx); | |
481 | next_qty = max_reg; | |
482 | ||
483 | bzero (reg_rtx, vecsize); | |
484 | bzero (reg_tick, vecsize); | |
485 | ||
486 | bcopy (all_minus_one, reg_in_table, vecsize); | |
487 | bcopy (all_minus_one, reg_next_eqv, vecsize); | |
488 | bcopy (all_minus_one, reg_prev_eqv, vecsize); | |
489 | bcopy (consec_ints, reg_qty, vecsize); | |
490 | ||
491 | for (i = 0; i < max_qty; i++) | |
492 | { | |
493 | qty_first_reg[i] = i; | |
494 | qty_last_reg[i] = i; | |
495 | qty_const[i] = 0; | |
496 | qty_const_insn[i] = 0; | |
497 | } | |
498 | ||
499 | for (i = 0; i < NBUCKETS; i++) | |
500 | { | |
501 | register struct table_elt *this, *next; | |
502 | for (this = table[i]; this; this = next) | |
503 | { | |
504 | next = this->next_same_hash; | |
505 | free_element (this); | |
506 | } | |
507 | } | |
508 | ||
509 | bzero (table, sizeof table); | |
510 | ||
511 | prev_insn_cc0 = 0; | |
512 | prev_insn_explicit_cc0 = 0; | |
513 | prev_insn = 0; | |
514 | } | |
515 | ||
516 | /* Say that register REG contains a quantity not in any register before. */ | |
517 | ||
518 | static void | |
519 | make_new_qty (reg) | |
520 | register int reg; | |
521 | { | |
522 | register int q; | |
523 | ||
524 | q = reg_qty[reg] = next_qty++; | |
525 | qty_first_reg[q] = reg; | |
526 | qty_last_reg[q] = reg; | |
527 | } | |
528 | ||
529 | /* Make reg NEW equivalent to reg OLD. | |
530 | OLD is not changing; NEW is. */ | |
531 | ||
532 | static void | |
533 | make_regs_eqv (new, old) | |
534 | register int new, old; | |
535 | { | |
536 | register int lastr, firstr; | |
537 | register int q = reg_qty[old]; | |
538 | ||
539 | /* Nothing should become eqv until it has a "non-invalid" qty number. */ | |
540 | if (q == old) | |
541 | abort (); | |
542 | ||
543 | reg_qty[new] = q; | |
544 | firstr = qty_first_reg[q]; | |
545 | lastr = qty_last_reg[q]; | |
546 | ||
547 | /* Prefer pseudo regs to hard regs with the same value. | |
548 | Among pseudos, if NEW will live longer than any other reg of the same qty, | |
549 | and that is beyond the current basic block, | |
550 | make it the new canonical replacement for this qty. */ | |
551 | if (new >= FIRST_PSEUDO_REGISTER | |
552 | && (firstr < FIRST_PSEUDO_REGISTER | |
553 | || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end | |
554 | || uid_cuid[regno_first_uid[new]] < cse_basic_block_start) | |
555 | && (uid_cuid[regno_last_uid[new]] | |
556 | > uid_cuid[regno_last_uid[firstr]])))) | |
557 | { | |
558 | reg_prev_eqv[firstr] = new; | |
559 | reg_next_eqv[new] = firstr; | |
560 | reg_prev_eqv[new] = -1; | |
561 | qty_first_reg[q] = new; | |
562 | } | |
563 | else | |
564 | { | |
565 | /* If NEW is a hard reg, insert at end. | |
566 | Otherwise, insert before any hard regs that are at the end. */ | |
567 | while (lastr < FIRST_PSEUDO_REGISTER && new >= FIRST_PSEUDO_REGISTER) | |
568 | lastr = reg_prev_eqv[lastr]; | |
569 | reg_next_eqv[new] = reg_next_eqv[lastr]; | |
570 | if (reg_next_eqv[lastr] >= 0) | |
571 | reg_prev_eqv[reg_next_eqv[lastr]] = new; | |
572 | else | |
573 | qty_last_reg[q] = new; | |
574 | reg_next_eqv[lastr] = new; | |
575 | reg_prev_eqv[new] = lastr; | |
576 | } | |
577 | } | |
578 | ||
579 | /* Discard the records of what is in register REG. */ | |
580 | ||
581 | static void | |
582 | reg_invalidate (reg) | |
583 | register int reg; | |
584 | { | |
585 | register int n = reg_next_eqv[reg]; | |
586 | register int p = reg_prev_eqv[reg]; | |
587 | register int q = reg_qty[reg]; | |
588 | ||
589 | reg_tick[reg]++; | |
590 | ||
591 | if (q == reg) | |
592 | { | |
593 | /* Save time if already invalid */ | |
594 | /* It shouldn't be linked to anything if it's invalid. */ | |
595 | if (reg_prev_eqv[q] != -1) | |
596 | abort (); | |
597 | if (reg_next_eqv[q] != -1) | |
598 | abort (); | |
599 | return; | |
600 | } | |
601 | ||
602 | if (n != -1) | |
603 | reg_prev_eqv[n] = p; | |
604 | else | |
605 | qty_last_reg[q] = p; | |
606 | if (p != -1) | |
607 | reg_next_eqv[p] = n; | |
608 | else | |
609 | qty_first_reg[q] = n; | |
610 | ||
611 | reg_qty[reg] = reg; | |
612 | qty_first_reg[reg] = reg; | |
613 | qty_last_reg[reg] = reg; | |
614 | reg_next_eqv[reg] = -1; | |
615 | reg_prev_eqv[reg] = -1; | |
616 | } | |
617 | ||
618 | /* Remove any invalid expressions from the hash table | |
619 | that refer to any of the registers contained in expression X. | |
620 | ||
621 | Make sure that newly inserted references to those registers | |
622 | as subexpressions will be considered valid. | |
623 | ||
624 | mention_regs is not called when a register itself | |
625 | is being stored in the table. */ | |
626 | ||
627 | static void | |
628 | mention_regs (x) | |
629 | rtx x; | |
630 | { | |
631 | register enum rtx_code code; | |
632 | register int i, j; | |
633 | register char *fmt; | |
634 | ||
635 | if (x == 0) | |
636 | return; | |
637 | ||
638 | code = GET_CODE (x); | |
639 | if (code == REG) | |
640 | { | |
641 | register int regno = REGNO (x); | |
642 | reg_rtx[regno] = x; | |
643 | ||
644 | if (reg_in_table[regno] >= 0 && reg_in_table[regno] != reg_tick[regno]) | |
645 | remove_invalid_refs (regno); | |
646 | ||
647 | reg_in_table[regno] = reg_tick[regno]; | |
648 | ||
649 | return; | |
650 | } | |
651 | ||
652 | fmt = GET_RTX_FORMAT (code); | |
653 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
654 | if (fmt[i] == 'e') | |
655 | mention_regs (XEXP (x, i)); | |
656 | else if (fmt[i] == 'E') | |
657 | for (j = 0; j < XVECLEN (x, i); j++) | |
658 | mention_regs (XVECEXP (x, i, j)); | |
659 | } | |
660 | ||
661 | /* Update the register quantities for inserting X into the hash table | |
662 | with a value equivalent to CLASSP. | |
663 | (If CLASSP is not a REG or a SUBREG, it is irrelevant.) | |
664 | If MODIFIED is nonzero, X is a destination; it is being modified. | |
665 | Note that reg_invalidate should be called on a register | |
666 | before insert_regs is done on that register with MODIFIED != 0. | |
667 | ||
668 | Nonzero value means that elements of reg_qty have changed | |
669 | so X's hash code may be different. */ | |
670 | ||
671 | static int | |
672 | insert_regs (x, classp, modified) | |
673 | rtx x; | |
674 | struct table_elt *classp; | |
675 | int modified; | |
676 | { | |
677 | if (GET_CODE (x) == REG) | |
678 | { | |
679 | register int regno = REGNO (x); | |
680 | reg_rtx[regno] = x; | |
681 | if (modified || reg_qty[regno] == regno) | |
682 | { | |
683 | if (classp && GET_CODE (classp->exp) == REG) | |
684 | { | |
685 | make_regs_eqv (regno, REGNO (classp->exp)); | |
686 | /* Make sure reg_rtx is set up even for regs | |
687 | not explicitly set (such as function value). */ | |
688 | reg_rtx[REGNO (classp->exp)] = classp->exp; | |
689 | } | |
690 | else | |
691 | make_new_qty (regno); | |
692 | return 1; | |
693 | } | |
694 | } | |
695 | /* Copying a subreg into a subreg makes the regs equivalent, | |
696 | but only if the entire regs' mode is within one word. | |
697 | Copying one reg of a DImode into one reg of another DImode | |
698 | does not make them equivalent. */ | |
699 | else if (GET_CODE (x) == SUBREG | |
700 | && GET_CODE (SUBREG_REG (x)) == REG | |
701 | && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) <= UNITS_PER_WORD | |
702 | && (modified | |
703 | || reg_qty[REGNO (SUBREG_REG (x))] == REGNO (SUBREG_REG (x)))) | |
704 | { | |
705 | if (classp && GET_CODE (classp->exp) == SUBREG | |
706 | && GET_CODE (SUBREG_REG (classp->exp)) == REG | |
707 | && GET_MODE (SUBREG_REG (classp->exp)) == GET_MODE (SUBREG_REG (x))) | |
708 | { | |
709 | int oregno = REGNO (SUBREG_REG (classp->exp)); | |
710 | make_regs_eqv (REGNO (SUBREG_REG (x)), oregno); | |
711 | /* Make sure reg_rtx is set up even for regs | |
712 | not explicitly set (such as function value). */ | |
713 | reg_rtx[oregno] = SUBREG_REG (classp->exp); | |
714 | } | |
715 | else | |
716 | make_new_qty (REGNO (SUBREG_REG (x))); | |
717 | return 1; | |
718 | } | |
719 | else | |
720 | mention_regs (x); | |
721 | return 0; | |
722 | } | |
723 | \f | |
724 | /* Look in or update the hash table. */ | |
725 | ||
726 | /* Put the element ELT on the list of free elements. */ | |
727 | ||
728 | static void | |
729 | free_element (elt) | |
730 | struct table_elt *elt; | |
731 | { | |
732 | elt->next_same_hash = free_element_chain; | |
733 | free_element_chain = elt; | |
734 | } | |
735 | ||
736 | /* Return an element that is free for use. */ | |
737 | ||
738 | static struct table_elt * | |
739 | get_element () | |
740 | { | |
741 | struct table_elt *elt = free_element_chain; | |
742 | if (elt) | |
743 | { | |
744 | free_element_chain = elt->next_same_hash; | |
745 | return elt; | |
746 | } | |
747 | n_elements_made++; | |
748 | return (struct table_elt *) oballoc (sizeof (struct table_elt)); | |
749 | } | |
750 | ||
751 | /* Remove table element ELT from use in the table. | |
752 | HASH is its hash code, made using the HASH macro. | |
753 | It's an argument because often that is known in advance | |
754 | and we save much time not recomputing it. */ | |
755 | ||
756 | static void | |
757 | remove (elt, hash) | |
758 | register struct table_elt *elt; | |
759 | int hash; | |
760 | { | |
761 | if (elt == 0) | |
762 | return; | |
763 | ||
764 | /* Mark this element as removed. See cse_insn. */ | |
765 | elt->first_same_value = 0; | |
766 | ||
767 | /* Remove the table element from its equivalence class. */ | |
768 | ||
769 | { | |
770 | register struct table_elt *prev = elt->prev_same_value; | |
771 | register struct table_elt *next = elt->next_same_value; | |
772 | ||
773 | if (next) next->prev_same_value = prev; | |
774 | ||
775 | if (prev) | |
776 | prev->next_same_value = next; | |
777 | else | |
778 | { | |
779 | register struct table_elt *newfirst = next; | |
780 | while (next) | |
781 | { | |
782 | next->first_same_value = newfirst; | |
783 | next = next->next_same_value; | |
784 | } | |
785 | } | |
786 | } | |
787 | ||
788 | /* Remove the table element from its hash bucket. */ | |
789 | ||
790 | { | |
791 | register struct table_elt *prev = elt->prev_same_hash; | |
792 | register struct table_elt *next = elt->next_same_hash; | |
793 | ||
794 | if (next) next->prev_same_hash = prev; | |
795 | ||
796 | if (prev) | |
797 | prev->next_same_hash = next; | |
798 | else | |
799 | table[hash] = next; | |
800 | } | |
801 | ||
802 | /* Remove the table element from its related-value circular chain. */ | |
803 | ||
804 | if (elt->related_value != 0 && elt->related_value != elt) | |
805 | { | |
806 | register struct table_elt *p = elt->related_value; | |
807 | while (p->related_value != elt) | |
808 | p = p->related_value; | |
809 | p->related_value = elt->related_value; | |
810 | if (p->related_value == p) | |
811 | p->related_value = 0; | |
812 | } | |
813 | ||
814 | free_element (elt); | |
815 | } | |
816 | ||
817 | /* Look up X in the hash table and return its table element, | |
818 | or 0 if X is not in the table. | |
819 | ||
820 | MODE is the machine-mode of X, or if X is an integer constant | |
821 | with VOIDmode then MODE is the mode with which X will be used. | |
822 | ||
823 | Here we are satisfied to find an expression whose tree structure | |
824 | looks like X. */ | |
825 | ||
826 | static struct table_elt * | |
827 | lookup (x, hash, mode) | |
828 | rtx x; | |
829 | int hash; | |
830 | enum machine_mode mode; | |
831 | { | |
832 | register struct table_elt *p; | |
833 | ||
834 | for (p = table[hash]; p; p = p->next_same_hash) | |
835 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 1))) | |
836 | return p; | |
837 | ||
838 | return 0; | |
839 | } | |
840 | ||
841 | /* Like `lookup' but don't care whether the table element uses invalid regs. | |
842 | Also ignore discrepancies in the machine mode of a register. */ | |
843 | ||
844 | static struct table_elt * | |
845 | lookup_for_remove (x, hash, mode) | |
846 | rtx x; | |
847 | int hash; | |
848 | enum machine_mode mode; | |
849 | { | |
850 | register struct table_elt *p; | |
851 | ||
852 | if (GET_CODE (x) == REG) | |
853 | { | |
854 | int regno = REGNO (x); | |
855 | /* Don't check the machine mode when comparing registers; | |
856 | invalidating (REG:SI 0) also invalidates (REG:DF 0). */ | |
857 | for (p = table[hash]; p; p = p->next_same_hash) | |
858 | if (GET_CODE (p->exp) == REG | |
859 | && REGNO (p->exp) == regno) | |
860 | return p; | |
861 | } | |
862 | else | |
863 | { | |
864 | for (p = table[hash]; p; p = p->next_same_hash) | |
865 | if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0))) | |
866 | return p; | |
867 | } | |
868 | ||
869 | return 0; | |
870 | } | |
871 | ||
872 | /* Look for an expression equivalent to X and with code CODE. | |
873 | If one is found, return that expression. */ | |
874 | ||
875 | static rtx | |
876 | lookup_as_function (x, code) | |
877 | rtx x; | |
878 | enum rtx_code code; | |
879 | { | |
880 | register struct table_elt *p = lookup (x, safe_hash (x, 0) % NBUCKETS, | |
881 | GET_MODE (x)); | |
882 | if (p == 0) | |
883 | return 0; | |
884 | ||
885 | for (p = p->first_same_value; p; p = p->next_same_value) | |
886 | { | |
887 | if (GET_CODE (p->exp) == code | |
888 | /* Make sure this is a valid entry in the table. */ | |
889 | && (exp_equiv_p (XEXP (p->exp, 0), XEXP (p->exp, 0), 1))) | |
890 | return p->exp; | |
891 | } | |
892 | ||
893 | return 0; | |
894 | } | |
895 | ||
896 | /* Insert X in the hash table, assuming HASH is its hash code | |
897 | and CLASSP is the current first element of the class it should go in | |
898 | (or 0 if a new class should be made). | |
899 | It is inserted at the proper position to keep the class in | |
900 | the order cheapest first. | |
901 | ||
902 | MODE is the machine-mode of X, or if X is an integer constant | |
903 | with VOIDmode then MODE is the mode with which X will be used. | |
904 | ||
905 | For elements of equal cheapness, the most recent one | |
906 | goes in front, except that the first element in the list | |
907 | remains first unless a cheaper element is added. | |
908 | ||
909 | The in_memory field in the hash table element is set to 0. | |
910 | The caller must set it nonzero if appropriate. | |
911 | ||
912 | You should call insert_regs (X, CLASSP, MODIFY) before calling here, | |
913 | and if insert_regs returns a nonzero value | |
914 | you must then recompute its hash code before calling here. | |
915 | ||
916 | If necessary, update table showing constant values of quantities. */ | |
917 | ||
918 | #define CHEAPER(X,Y) \ | |
919 | (((X)->cost < (Y)->cost) || \ | |
920 | ((X)->cost == (Y)->cost \ | |
921 | && GET_CODE ((X)->exp) == REG && GET_CODE ((Y)->exp) == REG \ | |
922 | && (uid_cuid[regno_last_uid[REGNO ((X)->exp)]] > cse_basic_block_end \ | |
923 | || uid_cuid[regno_first_uid[REGNO ((X)->exp)]] < cse_basic_block_start) \ | |
924 | && (uid_cuid[regno_last_uid[REGNO ((X)->exp)]] \ | |
925 | > uid_cuid[regno_last_uid[REGNO ((Y)->exp)]]))) | |
926 | ||
927 | static struct table_elt * | |
928 | insert (x, classp, hash, mode) | |
929 | register rtx x; | |
930 | register struct table_elt *classp; | |
931 | int hash; | |
932 | enum machine_mode mode; | |
933 | { | |
934 | register struct table_elt *elt; | |
935 | ||
936 | /* Put an element for X into the right hash bucket. */ | |
937 | ||
938 | elt = get_element (); | |
939 | elt->exp = x; | |
940 | elt->cost = rtx_cost (x) * 2; | |
941 | /* Make pseudo regs a little cheaper than hard regs. */ | |
942 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER) | |
943 | elt->cost -= 1; | |
944 | elt->next_same_value = 0; | |
945 | elt->prev_same_value = 0; | |
946 | elt->next_same_hash = table[hash]; | |
947 | elt->prev_same_hash = 0; | |
948 | elt->related_value = 0; | |
949 | elt->in_memory = 0; | |
950 | elt->equivalence_only = 0; | |
951 | elt->mode = mode; | |
952 | if (table[hash]) | |
953 | table[hash]->prev_same_hash = elt; | |
954 | table[hash] = elt; | |
955 | ||
956 | /* Put it into the proper value-class. */ | |
957 | if (classp) | |
958 | { | |
959 | if (CHEAPER (elt, classp)) | |
960 | /** Insert at the head of the class */ | |
961 | { | |
962 | register struct table_elt *p; | |
963 | elt->next_same_value = classp; | |
964 | classp->prev_same_value = elt; | |
965 | elt->first_same_value = elt; | |
966 | ||
967 | for (p = classp; p; p = p->next_same_value) | |
968 | p->first_same_value = elt; | |
969 | } | |
970 | else | |
971 | { | |
972 | /* Insert not at head of the class. */ | |
973 | /* Put it after the last element cheaper than X. */ | |
974 | register struct table_elt *p, *next; | |
975 | for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); | |
976 | p = next); | |
977 | /* Put it after P and before NEXT. */ | |
978 | elt->next_same_value = next; | |
979 | if (next) | |
980 | next->prev_same_value = elt; | |
981 | elt->prev_same_value = p; | |
982 | p->next_same_value = elt; | |
983 | elt->first_same_value = classp; | |
984 | } | |
985 | } | |
986 | else | |
987 | elt->first_same_value = elt; | |
988 | ||
989 | if ((CONSTANT_P (x) || GET_CODE (x) == CONST_DOUBLE || FIXED_BASE_PLUS_P (x)) | |
990 | && GET_CODE (elt->first_same_value->exp) == REG) | |
991 | { | |
992 | qty_const[reg_qty[REGNO (elt->first_same_value->exp)]] = x; | |
993 | qty_const_insn[reg_qty[REGNO (elt->first_same_value->exp)]] = this_insn; | |
994 | } | |
995 | ||
996 | if (GET_CODE (x) == REG) | |
997 | { | |
998 | if (elt->next_same_value != 0 | |
999 | && (CONSTANT_P (elt->next_same_value->exp) | |
1000 | || GET_CODE (elt->next_same_value->exp) == CONST_DOUBLE | |
1001 | || FIXED_BASE_PLUS_P (elt->next_same_value->exp))) | |
1002 | { | |
1003 | qty_const[reg_qty[REGNO (x)]] = elt->next_same_value->exp; | |
1004 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1005 | } | |
1006 | if (CONSTANT_P (elt->first_same_value->exp) | |
1007 | || GET_CODE (elt->first_same_value->exp) == CONST_DOUBLE | |
1008 | || FIXED_BASE_PLUS_P (elt->first_same_value->exp)) | |
1009 | { | |
1010 | qty_const[reg_qty[REGNO (x)]] = elt->first_same_value->exp; | |
1011 | qty_const_insn[reg_qty[REGNO (x)]] = this_insn; | |
1012 | } | |
1013 | } | |
1014 | ||
1015 | /* If this is a constant with symbolic value, | |
1016 | and it has a term with an explicit integer value, | |
1017 | link it up with related expressions. */ | |
1018 | if (GET_CODE (x) == CONST) | |
1019 | { | |
1020 | rtx subexp = get_related_value (x); | |
1021 | int subhash; | |
1022 | struct table_elt *subelt, *subelt_prev; | |
1023 | ||
1024 | if (subexp != 0) | |
1025 | { | |
1026 | /* Get the integer-free subexpression in the hash table. */ | |
1027 | subhash = safe_hash (subexp, mode) % NBUCKETS; | |
1028 | subelt = lookup (subexp, subhash, mode); | |
1029 | if (subelt == 0) | |
1030 | subelt = insert (subexp, 0, subhash, mode); | |
1031 | /* Initialize SUBELT's circular chain if it has none. */ | |
1032 | if (subelt->related_value == 0) | |
1033 | subelt->related_value = subelt; | |
1034 | /* Find the element in the circular chain that precedes SUBELT. */ | |
1035 | subelt_prev = subelt; | |
1036 | while (subelt_prev->related_value != subelt) | |
1037 | subelt_prev = subelt_prev->related_value; | |
1038 | /* Put new ELT into SUBELT's circular chain just before SUBELT. | |
1039 | This way the element that follows SUBELT is the oldest one. */ | |
1040 | elt->related_value = subelt_prev->related_value; | |
1041 | subelt_prev->related_value = elt; | |
1042 | } | |
1043 | } | |
1044 | ||
1045 | return elt; | |
1046 | } | |
1047 | \f | |
1048 | /* Remove from the hash table, or mark as invalid, | |
1049 | all expressions whose values could be altered by storing in X. | |
1050 | X is a register, a subreg, or a memory reference with nonvarying address | |
1051 | (because, when a memory reference with a varying address is stored in, | |
1052 | all memory references are removed by invalidate_memory | |
1053 | so specific invalidation is superfluous). | |
1054 | ||
1055 | A nonvarying address may be just a register or just | |
1056 | a symbol reference, or it may be either of those plus | |
1057 | a numeric offset. */ | |
1058 | ||
1059 | static void | |
1060 | invalidate (x) | |
1061 | rtx x; | |
1062 | { | |
1063 | register int i; | |
1064 | register struct table_elt *p; | |
1065 | register rtx base; | |
1066 | register int start, end; | |
1067 | ||
1068 | /* If X is a register, dependencies on its contents | |
1069 | are recorded through the qty number mechanism. | |
1070 | Just change the qty number of the register, | |
1071 | mark it as invalid for expressions that refer to it, | |
1072 | and remove it itself. */ | |
1073 | ||
1074 | if (GET_CODE (x) == REG) | |
1075 | { | |
1076 | register int hash = HASH (x, 0); | |
1077 | reg_invalidate (REGNO (x)); | |
1078 | remove (lookup_for_remove (x, hash, GET_MODE (x)), hash); | |
1079 | return; | |
1080 | } | |
1081 | ||
1082 | if (GET_CODE (x) == SUBREG) | |
1083 | { | |
1084 | if (GET_CODE (SUBREG_REG (x)) != REG) | |
1085 | abort (); | |
1086 | invalidate (SUBREG_REG (x)); | |
1087 | return; | |
1088 | } | |
1089 | ||
1090 | /* X is not a register; it must be a memory reference with | |
1091 | a nonvarying address. Remove all hash table elements | |
1092 | that refer to overlapping pieces of memory. */ | |
1093 | ||
1094 | if (GET_CODE (x) != MEM) | |
1095 | abort (); | |
1096 | base = XEXP (x, 0); | |
1097 | start = 0; | |
1098 | ||
1099 | /* Registers with nonvarying addresses usually have constant equivalents; | |
1100 | but the frame pointer register is also possible. */ | |
1101 | if (GET_CODE (base) == REG | |
1102 | && qty_const[reg_qty[REGNO (base)]] != 0) | |
1103 | base = qty_const[reg_qty[REGNO (base)]]; | |
1104 | ||
1105 | if (GET_CODE (base) == CONST) | |
1106 | base = XEXP (base, 0); | |
1107 | if (GET_CODE (base) == PLUS | |
1108 | && GET_CODE (XEXP (base, 1)) == CONST_INT) | |
1109 | { | |
1110 | start = INTVAL (XEXP (base, 1)); | |
1111 | base = XEXP (base, 0); | |
1112 | } | |
1113 | ||
1114 | end = start + GET_MODE_SIZE (GET_MODE (x)); | |
1115 | for (i = 0; i < NBUCKETS; i++) | |
1116 | { | |
1117 | register struct table_elt *next; | |
1118 | for (p = table[i]; p; p = next) | |
1119 | { | |
1120 | next = p->next_same_hash; | |
1121 | if (refers_to_mem_p (p->exp, base, start, end)) | |
1122 | remove (p, i); | |
1123 | } | |
1124 | } | |
1125 | } | |
1126 | ||
1127 | /* Remove all expressions that refer to register REGNO, | |
1128 | since they are already invalid, and we are about to | |
1129 | mark that register valid again and don't want the old | |
1130 | expressions to reappear as valid. */ | |
1131 | ||
1132 | static void | |
1133 | remove_invalid_refs (regno) | |
1134 | int regno; | |
1135 | { | |
1136 | register int i; | |
1137 | register struct table_elt *p, *next; | |
1138 | register rtx x = reg_rtx[regno]; | |
1139 | ||
1140 | for (i = 0; i < NBUCKETS; i++) | |
1141 | for (p = table[i]; p; p = next) | |
1142 | { | |
1143 | next = p->next_same_hash; | |
1144 | if (GET_CODE (p->exp) != REG && refers_to_p (p->exp, x)) | |
1145 | remove (p, i); | |
1146 | } | |
1147 | } | |
1148 | \f | |
1149 | /* Remove from the hash table all expressions that reference memory, | |
1150 | or some of them as specified by *WRITES. */ | |
1151 | ||
1152 | static void | |
1153 | invalidate_memory (writes) | |
1154 | struct write_data *writes; | |
1155 | { | |
1156 | register int i; | |
1157 | register struct table_elt *p, *next; | |
1158 | int all = writes->all; | |
1159 | int nonscalar = writes->nonscalar; | |
1160 | ||
1161 | for (i = 0; i < NBUCKETS; i++) | |
1162 | for (p = table[i]; p; p = next) | |
1163 | { | |
1164 | next = p->next_same_hash; | |
1165 | if (p->in_memory | |
1166 | && (all | |
1167 | || (nonscalar && p->in_struct) | |
1168 | || cse_rtx_addr_varies_p (p->exp))) | |
1169 | remove (p, i); | |
1170 | } | |
1171 | } | |
1172 | \f | |
1173 | /* Return the value of the integer term in X, if one is apparent; | |
1174 | otherwise return 0. | |
1175 | We do not check extremely carefully for the presence of integer terms | |
1176 | but rather consider only the cases that `insert' notices | |
1177 | for the `related_value' field. */ | |
1178 | ||
1179 | static int | |
1180 | get_integer_term (x) | |
1181 | rtx x; | |
1182 | { | |
1183 | if (GET_CODE (x) == CONST) | |
1184 | x = XEXP (x, 0); | |
1185 | ||
1186 | if (GET_CODE (x) == MINUS | |
1187 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1188 | return - INTVAL (XEXP (x, 1)); | |
1189 | if (GET_CODE (x) != PLUS) | |
1190 | return 0; | |
1191 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
1192 | return INTVAL (XEXP (x, 0)); | |
1193 | if (GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1194 | return INTVAL (XEXP (x, 1)); | |
1195 | return 0; | |
1196 | } | |
1197 | ||
1198 | static rtx | |
1199 | get_related_value (x) | |
1200 | rtx x; | |
1201 | { | |
1202 | if (GET_CODE (x) != CONST) | |
1203 | return 0; | |
1204 | x = XEXP (x, 0); | |
1205 | if (GET_CODE (x) == PLUS) | |
1206 | { | |
1207 | if (GET_CODE (XEXP (x, 0)) == CONST_INT) | |
1208 | return XEXP (x, 1); | |
1209 | if (GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1210 | return XEXP (x, 0); | |
1211 | } | |
1212 | else if (GET_CODE (x) == MINUS | |
1213 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1214 | return XEXP (x, 0); | |
1215 | return 0; | |
1216 | } | |
1217 | ||
1218 | /* Given an expression X of type CONST, | |
1219 | and ELT which is its table entry (or 0 if it | |
1220 | is not in the hash table), | |
1221 | return an alternate expression for X as a register plus integer. | |
1222 | If none can be found or it would not be a valid address, return 0. */ | |
1223 | ||
1224 | static rtx | |
1225 | use_related_value (x, elt) | |
1226 | rtx x; | |
1227 | struct table_elt *elt; | |
1228 | { | |
1229 | register struct table_elt *relt = 0; | |
1230 | register struct table_elt *p; | |
1231 | int offset; | |
1232 | rtx addr; | |
1233 | ||
1234 | /* First, is there anything related known? | |
1235 | If we have a table element, we can tell from that. | |
1236 | Otherwise, must look it up. */ | |
1237 | ||
1238 | if (elt != 0 && elt->related_value != 0) | |
1239 | relt = elt; | |
1240 | else if (elt == 0 && GET_CODE (x) == CONST) | |
1241 | { | |
1242 | rtx subexp = get_related_value (x); | |
1243 | if (subexp != 0) | |
1244 | relt = lookup (subexp, | |
1245 | safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, | |
1246 | GET_MODE (subexp)); | |
1247 | } | |
1248 | ||
1249 | if (relt == 0) | |
1250 | return 0; | |
1251 | ||
1252 | /* Search all related table entries for one that has an | |
1253 | equivalent register. */ | |
1254 | ||
1255 | p = relt; | |
1256 | while (1) | |
1257 | { | |
1258 | if (p->first_same_value != 0 | |
1259 | && GET_CODE (p->first_same_value->exp) == REG) | |
1260 | break; | |
1261 | p = p->related_value; | |
1262 | ||
1263 | /* We went all the way around, so there is nothing to be found. | |
1264 | Return failure. */ | |
1265 | if (p == relt) | |
1266 | return 0; | |
1267 | /* Perhaps RELT was in the table for some other reason and | |
1268 | it has no related values recorded. */ | |
1269 | if (p == 0) | |
1270 | return 0; | |
1271 | } | |
1272 | ||
1273 | /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ | |
1274 | offset = (get_integer_term (x) - get_integer_term (p->exp)); | |
1275 | addr = plus_constant (p->first_same_value->exp, offset); | |
1276 | if (memory_address_p (QImode, addr)) | |
1277 | return addr; | |
1278 | return 0; | |
1279 | } | |
1280 | \f | |
1281 | /* Hash an rtx. We are careful to make sure the value is never negative. | |
1282 | Equivalent registers hash identically. | |
1283 | MODE is used in hashing for CONST_INTs only; | |
1284 | otherwise the mode of X is used. | |
1285 | ||
1286 | Store 1 in do_not_record if any subexpression is volatile. | |
1287 | ||
1288 | Store 1 in hash_arg_in_memory if X contains a MEM rtx | |
1289 | which does not have the RTX_UNCHANGING_P bit set. | |
1290 | In this case, also store 1 in hash_arg_in_struct | |
1291 | if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. | |
1292 | ||
1293 | Note that cse_insn knows that the hash code of a MEM expression | |
1294 | is just (int) MEM plus the hash code of the address. | |
1295 | It also knows it can use HASHREG to get the hash code of (REG n). */ | |
1296 | ||
1297 | #define HASHBITS 16 | |
1298 | ||
1299 | #define HASHREG(RTX) \ | |
1300 | ((((int) REG << 7) + reg_qty[REGNO (RTX)]) % NBUCKETS) | |
1301 | ||
1302 | static int | |
1303 | canon_hash (x, mode) | |
1304 | rtx x; | |
1305 | enum machine_mode mode; | |
1306 | { | |
1307 | register int i, j; | |
1308 | register int hash = 0; | |
1309 | register enum rtx_code code; | |
1310 | register char *fmt; | |
1311 | ||
1312 | /* repeat is used to turn tail-recursion into iteration. */ | |
1313 | repeat: | |
1314 | if (x == 0) | |
1315 | return hash; | |
1316 | ||
1317 | code = GET_CODE (x); | |
1318 | switch (code) | |
1319 | { | |
1320 | case REG: | |
1321 | { | |
1322 | /* We do not invalidate anything on pushing or popping | |
1323 | because they cannot change anything but the stack pointer; | |
1324 | but that means we must consider the stack pointer volatile | |
1325 | since it can be changed "mysteriously". */ | |
1326 | ||
1327 | register int regno = REGNO (x); | |
1328 | if (regno == STACK_POINTER_REGNUM | |
1329 | || (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])) | |
1330 | { | |
1331 | do_not_record = 1; | |
1332 | return 0; | |
1333 | } | |
1334 | return hash + ((int) REG << 7) + reg_qty[regno]; | |
1335 | } | |
1336 | ||
1337 | case CONST_INT: | |
1338 | hash += ((int) mode + ((int) CONST_INT << 7) | |
1339 | + INTVAL (x) + (INTVAL (x) >> HASHBITS)); | |
1340 | return ((1 << HASHBITS) - 1) & hash; | |
1341 | ||
1342 | case CONST_DOUBLE: | |
1343 | /* This is like the general case, except that it only counts | |
1344 | the first two elements. */ | |
1345 | hash += (int) code + (int) GET_MODE (x); | |
1346 | { | |
1347 | int i; | |
1348 | for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) | |
1349 | { | |
1350 | int tem = XINT (x, i); | |
1351 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1352 | } | |
1353 | } | |
1354 | return hash; | |
1355 | ||
1356 | /* Assume there is only one rtx object for any given label. */ | |
1357 | case LABEL_REF: | |
1358 | /* Use `and' to ensure a positive number. */ | |
1359 | return (hash + ((int) LABEL_REF << 7) | |
1360 | + ((int) XEXP (x, 0) & ((1 << HASHBITS) - 1))); | |
1361 | ||
1362 | case SYMBOL_REF: | |
1363 | return (hash + ((int) SYMBOL_REF << 7) | |
1364 | + ((int) XEXP (x, 0) & ((1 << HASHBITS) - 1))); | |
1365 | ||
1366 | case MEM: | |
1367 | if (MEM_VOLATILE_P (x)) | |
1368 | { | |
1369 | do_not_record = 1; | |
1370 | return 0; | |
1371 | } | |
1372 | if (! RTX_UNCHANGING_P (x)) | |
1373 | { | |
1374 | hash_arg_in_memory = 1; | |
1375 | if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; | |
1376 | } | |
1377 | /* Now that we have already found this special case, | |
1378 | might as well speed it up as much as possible. */ | |
1379 | hash += (int) MEM; | |
1380 | x = XEXP (x, 0); | |
1381 | goto repeat; | |
1382 | ||
1383 | case PRE_DEC: | |
1384 | case PRE_INC: | |
1385 | case POST_DEC: | |
1386 | case POST_INC: | |
1387 | case PC: | |
1388 | case CC0: | |
1389 | case CALL: | |
1390 | do_not_record = 1; | |
1391 | return 0; | |
1392 | ||
1393 | case ASM_OPERANDS: | |
1394 | if (MEM_VOLATILE_P (x)) | |
1395 | { | |
1396 | do_not_record = 1; | |
1397 | return 0; | |
1398 | } | |
1399 | } | |
1400 | ||
1401 | i = GET_RTX_LENGTH (code) - 1; | |
1402 | hash += (int) code + (int) GET_MODE (x); | |
1403 | fmt = GET_RTX_FORMAT (code); | |
1404 | for (; i >= 0; i--) | |
1405 | { | |
1406 | if (fmt[i] == 'e') | |
1407 | { | |
1408 | /* If we are about to do the last recursive call | |
1409 | needed at this level, change it into iteration. | |
1410 | This function is called enough to be worth it. */ | |
1411 | if (i == 0) | |
1412 | { | |
1413 | x = XEXP (x, 0); | |
1414 | goto repeat; | |
1415 | } | |
1416 | hash += canon_hash (XEXP (x, i), 0); | |
1417 | } | |
1418 | else if (fmt[i] == 'E') | |
1419 | for (j = 0; j < XVECLEN (x, i); j++) | |
1420 | hash += canon_hash (XVECEXP (x, i, j), 0); | |
1421 | else if (fmt[i] == 's') | |
1422 | { | |
1423 | register char *p = XSTR (x, i); | |
1424 | if (p) | |
1425 | while (*p) | |
1426 | { | |
1427 | register int tem = *p++; | |
1428 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1429 | } | |
1430 | } | |
1431 | else | |
1432 | { | |
1433 | register int tem = XINT (x, i); | |
1434 | hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); | |
1435 | } | |
1436 | } | |
1437 | return hash; | |
1438 | } | |
1439 | ||
1440 | /* Like canon_hash but with no side effects. */ | |
1441 | ||
1442 | static int | |
1443 | safe_hash (x, mode) | |
1444 | rtx x; | |
1445 | enum machine_mode mode; | |
1446 | { | |
1447 | int save_do_not_record = do_not_record; | |
1448 | int save_hash_arg_in_memory = hash_arg_in_memory; | |
1449 | int save_hash_arg_in_struct = hash_arg_in_struct; | |
1450 | int hash = canon_hash (x, mode); | |
1451 | hash_arg_in_memory = save_hash_arg_in_memory; | |
1452 | hash_arg_in_struct = save_hash_arg_in_struct; | |
1453 | do_not_record = save_do_not_record; | |
1454 | return hash; | |
1455 | } | |
1456 | \f | |
1457 | /* Return 1 iff X and Y would canonicalize into the same thing, | |
1458 | without actually constructing the canonicalization of either one. | |
1459 | If VALIDATE is nonzero, | |
1460 | we assume X is an expression being processed from the rtl | |
1461 | and Y was found in the hash table. We check register refs | |
1462 | in Y for being marked as valid. */ | |
1463 | ||
1464 | static int | |
1465 | exp_equiv_p (x, y, validate) | |
1466 | rtx x, y; | |
1467 | int validate; | |
1468 | { | |
1469 | register int i; | |
1470 | register enum rtx_code code; | |
1471 | register char *fmt; | |
1472 | ||
1473 | /* Note: it is incorrect to assume an expression is equivalent to itself | |
1474 | if VALIDATE is nonzero. */ | |
1475 | if (x == y && !validate) | |
1476 | return 1; | |
1477 | if (x == 0 || y == 0) | |
1478 | return x == y; | |
1479 | code = GET_CODE (x); | |
1480 | if (code != GET_CODE (y)) | |
1481 | return 0; | |
1482 | ||
1483 | switch (code) | |
1484 | { | |
1485 | case PC: | |
1486 | case CC0: | |
1487 | return x == y; | |
1488 | ||
1489 | case CONST_INT: | |
1490 | return XINT (x, 0) == XINT (y, 0); | |
1491 | ||
1492 | case LABEL_REF: | |
1493 | case SYMBOL_REF: | |
1494 | return XEXP (x, 0) == XEXP (y, 0); | |
1495 | ||
1496 | case REG: | |
1497 | return (reg_qty[REGNO (x)] == reg_qty[REGNO (y)] | |
1498 | && (!validate | |
1499 | || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])); | |
1500 | } | |
1501 | ||
1502 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ | |
1503 | ||
1504 | if (GET_MODE (x) != GET_MODE (y)) | |
1505 | return 0; | |
1506 | ||
1507 | /* Compare the elements. If any pair of corresponding elements | |
1508 | fail to match, return 0 for the whole things. */ | |
1509 | ||
1510 | fmt = GET_RTX_FORMAT (code); | |
1511 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1512 | { | |
1513 | if (fmt[i] == 'e') | |
1514 | { | |
1515 | if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate)) | |
1516 | return 0; | |
1517 | } | |
1518 | else if (fmt[i] == 'E') | |
1519 | { | |
1520 | int j; | |
1521 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
1522 | return 0; | |
1523 | for (j = 0; j < XVECLEN (x, i); j++) | |
1524 | if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), validate)) | |
1525 | return 0; | |
1526 | } | |
1527 | else if (fmt[i] == 's') | |
1528 | { | |
1529 | if (strcmp (XSTR (x, i), XSTR (y, i))) | |
1530 | return 0; | |
1531 | } | |
1532 | else | |
1533 | { | |
1534 | if (XINT (x, i) != XINT (y, i)) | |
1535 | return 0; | |
1536 | } | |
1537 | } | |
1538 | return 1; | |
1539 | } | |
1540 | \f | |
1541 | /* Return 1 iff any subexpression of X matches Y. | |
1542 | Here we do not require that X or Y be valid (for registers referred to) | |
1543 | for being in the hash table. */ | |
1544 | ||
1545 | int | |
1546 | refers_to_p (x, y) | |
1547 | rtx x, y; | |
1548 | { | |
1549 | register int i; | |
1550 | register enum rtx_code code; | |
1551 | register char *fmt; | |
1552 | ||
1553 | repeat: | |
1554 | if (x == y) | |
1555 | return 1; | |
1556 | if (x == 0 || y == 0) | |
1557 | return 0; | |
1558 | ||
1559 | code = GET_CODE (x); | |
1560 | /* If X as a whole has the same code as Y, they may match. | |
1561 | If so, return 1. */ | |
1562 | if (code == GET_CODE (y)) | |
1563 | { | |
1564 | if (exp_equiv_p (x, y, 0)) | |
1565 | return 1; | |
1566 | } | |
1567 | ||
1568 | /* X does not match, so try its subexpressions. */ | |
1569 | ||
1570 | fmt = GET_RTX_FORMAT (code); | |
1571 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1572 | if (fmt[i] == 'e') | |
1573 | { | |
1574 | if (i == 0) | |
1575 | { | |
1576 | x = XEXP (x, 0); | |
1577 | goto repeat; | |
1578 | } | |
1579 | else | |
1580 | if (refers_to_p (XEXP (x, i), y)) | |
1581 | return 1; | |
1582 | } | |
1583 | else if (fmt[i] == 'E') | |
1584 | { | |
1585 | int j; | |
1586 | for (j = 0; j < XVECLEN (x, i); j++) | |
1587 | if (refers_to_p (XVECEXP (x, i, j), y)) | |
1588 | return 1; | |
1589 | } | |
1590 | ||
1591 | return 0; | |
1592 | } | |
1593 | \f | |
1594 | /* Return 1 iff any subexpression of X refers to memory | |
1595 | at an address of REG plus some offset | |
1596 | such that any of the bytes' offsets fall between START (inclusive) | |
1597 | and END (exclusive). | |
1598 | ||
1599 | The value is undefined if X is a varying address. | |
1600 | This function is not used in such cases. | |
1601 | ||
1602 | When used in the cse pass, `qty_const' is nonzero, and it is used | |
1603 | to treat an address that is a register with a known constant value | |
1604 | as if it were that constant value. | |
1605 | In the loop pass, `qty_const' is zero, so this is not done. */ | |
1606 | ||
1607 | int | |
1608 | refers_to_mem_p (x, reg, start, end) | |
1609 | rtx x, reg; | |
1610 | int start, end; | |
1611 | { | |
1612 | register int i; | |
1613 | register enum rtx_code code; | |
1614 | register char *fmt; | |
1615 | ||
1616 | repeat: | |
1617 | if (x == 0) | |
1618 | return 0; | |
1619 | ||
1620 | code = GET_CODE (x); | |
1621 | if (code == MEM) | |
1622 | { | |
1623 | register rtx addr = XEXP (x, 0); /* Get the address. */ | |
1624 | int myend; | |
1625 | if (GET_CODE (addr) == REG | |
1626 | /* qty_const is 0 when outside the cse pass; | |
1627 | at such times, this info is not available. */ | |
1628 | && qty_const != 0 | |
1629 | && qty_const[reg_qty[REGNO (addr)]] != 0) | |
1630 | addr = qty_const[reg_qty[REGNO (addr)]]; | |
1631 | if (GET_CODE (addr) == CONST) | |
1632 | addr = XEXP (addr, 0); | |
1633 | ||
1634 | /* If ADDR is BASE, or BASE plus an integer, put | |
1635 | the integer in I. */ | |
1636 | if (addr == reg) | |
1637 | i = 0; | |
1638 | else if (GET_CODE (addr) == PLUS | |
1639 | && XEXP (addr, 0) == reg | |
1640 | && GET_CODE (XEXP (addr, 1)) == CONST_INT) | |
1641 | i = INTVAL (XEXP (addr, 1)); | |
1642 | else | |
1643 | return 0; | |
1644 | ||
1645 | myend = i + GET_MODE_SIZE (GET_MODE (x)); | |
1646 | return myend > start && i < end; | |
1647 | } | |
1648 | ||
1649 | /* X does not match, so try its subexpressions. */ | |
1650 | ||
1651 | fmt = GET_RTX_FORMAT (code); | |
1652 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1653 | if (fmt[i] == 'e') | |
1654 | { | |
1655 | if (i == 0) | |
1656 | { | |
1657 | x = XEXP (x, 0); | |
1658 | goto repeat; | |
1659 | } | |
1660 | else | |
1661 | if (refers_to_mem_p (XEXP (x, i), reg, start, end)) | |
1662 | return 1; | |
1663 | } | |
1664 | else if (fmt[i] == 'E') | |
1665 | { | |
1666 | int j; | |
1667 | for (j = 0; j < XVECLEN (x, i); j++) | |
1668 | if (refers_to_mem_p (XVECEXP (x, i, j), reg, start, end)) | |
1669 | return 1; | |
1670 | } | |
1671 | ||
1672 | return 0; | |
1673 | } | |
1674 | ||
1675 | /* Nonzero if X refers to memory at a varying address; | |
1676 | except that a register which has at the moment a known constant value | |
1677 | isn't considered variable. */ | |
1678 | ||
1679 | static int | |
1680 | cse_rtx_addr_varies_p (x) | |
1681 | rtx x; | |
1682 | { | |
1683 | if (GET_CODE (x) == MEM | |
1684 | && GET_CODE (XEXP (x, 0)) == REG | |
1685 | && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) | |
1686 | return 0; | |
1687 | return rtx_addr_varies_p (x); | |
1688 | } | |
1689 | \f | |
1690 | /* Canonicalize an expression: | |
1691 | replace each register reference inside it | |
1692 | with the "oldest" equivalent register. */ | |
1693 | ||
1694 | static rtx | |
1695 | canon_reg (x) | |
1696 | rtx x; | |
1697 | { | |
1698 | register int i; | |
1699 | register enum rtx_code code; | |
1700 | register char *fmt; | |
1701 | ||
1702 | if (x == 0) | |
1703 | return x; | |
1704 | ||
1705 | code = GET_CODE (x); | |
1706 | switch (code) | |
1707 | { | |
1708 | case PC: | |
1709 | case CC0: | |
1710 | case CONST: | |
1711 | case CONST_INT: | |
1712 | case CONST_DOUBLE: | |
1713 | case SYMBOL_REF: | |
1714 | case LABEL_REF: | |
1715 | case ADDR_VEC: | |
1716 | case ADDR_DIFF_VEC: | |
1717 | return x; | |
1718 | ||
1719 | case REG: | |
1720 | { | |
1721 | register rtx new; | |
1722 | /* Never replace a hard reg, because hard regs can appear | |
1723 | in more than one machine mode, and we must preserve the mode | |
1724 | of each occurrence. Also, some hard regs appear in | |
1725 | MEMs that are shared and mustn't be altered. */ | |
1726 | if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
1727 | return x; | |
1728 | new = reg_rtx[qty_first_reg[reg_qty[REGNO (x)]]]; | |
1729 | return new ? new : x; | |
1730 | } | |
1731 | } | |
1732 | ||
1733 | fmt = GET_RTX_FORMAT (code); | |
1734 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1735 | { | |
1736 | register int j; | |
1737 | ||
1738 | if (fmt[i] == 'e') | |
1739 | XEXP (x, i) = canon_reg (XEXP (x, i)); | |
1740 | else if (fmt[i] == 'E') | |
1741 | for (j = 0; j < XVECLEN (x, i); j++) | |
1742 | XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j)); | |
1743 | } | |
1744 | ||
1745 | return x; | |
1746 | } | |
1747 | \f | |
1748 | /* If X is a nontrivial arithmetic operation on an argument | |
1749 | for which a constant value can be determined, return | |
1750 | the result of operating on that value, as a constant. | |
1751 | Otherwise, return X, possibly with one or more operands | |
1752 | modified by recursive calls to this function. | |
1753 | ||
1754 | If X is a register whose contents are known, we do NOT | |
1755 | return those contents. This is because an instruction that | |
1756 | uses a register is usually faster than one that uses a constant. | |
1757 | ||
1758 | COPYFLAG is nonzero for memory addresses and subexpressions thereof. | |
1759 | If COPYFLAG is nonzero, we avoid altering X itself | |
1760 | by creating new structure when necessary. In this case we | |
1761 | can risk creating invalid structure because it will be tested. | |
1762 | If COPYFLAG is zero, be careful not to substitute constants | |
1763 | into expressions that cannot be simplified. */ | |
1764 | ||
1765 | static rtx | |
1766 | fold_rtx (x, copyflag) | |
1767 | rtx x; | |
1768 | int copyflag; | |
1769 | { | |
1770 | register enum rtx_code code; | |
1771 | register char *fmt; | |
1772 | register int i, val; | |
1773 | rtx new = 0; | |
1774 | int copied = ! copyflag; | |
1775 | int width; | |
1776 | ||
1777 | /* Constant equivalents of first three operands of X; | |
1778 | 0 when no such equivalent is known. */ | |
1779 | rtx const_arg0; | |
1780 | rtx const_arg1; | |
1781 | rtx const_arg2; | |
1782 | ||
1783 | if (x == 0) | |
1784 | return x; | |
1785 | ||
1786 | width = GET_MODE_BITSIZE (GET_MODE (x)); | |
1787 | ||
1788 | code = GET_CODE (x); | |
1789 | switch (code) | |
1790 | { | |
1791 | case CONST: | |
1792 | case CONST_INT: | |
1793 | case CONST_DOUBLE: | |
1794 | case SYMBOL_REF: | |
1795 | case LABEL_REF: | |
1796 | case PC: | |
1797 | case CC0: | |
1798 | case REG: | |
1799 | /* No use simplifying an EXPR_LIST | |
1800 | since they are used only for lists of args | |
1801 | in a function call's REG_EQUAL note. */ | |
1802 | case EXPR_LIST: | |
1803 | return x; | |
1804 | ||
1805 | /* We must be careful when folding a memory address | |
1806 | to avoid making it invalid. So fold nondestructively | |
1807 | and use the result only if it's valid. */ | |
1808 | case MEM: | |
1809 | { | |
1810 | rtx newaddr = fold_rtx (XEXP (x, 0), 1); | |
1811 | /* Save time if no change was made. */ | |
1812 | if (XEXP (x, 0) == newaddr) | |
1813 | return x; | |
1814 | ||
1815 | if (! memory_address_p (GET_MODE (x), newaddr) | |
1816 | && memory_address_p (GET_MODE (x), XEXP (x, 0))) | |
1817 | return x; | |
1818 | ||
1819 | /* Don't replace a value with a more expensive one. */ | |
1820 | if (rtx_cost (XEXP (x, 0)) < rtx_cost (newaddr)) | |
1821 | return x; | |
1822 | ||
1823 | if (copyflag) | |
1824 | return gen_rtx (MEM, GET_MODE (x), newaddr); | |
1825 | XEXP (x, 0) = newaddr; | |
1826 | return x; | |
1827 | } | |
1828 | } | |
1829 | ||
1830 | const_arg0 = 0; | |
1831 | const_arg1 = 0; | |
1832 | const_arg2 = 0; | |
1833 | ||
1834 | /* Try folding our operands. | |
1835 | Then see which ones have constant values known. */ | |
1836 | ||
1837 | fmt = GET_RTX_FORMAT (code); | |
1838 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1839 | if (fmt[i] == 'e') | |
1840 | { | |
1841 | register rtx tem = fold_rtx (XEXP (x, i), copyflag); | |
1842 | ||
1843 | /* If an operand has changed under folding, and we are not supposed to | |
1844 | alter the original structure, copy X if we haven't yet done so. */ | |
1845 | if (! copied && tem != XEXP (x, i)) | |
1846 | { | |
1847 | int j; | |
1848 | rtx new = rtx_alloc (code); | |
1849 | PUT_MODE (new, GET_MODE (x)); | |
1850 | for (j = 0; j < GET_RTX_LENGTH (code); j++) | |
1851 | XINT (new, j) = XINT (x, j); | |
1852 | x = new; | |
1853 | copied = 1; | |
1854 | } | |
1855 | ||
1856 | /* Install the possibly altered folded operand. */ | |
1857 | XEXP (x, i) = tem; | |
1858 | ||
1859 | /* For the first three operands, see if the operand | |
1860 | is constant or equivalent to a constant. */ | |
1861 | if (i < 3) | |
1862 | { | |
1863 | rtx const_arg = equiv_constant (tem); | |
1864 | ||
1865 | switch (i) | |
1866 | { | |
1867 | case 0: | |
1868 | const_arg0 = const_arg; | |
1869 | break; | |
1870 | case 1: | |
1871 | const_arg1 = const_arg; | |
1872 | break; | |
1873 | case 2: | |
1874 | const_arg2 = const_arg; | |
1875 | break; | |
1876 | } | |
1877 | } | |
1878 | } | |
1879 | else if (fmt[i] == 'E') | |
1880 | /* Don't try to fold inside of a vector of expressions. | |
1881 | Doing nothing is is harmless. */ | |
1882 | ; | |
1883 | ||
1884 | /* If a commutative operation, place a constant integer as the second | |
1885 | operand unless the first operand is also a constant integer. Otherwise, | |
1886 | place any constant second unless the first operand is also a constant. */ | |
1887 | ||
1888 | switch (code) | |
1889 | { | |
1890 | case PLUS: | |
1891 | case MULT: | |
1892 | case UMULT: | |
1893 | case AND: | |
1894 | case IOR: | |
1895 | case XOR: | |
1896 | case NE: | |
1897 | case EQ: | |
1898 | if (const_arg0 && const_arg0 == XEXP (x, 0) | |
1899 | && (! (const_arg1 && const_arg1 == XEXP (x, 1)) | |
1900 | || (GET_CODE (const_arg0) == CONST_INT | |
1901 | && GET_CODE (const_arg1) != CONST_INT))) | |
1902 | { | |
1903 | register rtx tem; | |
1904 | ||
1905 | if (! copied) | |
1906 | copied = 1, x = copy_rtx (x); | |
1907 | tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); XEXP (x, 1) = tem; | |
1908 | tem = const_arg0; const_arg0 = const_arg1; const_arg1 = tem; | |
1909 | } | |
1910 | break; | |
1911 | } | |
1912 | ||
1913 | /* Now decode the kind of rtx X is | |
1914 | and then return X (if nothing can be done) | |
1915 | or return a folded rtx | |
1916 | or store a value in VAL and drop through | |
1917 | (to return a CONST_INT for the integer VAL). */ | |
1918 | ||
1919 | if (GET_RTX_LENGTH (code) == 1) | |
1920 | { | |
1921 | if (const_arg0 == 0) | |
1922 | return x; | |
1923 | ||
1924 | if (GET_CODE (const_arg0) == CONST_INT) | |
1925 | { | |
1926 | register int arg0 = INTVAL (const_arg0); | |
1927 | ||
1928 | switch (GET_CODE (x)) | |
1929 | { | |
1930 | case NOT: | |
1931 | val = ~ arg0; | |
1932 | break; | |
1933 | ||
1934 | case NEG: | |
1935 | val = - arg0; | |
1936 | break; | |
1937 | ||
1938 | case TRUNCATE: | |
1939 | val = arg0; | |
1940 | break; | |
1941 | ||
1942 | case ZERO_EXTEND: | |
1943 | { | |
1944 | enum machine_mode mode = GET_MODE (XEXP (x, 0)); | |
1945 | if (mode == VOIDmode) | |
1946 | return x; | |
1947 | if (GET_MODE_BITSIZE (mode) < HOST_BITS_PER_INT) | |
1948 | val = arg0 & ~((-1) << GET_MODE_BITSIZE (mode)); | |
1949 | else | |
1950 | return x; | |
1951 | break; | |
1952 | } | |
1953 | ||
1954 | case SIGN_EXTEND: | |
1955 | { | |
1956 | enum machine_mode mode = GET_MODE (XEXP (x, 0)); | |
1957 | if (mode == VOIDmode) | |
1958 | return x; | |
1959 | if (GET_MODE_BITSIZE (mode) < HOST_BITS_PER_INT) | |
1960 | { | |
1961 | val = arg0 & ~((-1) << GET_MODE_BITSIZE (mode)); | |
1962 | if (val & (1 << (GET_MODE_BITSIZE (mode) - 1))) | |
1963 | val -= 1 << GET_MODE_BITSIZE (mode); | |
1964 | } | |
1965 | else | |
1966 | return x; | |
1967 | break; | |
1968 | } | |
1969 | ||
1970 | default: | |
1971 | return x; | |
1972 | } | |
1973 | } | |
1974 | #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) | |
1975 | else if (GET_CODE (const_arg0) == CONST_DOUBLE | |
1976 | && GET_CODE (x) == NEG | |
1977 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) | |
1978 | { | |
1979 | union real_extract u; | |
1980 | register REAL_VALUE_TYPE arg0; | |
1981 | jmp_buf handler; | |
1982 | ||
1983 | if (setjmp (handler)) | |
1984 | { | |
1985 | warning ("floating point trap in constant folding"); | |
1986 | return x; | |
1987 | } | |
1988 | set_float_handler (handler); | |
1989 | bcopy (&CONST_DOUBLE_LOW (const_arg0), &u, sizeof u); | |
1990 | arg0 = u.d; | |
1991 | ||
1992 | u.d = REAL_VALUE_NEGATE (arg0); | |
1993 | x = immed_real_const_1 (u.d, GET_MODE (x)); | |
1994 | set_float_handler (0); | |
1995 | return x; | |
1996 | } | |
1997 | #endif | |
1998 | else | |
1999 | return x; | |
2000 | } | |
2001 | else if (GET_RTX_LENGTH (code) == 2) | |
2002 | { | |
2003 | register int arg0, arg1, arg0s, arg1s; | |
2004 | int arithwidth = width; | |
2005 | ||
2006 | /* If 1st arg is the condition codes, 2nd must be zero | |
2007 | and this must be a comparison. | |
2008 | Decode the info on how the previous insn set the cc0 | |
2009 | and use that to deduce result of comparison. */ | |
2010 | if (XEXP (x, 0) == cc0_rtx | |
2011 | || GET_CODE (XEXP (x, 0)) == COMPARE) | |
2012 | { | |
2013 | if (XEXP (x, 0) == cc0_rtx) | |
2014 | arg0 = prev_insn_cc0; | |
2015 | else | |
2016 | arg0 = fold_cc0 (VOIDmode, XEXP (x, 0)); | |
2017 | ||
2018 | if (arg0 == 0 | |
2019 | || const_arg1 != const0_rtx | |
2020 | /* 0200 bit in arg0 means only zeroness is known, | |
2021 | and sign is not known. */ | |
2022 | || ((arg0 & 0200) != 0 && code != EQ && code != NE)) | |
2023 | return x; | |
2024 | ||
2025 | /* Extract either the signed or the unsigned digit from ARG0. */ | |
2026 | if (code == LEU || code == LTU || code == GEU || code == GTU) | |
2027 | arg0 = arg0 & 7; | |
2028 | else | |
2029 | arg0 = (arg0 >> 3) & 7; | |
2030 | if (arg0 == 7) arg0 = -1; | |
2031 | ||
2032 | switch (code) | |
2033 | { | |
2034 | case LE: | |
2035 | case LEU: | |
2036 | return (arg0 <= 0) ? const1_rtx : const0_rtx; | |
2037 | case LT: | |
2038 | case LTU: | |
2039 | return (arg0 < 0) ? const1_rtx : const0_rtx; | |
2040 | case GE: | |
2041 | case GEU: | |
2042 | return (arg0 >= 0) ? const1_rtx : const0_rtx; | |
2043 | case GT: | |
2044 | case GTU: | |
2045 | return (arg0 > 0) ? const1_rtx : const0_rtx; | |
2046 | case NE: | |
2047 | return (arg0 != 0) ? const1_rtx : const0_rtx; | |
2048 | case EQ: | |
2049 | return (arg0 == 0) ? const1_rtx : const0_rtx; | |
2050 | default: | |
2051 | abort (); | |
2052 | } | |
2053 | } | |
2054 | ||
2055 | if (const_arg0 == 0 || const_arg1 == 0 | |
2056 | || GET_CODE (const_arg0) != CONST_INT | |
2057 | || GET_CODE (const_arg1) != CONST_INT) | |
2058 | { | |
2059 | /* Even if we can't compute a constant result, | |
2060 | there are some cases worth simplifying. */ | |
2061 | /* Note that we cannot rely on constant args to come last, | |
2062 | even for commutative operators, | |
2063 | because that happens only when the constant is explicit. */ | |
2064 | switch (code) | |
2065 | { | |
2066 | case PLUS: | |
2067 | if (const_arg0 == const0_rtx | |
2068 | || const_arg0 == fconst0_rtx | |
2069 | || const_arg0 == dconst0_rtx) | |
2070 | return XEXP (x, 1); | |
2071 | if (const_arg1 == const0_rtx | |
2072 | || const_arg1 == fconst0_rtx | |
2073 | || const_arg1 == dconst0_rtx) | |
2074 | return XEXP (x, 0); | |
2075 | ||
2076 | /* Handle both-operands-constant cases. */ | |
2077 | if (const_arg0 != 0 && const_arg1 != 0 | |
2078 | && GET_CODE (const_arg0) != CONST_DOUBLE | |
2079 | && GET_CODE (const_arg1) != CONST_DOUBLE | |
2080 | && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) | |
2081 | { | |
2082 | if (GET_CODE (const_arg1) == CONST_INT) | |
2083 | new = plus_constant (const_arg0, INTVAL (const_arg1)); | |
2084 | else | |
2085 | { | |
2086 | new = gen_rtx (PLUS, GET_MODE (x), const0_rtx, const0_rtx); | |
2087 | XEXP (new, 0) = const_arg0; | |
2088 | if (GET_CODE (const_arg0) == CONST) | |
2089 | XEXP (new, 0) = XEXP (const_arg0, 0); | |
2090 | XEXP (new, 1) = const_arg1; | |
2091 | if (GET_CODE (const_arg1) == CONST) | |
2092 | XEXP (new, 1) = XEXP (const_arg1, 0); | |
2093 | new = gen_rtx (CONST, GET_MODE (new), new); | |
2094 | } | |
2095 | } | |
2096 | else if (const_arg1 != 0 | |
2097 | && GET_CODE (const_arg1) == CONST_INT | |
2098 | && GET_CODE (XEXP (x, 0)) == PLUS | |
2099 | && (CONSTANT_P (XEXP (XEXP (x, 0), 0)) | |
2100 | || CONSTANT_P (XEXP (XEXP (x, 0), 1)))) | |
2101 | /* constant + (variable + constant) | |
2102 | can result if an index register is made constant. | |
2103 | We simplify this by adding the constants. | |
2104 | If we did not, it would become an invalid address. */ | |
2105 | new = plus_constant (XEXP (x, 0), | |
2106 | INTVAL (const_arg1)); | |
2107 | break; | |
2108 | ||
2109 | case COMPARE: | |
2110 | if (const_arg1 == const0_rtx) | |
2111 | return XEXP (x, 0); | |
2112 | ||
2113 | if (XEXP (x, 0) == XEXP (x, 1) | |
2114 | || (const_arg0 != 0 && const_arg0 == const_arg1)) | |
2115 | { | |
2116 | /* We can't assume x-x is 0 with IEEE floating point. */ | |
2117 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) | |
2118 | return const0_rtx; | |
2119 | } | |
2120 | break; | |
2121 | ||
2122 | case MINUS: | |
2123 | if (const_arg1 == const0_rtx | |
2124 | || const_arg1 == fconst0_rtx | |
2125 | || const_arg1 == dconst0_rtx) | |
2126 | return XEXP (x, 0); | |
2127 | ||
2128 | if (XEXP (x, 0) == XEXP (x, 1) | |
2129 | || (const_arg0 != 0 && const_arg0 == const_arg1)) | |
2130 | { | |
2131 | /* We can't assume x-x is 0 with IEEE floating point. */ | |
2132 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) | |
2133 | return const0_rtx; | |
2134 | } | |
2135 | ||
2136 | /* Change subtraction from zero into negation. */ | |
2137 | if (const_arg0 == const0_rtx) | |
2138 | return gen_rtx (NEG, GET_MODE (x), XEXP (x, 1)); | |
2139 | ||
2140 | /* Don't let a relocatable value get a negative coeff. */ | |
2141 | if (const_arg0 != 0 && const_arg1 != 0 | |
2142 | && GET_CODE (const_arg1) == CONST_INT) | |
2143 | new = plus_constant (const_arg0, - INTVAL (const_arg1)); | |
2144 | break; | |
2145 | ||
2146 | case MULT: | |
2147 | case UMULT: | |
2148 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
2149 | && INTVAL (const_arg1) == -1 | |
2150 | /* Don't do this in the case of widening multiplication. */ | |
2151 | && GET_MODE (XEXP (x, 0)) == GET_MODE (x)) | |
2152 | return gen_rtx (NEG, GET_MODE (x), XEXP (x, 0)); | |
2153 | if (const_arg0 && GET_CODE (const_arg0) == CONST_INT | |
2154 | && INTVAL (const_arg0) == -1 | |
2155 | && GET_MODE (XEXP (x, 1)) == GET_MODE (x)) | |
2156 | return gen_rtx (NEG, GET_MODE (x), XEXP (x, 1)); | |
2157 | if (const_arg1 == const0_rtx || const_arg0 == const0_rtx) | |
2158 | new = const0_rtx; | |
2159 | if (const_arg1 == fconst0_rtx || const_arg0 == fconst0_rtx) | |
2160 | new = fconst0_rtx; | |
2161 | if (const_arg1 == dconst0_rtx || const_arg0 == dconst0_rtx) | |
2162 | new = dconst0_rtx; | |
2163 | if (const_arg1 == const1_rtx) | |
2164 | return XEXP (x, 0); | |
2165 | if (const_arg0 == const1_rtx) | |
2166 | return XEXP (x, 1); | |
2167 | break; | |
2168 | ||
2169 | case IOR: | |
2170 | if (const_arg1 == const0_rtx) | |
2171 | return XEXP (x, 0); | |
2172 | if (const_arg0 == const0_rtx) | |
2173 | return XEXP (x, 1); | |
2174 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
2175 | && (INTVAL (const_arg1) & GET_MODE_MASK (GET_MODE (x))) | |
2176 | == GET_MODE_MASK (GET_MODE (x))) | |
2177 | new = const_arg1; | |
2178 | if (const_arg0 && GET_CODE (const_arg0) == CONST_INT | |
2179 | && (INTVAL (const_arg0) & GET_MODE_MASK (GET_MODE (x))) | |
2180 | == GET_MODE_MASK (GET_MODE (x))) | |
2181 | new = const_arg0; | |
2182 | break; | |
2183 | ||
2184 | case XOR: | |
2185 | if (const_arg1 == const0_rtx) | |
2186 | return XEXP (x, 0); | |
2187 | if (const_arg0 == const0_rtx) | |
2188 | return XEXP (x, 1); | |
2189 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
2190 | && (INTVAL (const_arg1) & GET_MODE_MASK (GET_MODE (x))) | |
2191 | == GET_MODE_MASK (GET_MODE (x))) | |
2192 | return gen_rtx (NOT, GET_MODE (x), XEXP (x, 0)); | |
2193 | if (const_arg0 && GET_CODE (const_arg0) == CONST_INT | |
2194 | && (INTVAL (const_arg0) & GET_MODE_MASK (GET_MODE (x))) | |
2195 | == GET_MODE_MASK (GET_MODE (x))) | |
2196 | return gen_rtx (NOT, GET_MODE (x), XEXP (x, 1)); | |
2197 | break; | |
2198 | ||
2199 | case AND: | |
2200 | if (const_arg1 == const0_rtx || const_arg0 == const0_rtx) | |
2201 | new = const0_rtx; | |
2202 | if (const_arg1 && GET_CODE (const_arg1) == CONST_INT | |
2203 | && (INTVAL (const_arg1) & GET_MODE_MASK (GET_MODE (x))) | |
2204 | == GET_MODE_MASK (GET_MODE (x))) | |
2205 | return XEXP (x, 0); | |
2206 | if (const_arg0 && GET_CODE (const_arg0) == CONST_INT | |
2207 | && (INTVAL (const_arg0) & GET_MODE_MASK (GET_MODE (x))) | |
2208 | == GET_MODE_MASK (GET_MODE (x))) | |
2209 | return XEXP (x, 1); | |
2210 | break; | |
2211 | ||
2212 | case DIV: | |
2213 | case UDIV: | |
2214 | if (const_arg1 == const1_rtx) | |
2215 | return XEXP (x, 0); | |
2216 | if (const_arg0 == const0_rtx) | |
2217 | new = const0_rtx; | |
2218 | break; | |
2219 | ||
2220 | case UMOD: | |
2221 | case MOD: | |
2222 | if (const_arg0 == const0_rtx || const_arg1 == const1_rtx) | |
2223 | new = const0_rtx; | |
2224 | break; | |
2225 | ||
2226 | case LSHIFT: | |
2227 | case ASHIFT: | |
2228 | case ROTATE: | |
2229 | case ASHIFTRT: | |
2230 | case LSHIFTRT: | |
2231 | case ROTATERT: | |
2232 | if (const_arg1 == const0_rtx) | |
2233 | return XEXP (x, 0); | |
2234 | if (const_arg0 == const0_rtx) | |
2235 | new = const_arg0; | |
2236 | break; | |
2237 | } | |
2238 | ||
2239 | if (new != 0 && LEGITIMATE_CONSTANT_P (new)) | |
2240 | return new; | |
2241 | return x; | |
2242 | } | |
2243 | ||
2244 | if (arithwidth == 0) | |
2245 | { | |
2246 | if (GET_MODE (XEXP (x, 0)) != VOIDmode) | |
2247 | arithwidth = GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))); | |
2248 | if (GET_MODE (XEXP (x, 1)) != VOIDmode) | |
2249 | arithwidth = GET_MODE_BITSIZE (GET_MODE (XEXP (x, 1))); | |
2250 | } | |
2251 | ||
2252 | /* Get the integer argument values in two forms: | |
2253 | zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ | |
2254 | ||
2255 | arg0 = INTVAL (const_arg0); | |
2256 | arg1 = INTVAL (const_arg1); | |
2257 | ||
2258 | if (arithwidth < HOST_BITS_PER_INT && arithwidth > 0) | |
2259 | { | |
2260 | arg0 &= (1 << arithwidth) - 1; | |
2261 | arg1 &= (1 << arithwidth) - 1; | |
2262 | ||
2263 | arg0s = arg0; | |
2264 | if (arg0s & (1 << (arithwidth - 1))) | |
2265 | arg0s |= ((-1) << arithwidth); | |
2266 | ||
2267 | arg1s = arg1; | |
2268 | if (arg1s & (1 << (arithwidth - 1))) | |
2269 | arg1s |= ((-1) << arithwidth); | |
2270 | } | |
2271 | else | |
2272 | { | |
2273 | arg0s = arg0; | |
2274 | arg1s = arg1; | |
2275 | } | |
2276 | ||
2277 | /* Compute the value of the arithmetic. */ | |
2278 | ||
2279 | switch (code) | |
2280 | { | |
2281 | case PLUS: | |
2282 | val = arg0 + arg1; | |
2283 | break; | |
2284 | ||
2285 | case MINUS: | |
2286 | val = arg0 - arg1; | |
2287 | break; | |
2288 | ||
2289 | case MULT: | |
2290 | val = arg0s * arg1s; | |
2291 | break; | |
2292 | ||
2293 | case DIV: | |
2294 | if (arg1s == 0) | |
2295 | return x; | |
2296 | val = arg0s / arg1s; | |
2297 | break; | |
2298 | ||
2299 | case MOD: | |
2300 | if (arg1s == 0) | |
2301 | return x; | |
2302 | val = arg0s % arg1s; | |
2303 | break; | |
2304 | ||
2305 | case UMULT: | |
2306 | val = (unsigned) arg0 * arg1; | |
2307 | break; | |
2308 | ||
2309 | case UDIV: | |
2310 | if (arg1 == 0) | |
2311 | return x; | |
2312 | val = (unsigned) arg0 / arg1; | |
2313 | break; | |
2314 | ||
2315 | case UMOD: | |
2316 | if (arg1 == 0) | |
2317 | return x; | |
2318 | val = (unsigned) arg0 % arg1; | |
2319 | break; | |
2320 | ||
2321 | case AND: | |
2322 | val = arg0 & arg1; | |
2323 | break; | |
2324 | ||
2325 | case IOR: | |
2326 | val = arg0 | arg1; | |
2327 | break; | |
2328 | ||
2329 | case XOR: | |
2330 | val = arg0 ^ arg1; | |
2331 | break; | |
2332 | ||
2333 | case NE: | |
2334 | val = arg0 != arg1; | |
2335 | break; | |
2336 | ||
2337 | case EQ: | |
2338 | val = arg0 == arg1; | |
2339 | break; | |
2340 | ||
2341 | case LE: | |
2342 | val = arg0s <= arg1s; | |
2343 | break; | |
2344 | ||
2345 | case LT: | |
2346 | val = arg0s < arg1s; | |
2347 | break; | |
2348 | ||
2349 | case GE: | |
2350 | val = arg0s >= arg1s; | |
2351 | break; | |
2352 | ||
2353 | case GT: | |
2354 | val = arg0s > arg1s; | |
2355 | break; | |
2356 | ||
2357 | case LEU: | |
2358 | val = ((unsigned) arg0) <= ((unsigned) arg1); | |
2359 | break; | |
2360 | ||
2361 | case LTU: | |
2362 | val = ((unsigned) arg0) < ((unsigned) arg1); | |
2363 | break; | |
2364 | ||
2365 | case GEU: | |
2366 | val = ((unsigned) arg0) >= ((unsigned) arg1); | |
2367 | break; | |
2368 | ||
2369 | case GTU: | |
2370 | val = ((unsigned) arg0) > ((unsigned) arg1); | |
2371 | break; | |
2372 | ||
2373 | case LSHIFT: | |
2374 | /* If target machine uses negative shift counts | |
2375 | but host machine does not, simulate them. */ | |
2376 | if (arg1 < 0) | |
2377 | val = ((unsigned) arg0) >> -arg1; | |
2378 | else | |
2379 | val = ((unsigned) arg0) << arg1; | |
2380 | break; | |
2381 | ||
2382 | case ASHIFT: | |
2383 | if (arg1 < 0) | |
2384 | val = arg0s >> -arg1; | |
2385 | else | |
2386 | val = arg0s << arg1; | |
2387 | break; | |
2388 | ||
2389 | case ROTATERT: | |
2390 | arg1 = - arg1; | |
2391 | case ROTATE: | |
2392 | { | |
2393 | int size = GET_MODE_SIZE (GET_MODE (x)) * BITS_PER_UNIT; | |
2394 | if (arg1 > 0) | |
2395 | { | |
2396 | arg1 %= size; | |
2397 | val = ((((unsigned) arg0) << arg1) | |
2398 | | (((unsigned) arg0) >> (size - arg1))); | |
2399 | } | |
2400 | else if (arg1 < 0) | |
2401 | { | |
2402 | arg1 = (- arg1) % size; | |
2403 | val = ((((unsigned) arg0) >> arg1) | |
2404 | | (((unsigned) arg0) << (size - arg1))); | |
2405 | } | |
2406 | else | |
2407 | val = arg0; | |
2408 | } | |
2409 | break; | |
2410 | ||
2411 | case LSHIFTRT: | |
2412 | /* If target machine uses negative shift counts | |
2413 | but host machine does not, simulate them. */ | |
2414 | if (arg1 < 0) | |
2415 | val = ((unsigned) arg0) << -arg1; | |
2416 | else | |
2417 | val = ((unsigned) arg0) >> arg1; | |
2418 | break; | |
2419 | ||
2420 | case ASHIFTRT: | |
2421 | if (arg1 < 0) | |
2422 | val = arg0s << -arg1; | |
2423 | else | |
2424 | val = arg0s >> arg1; | |
2425 | break; | |
2426 | ||
2427 | default: | |
2428 | return x; | |
2429 | } | |
2430 | } | |
2431 | else if (code == IF_THEN_ELSE && const_arg0 != 0 | |
2432 | && GET_CODE (const_arg0) == CONST_INT) | |
2433 | return XEXP (x, ((INTVAL (const_arg0) != 0) ? 1 : 2)); | |
2434 | else if (code == IF_THEN_ELSE && XEXP (x, 0) == cc0_rtx | |
2435 | && prev_insn_explicit_cc0 != 0) | |
2436 | return XEXP (x, ((INTVAL (prev_insn_explicit_cc0) != 0) ? 1 : 2)); | |
2437 | else if (code == SIGN_EXTRACT || code == ZERO_EXTRACT) | |
2438 | { | |
2439 | if (const_arg0 != 0 && const_arg1 != 0 && const_arg2 != 0 | |
2440 | && GET_CODE (const_arg0) == CONST_INT | |
2441 | && GET_CODE (const_arg1) == CONST_INT | |
2442 | && GET_CODE (const_arg2) == CONST_INT) | |
2443 | { | |
2444 | /* Extracting a bit-field from a constant */ | |
2445 | val = INTVAL (const_arg0); | |
2446 | #ifdef BITS_BIG_ENDIAN | |
2447 | val >>= (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) | |
2448 | - INTVAL (const_arg2) - INTVAL (const_arg1)); | |
2449 | #else | |
2450 | val >>= INTVAL (const_arg2); | |
2451 | #endif | |
2452 | if (HOST_BITS_PER_INT != INTVAL (const_arg1)) | |
2453 | { | |
2454 | /* First zero-extend. */ | |
2455 | val &= (1 << INTVAL (const_arg1)) - 1; | |
2456 | /* If desired, propagate sign bit. */ | |
2457 | if (code == SIGN_EXTRACT | |
2458 | && (val & (1 << (INTVAL (const_arg1) - 1)))) | |
2459 | val |= ~ (1 << INTVAL (const_arg1)); | |
2460 | } | |
2461 | } | |
2462 | else | |
2463 | return x; | |
2464 | } | |
2465 | else | |
2466 | return x; | |
2467 | ||
2468 | /* Clear the bits that don't belong in our mode, | |
2469 | unless they and our sign bit are all one. | |
2470 | So we get either a reasonable negative value or a reasonable | |
2471 | unsigned value for this mode. */ | |
2472 | if (width < HOST_BITS_PER_INT && width > 0) | |
2473 | { | |
2474 | if ((val & ((-1) << (width - 1))) | |
2475 | != ((-1) << (width - 1))) | |
2476 | val &= (1 << width) - 1; | |
2477 | } | |
2478 | ||
2479 | /* Now make the new constant. */ | |
2480 | { | |
2481 | rtx new = gen_rtx (CONST_INT, VOIDmode, val); | |
2482 | return LEGITIMATE_CONSTANT_P (new) ? new : x; | |
2483 | } | |
2484 | } | |
2485 | \f | |
2486 | /* Return a constant value currently equivalent to X. | |
2487 | Return 0 if we don't know one. */ | |
2488 | ||
2489 | static rtx | |
2490 | equiv_constant (x) | |
2491 | rtx x; | |
2492 | { | |
2493 | rtx tem1; | |
2494 | ||
2495 | if (CONSTANT_P (x) || GET_CODE (x) == CONST_DOUBLE) | |
2496 | return x; | |
2497 | else if (GET_CODE (x) == REG | |
2498 | && (tem1 = qty_const[reg_qty[REGNO (x)]]) != 0 | |
2499 | /* Make sure it is really a constant */ | |
2500 | && GET_CODE (tem1) != REG && GET_CODE (tem1) != PLUS) | |
2501 | return tem1; | |
2502 | /* If integer truncation is being done with SUBREG, | |
2503 | we can compute the result. */ | |
2504 | else if (GET_CODE (x) == SUBREG && SUBREG_WORD (x) == 0 | |
2505 | && (tem1 = qty_const[reg_qty[REGNO (SUBREG_REG (x))]]) != 0 | |
2506 | /* Make sure it is a known integer. */ | |
2507 | && GET_CODE (tem1) == CONST_INT | |
2508 | && GET_MODE_SIZE (GET_MODE (x)) <= HOST_BITS_PER_INT | |
2509 | /* Make sure this SUBREG is truncation. */ | |
2510 | && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) | |
2511 | { | |
2512 | int value = INTVAL (tem1); | |
2513 | if (GET_MODE_BITSIZE (GET_MODE (x)) != HOST_BITS_PER_INT) | |
2514 | value &= (1 << GET_MODE_BITSIZE (GET_MODE (x))) - 1; | |
2515 | ||
2516 | if (value == INTVAL (tem1)) | |
2517 | return tem1; | |
2518 | else | |
2519 | return gen_rtx (CONST_INT, VOIDmode, value); | |
2520 | } | |
2521 | return 0; | |
2522 | } | |
2523 | \f | |
2524 | /* Given an expression X which is used to set CC0, | |
2525 | return an integer recording (in the encoding used for prev_insn_cc0) | |
2526 | how the condition codes would be set by that expression. | |
2527 | Return 0 if the value is not constant | |
2528 | or if there is any doubt what condition codes result from it. | |
2529 | ||
2530 | MODE is the machine mode to use to interpret X if it is a CONST_INT. */ | |
2531 | ||
2532 | static int | |
2533 | fold_cc0 (mode, x) | |
2534 | enum machine_mode mode; | |
2535 | rtx x; | |
2536 | { | |
2537 | if (GET_CODE (x) == COMPARE) | |
2538 | { | |
2539 | rtx y0 = fold_rtx (XEXP (x, 0), 0); | |
2540 | rtx y1 = fold_rtx (XEXP (x, 1), 0); | |
2541 | int u0, u1, s0, s1; | |
2542 | enum machine_mode m; | |
2543 | rtx tem; | |
2544 | ||
2545 | m = GET_MODE (y0); | |
2546 | if (m == VOIDmode) | |
2547 | m = GET_MODE (y1); | |
2548 | if (m == VOIDmode) | |
2549 | return 0; | |
2550 | ||
2551 | tem = equiv_constant (y0); | |
2552 | if (tem != 0) | |
2553 | y0 = tem; | |
2554 | ||
2555 | if (y0 == 0) | |
2556 | return 0; | |
2557 | ||
2558 | tem = equiv_constant (y1); | |
2559 | if (tem != 0) | |
2560 | y1 = tem; | |
2561 | ||
2562 | if (y1 == 0) | |
2563 | return 0; | |
2564 | ||
2565 | /* Compare floats; report the result only for signed compares | |
2566 | since that's all there are for floats. */ | |
2567 | if (GET_CODE (y0) == CONST_DOUBLE | |
2568 | && GET_CODE (y1) == CONST_DOUBLE | |
2569 | && GET_MODE_CLASS (GET_MODE (y0)) == MODE_FLOAT) | |
2570 | { | |
2571 | union real_extract u0, u1; | |
2572 | int value; | |
2573 | jmp_buf handler; | |
2574 | ||
2575 | if (setjmp (handler)) | |
2576 | { | |
2577 | warning ("floating point trap in constant folding"); | |
2578 | return 0; | |
2579 | } | |
2580 | set_float_handler (handler); | |
2581 | bcopy (&CONST_DOUBLE_LOW (y0), &u0, sizeof u0); | |
2582 | bcopy (&CONST_DOUBLE_LOW (y1), &u1, sizeof u1); | |
2583 | value = 0100 + (REAL_VALUES_LESS (u0.d, u1.d) ? 7 << 3 | |
2584 | : REAL_VALUES_LESS (u1.d, u0.d) ? 1 << 3 : 0); | |
2585 | set_float_handler (0); | |
2586 | return value; | |
2587 | } | |
2588 | ||
2589 | /* Aside from that, demand explicit integers. */ | |
2590 | ||
2591 | if (GET_CODE (y0) != CONST_INT) | |
2592 | return 0; | |
2593 | ||
2594 | if (GET_CODE (y1) != CONST_INT) | |
2595 | return 0; | |
2596 | ||
2597 | s0 = u0 = INTVAL (y0); | |
2598 | s1 = u1 = INTVAL (y1); | |
2599 | ||
2600 | { | |
2601 | int width = GET_MODE_BITSIZE (m); | |
2602 | if (width < HOST_BITS_PER_INT) | |
2603 | { | |
2604 | s0 = u0 &= ~ ((-1) << width); | |
2605 | s1 = u1 &= ~ ((-1) << width); | |
2606 | if (u0 & (1 << (width - 1))) | |
2607 | s0 |= ((-1) << width); | |
2608 | if (u1 & (1 << (width - 1))) | |
2609 | s1 |= ((-1) << width); | |
2610 | } | |
2611 | } | |
2612 | ||
2613 | return 0100 + ((s0 < s1 ? 7 : s0 > s1) << 3) | |
2614 | + (((unsigned) u0 < (unsigned) u1) ? 7 | |
2615 | : ((unsigned) u0 > (unsigned) u1)); | |
2616 | } | |
2617 | { | |
2618 | rtx y0; | |
2619 | int u0, s0; | |
2620 | enum machine_mode m; | |
2621 | ||
2622 | y0 = fold_rtx (x, 0); | |
2623 | ||
2624 | m = GET_MODE (y0); | |
2625 | if (m == VOIDmode) | |
2626 | m = mode; | |
2627 | ||
2628 | if (GET_CODE (y0) == REG) | |
2629 | y0 = qty_const[reg_qty[REGNO (y0)]]; | |
2630 | ||
2631 | /* Register had no constant equivalent? We can't do anything. */ | |
2632 | if (y0 == 0) | |
2633 | return 0; | |
2634 | ||
2635 | /* If we don't know the mode, we can't test the sign. */ | |
2636 | if (m == VOIDmode) | |
2637 | return 0; | |
2638 | ||
2639 | /* Value is frame-pointer plus a constant? Or non-explicit constant? | |
2640 | That isn't zero, but we don't know its sign. */ | |
2641 | if (FIXED_BASE_PLUS_P (y0) | |
2642 | || GET_CODE (y0) == SYMBOL_REF || GET_CODE (y0) == CONST | |
2643 | || GET_CODE (y0) == LABEL_REF) | |
2644 | return 0300 + (1<<3) + 1; | |
2645 | ||
2646 | /* Otherwise, only integers enable us to optimize. */ | |
2647 | if (GET_CODE (y0) != CONST_INT) | |
2648 | return 0; | |
2649 | ||
2650 | s0 = u0 = INTVAL (y0); | |
2651 | { | |
2652 | int width = GET_MODE_BITSIZE (m); | |
2653 | if (width < HOST_BITS_PER_INT) | |
2654 | { | |
2655 | s0 = u0 &= ~ ((-1) << GET_MODE_BITSIZE (m)); | |
2656 | if (u0 & (1 << (GET_MODE_BITSIZE (m) - 1))) | |
2657 | s0 |= ((-1) << GET_MODE_BITSIZE (m)); | |
2658 | } | |
2659 | } | |
2660 | return 0100 + ((s0 < 0 ? 7 : s0 > 0) << 3) + (u0 != 0); | |
2661 | } | |
2662 | } | |
2663 | \f | |
2664 | /* Attempt to prove that a loop will be executed >= 1 times, | |
2665 | or prove it will be executed 0 times. | |
2666 | If either can be proved, delete some of the code. */ | |
2667 | ||
2668 | static void | |
2669 | predecide_loop_entry (insn) | |
2670 | register rtx insn; | |
2671 | { | |
2672 | register rtx jump = NEXT_INSN (insn); | |
2673 | register rtx p; | |
2674 | register rtx loop_top_label = NEXT_INSN (jump); | |
2675 | enum anon1 { UNK, DELETE_LOOP, DELETE_JUMP } disposition = UNK; | |
2676 | int count = 0; | |
2677 | ||
2678 | /* Give up if we don't find a jump that enters the loop. */ | |
2679 | if (! simplejump_p (jump)) | |
2680 | return; | |
2681 | ||
2682 | /* Find the label at the top of the loop. */ | |
2683 | while (GET_CODE (loop_top_label) == BARRIER | |
2684 | || GET_CODE (loop_top_label) == NOTE) | |
2685 | { | |
2686 | loop_top_label = NEXT_INSN (loop_top_label); | |
2687 | /* No label? Give up. */ | |
2688 | if (loop_top_label == 0) | |
2689 | return; | |
2690 | } | |
2691 | if (GET_CODE (loop_top_label) != CODE_LABEL) | |
2692 | abort (); | |
2693 | ||
2694 | /* Find the label at which the loop is entered. */ | |
2695 | p = XEXP (SET_SRC (PATTERN (jump)), 0); | |
2696 | if (GET_CODE (p) != CODE_LABEL) | |
2697 | abort (); | |
2698 | ||
2699 | /* Trace the flow of control through the end test, | |
2700 | propagating constants, to see if result is determined. */ | |
2701 | prev_insn_cc0 = 0; | |
2702 | prev_insn_explicit_cc0 = 0; | |
2703 | /* Avoid infinite loop if we find a cycle of jumps. */ | |
2704 | while (count < 10) | |
2705 | { | |
2706 | /* At end of function? Means rtl is inconsistent, | |
2707 | but this can happen when stmt.c gets confused | |
2708 | by a syntax error. */ | |
2709 | if (p == 0) | |
2710 | break; | |
2711 | /* Arriving at end of loop means endtest will drop out. */ | |
2712 | if (GET_CODE (p) == NOTE | |
2713 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
2714 | { | |
2715 | disposition = DELETE_LOOP; | |
2716 | break; | |
2717 | } | |
2718 | else if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == NOTE) | |
2719 | ; | |
2720 | /* We only know how to handle two kinds of insns: | |
2721 | conditional jumps, and those that set the condition codes. */ | |
2722 | else if (GET_CODE (p) == INSN && GET_CODE (PATTERN (p)) == SET | |
2723 | && SET_DEST (PATTERN (p)) == cc0_rtx) | |
2724 | { | |
2725 | prev_insn_cc0 = fold_cc0 (GET_MODE (SET_SRC (PATTERN (p))), | |
2726 | copy_rtx (SET_SRC (PATTERN (p)))); | |
2727 | if (GET_CODE (SET_SRC (PATTERN (p))) == CONST_INT) | |
2728 | prev_insn_explicit_cc0 = SET_SRC (PATTERN (p)); | |
2729 | } | |
2730 | else if (GET_CODE (p) == JUMP_INSN | |
2731 | && GET_CODE (PATTERN (p)) == SET | |
2732 | && SET_DEST (PATTERN (p)) == pc_rtx) | |
2733 | { | |
2734 | register rtx target | |
2735 | = fold_rtx (SET_SRC (PATTERN (p)), 1); | |
2736 | if (GET_CODE (target) == LABEL_REF) | |
2737 | p = XEXP (target, 0); | |
2738 | else if (target != pc_rtx) | |
2739 | /* If destination of jump is not fixed, give up. */ | |
2740 | break; | |
2741 | count++; | |
2742 | } | |
2743 | /* Any other kind of insn means we don't know | |
2744 | what result the test will have. */ | |
2745 | else | |
2746 | break; | |
2747 | ||
2748 | /* Arriving at top of loop means we can drop straight in. | |
2749 | Check here because we can arrive only via a jump insn | |
2750 | which would have changed P above. */ | |
2751 | if (p == loop_top_label) | |
2752 | { | |
2753 | disposition = DELETE_JUMP; | |
2754 | break; | |
2755 | } | |
2756 | /* We went past one insn; consider the next. */ | |
2757 | p = NEXT_INSN (p); | |
2758 | } | |
2759 | if (disposition == DELETE_JUMP) | |
2760 | { | |
2761 | /* We know the loop test will succeed the first time, | |
2762 | so delete the jump to the test; drop right into loop. | |
2763 | Note that one call to delete_insn gets the BARRIER as well. */ | |
2764 | delete_insn (jump); | |
2765 | } | |
2766 | if (disposition == DELETE_LOOP) | |
2767 | { | |
2768 | /* We know the endtest will fail and drop right out of the loop, | |
2769 | but it isn't safe to delete the loop here. | |
2770 | There could be jumps into it from outside. | |
2771 | So make the entry-jump jump around the loop. | |
2772 | This will cause find_basic_blocks to delete it if appropriate. */ | |
2773 | register rtx label = gen_label_rtx (); | |
2774 | emit_label_after (label, p); | |
2775 | redirect_jump (jump, label); | |
2776 | } | |
2777 | } | |
2778 | \f | |
2779 | /* CSE processing for one instruction. | |
2780 | First simplify sources and addresses of all assignments | |
2781 | in the instruction, using previously-computed equivalents values. | |
2782 | Then install the new sources and destinations in the table | |
2783 | of available values. */ | |
2784 | ||
2785 | /* Data on one SET contained in the instruction. */ | |
2786 | ||
2787 | struct set | |
2788 | { | |
2789 | /* The SET rtx itself. */ | |
2790 | rtx rtl; | |
2791 | /* The hash-table element for the SET_SRC of the SET. */ | |
2792 | struct table_elt *src_elt; | |
2793 | /* Hash code for the SET_SRC. */ | |
2794 | int src_hash_code; | |
2795 | /* Hash code for the SET_DEST. */ | |
2796 | int dest_hash_code; | |
2797 | /* The SET_DEST, with SUBREG, etc., stripped. */ | |
2798 | rtx inner_dest; | |
2799 | /* Place where the pointer to the INNER_DEST was found. */ | |
2800 | rtx *inner_dest_loc; | |
2801 | /* Nonzero if the SET_SRC is in memory. */ | |
2802 | char src_in_memory; | |
2803 | /* Nonzero if the SET_SRC is in a structure. */ | |
2804 | char src_in_struct; | |
2805 | /* Nonzero if the SET_SRC contains something | |
2806 | whose value cannot be predicted and understood. */ | |
2807 | char src_volatile; | |
2808 | /* Original machine mode, in case it becomes a CONST_INT. */ | |
2809 | enum machine_mode mode; | |
2810 | }; | |
2811 | ||
2812 | static void | |
2813 | cse_insn (insn) | |
2814 | rtx insn; | |
2815 | { | |
2816 | register rtx x = PATTERN (insn); | |
2817 | register int i; | |
2818 | register int n_sets = 0; | |
2819 | ||
2820 | /* Records what this insn does to set CC0, | |
2821 | using same encoding used for prev_insn_cc0. */ | |
2822 | int this_insn_cc0 = 0; | |
2823 | /* Likewise, what to store in prev_insn_explicit_cc0. */ | |
2824 | rtx this_insn_explicit_cc0 = 0; | |
2825 | struct write_data writes_memory; | |
2826 | static struct write_data init = {0, 0, 0}; | |
2827 | ||
2828 | rtx src_eqv = 0; | |
2829 | struct table_elt *src_eqv_elt = 0; | |
2830 | int src_eqv_in_memory; | |
2831 | int src_eqv_in_struct; | |
2832 | int src_eqv_hash_code; | |
2833 | ||
2834 | struct set *sets; | |
2835 | ||
2836 | this_insn = insn; | |
2837 | writes_memory = init; | |
2838 | ||
2839 | /* Find all the SETs and CLOBBERs in this instruction. | |
2840 | Record all the SETs in the array `set' and count them. | |
2841 | Also determine whether there is a CLOBBER that invalidates | |
2842 | all memory references, or all references at varying addresses. */ | |
2843 | ||
2844 | if (GET_CODE (x) == SET) | |
2845 | { | |
2846 | rtx tem; | |
2847 | n_sets = 1; | |
2848 | sets = (struct set *) alloca (sizeof (struct set)); | |
2849 | sets[0].rtl = x; | |
2850 | ||
2851 | if (REG_NOTES (insn) != 0) | |
2852 | { | |
2853 | /* Store the equivalent value (re REG_EQUAL or REG_EQUIV) in SRC_EQV. */ | |
2854 | tem = find_reg_note (insn, REG_EQUIV, 0); | |
2855 | if (tem == 0) | |
2856 | tem = find_reg_note (insn, REG_EQUAL, 0); | |
2857 | if (tem) src_eqv = XEXP (tem, 0); | |
2858 | ||
2859 | /* Ignore the REG_EQUAL or REG_EQUIV note if its contents | |
2860 | are the same as the source. */ | |
2861 | if (src_eqv && rtx_equal_p (src_eqv, SET_SRC (x))) | |
2862 | src_eqv = 0; | |
2863 | } | |
2864 | ||
2865 | /* Return now for unconditional jumps. | |
2866 | They never need cse processing, so this does not hurt. | |
2867 | The reason is not efficiency but rather | |
2868 | so that we can test at the end for instructions | |
2869 | that have been simplified to unconditional jumps | |
2870 | and not be misled by unchanged instructions | |
2871 | that were unconditional jumps to begin with. */ | |
2872 | if (SET_DEST (x) == pc_rtx | |
2873 | && GET_CODE (SET_SRC (x)) == LABEL_REF) | |
2874 | return; | |
2875 | ||
2876 | /* Return now for call-insns, (set (reg 0) (call ...)). | |
2877 | The hard function value register is used only once, to copy to | |
2878 | someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! */ | |
2879 | if (GET_CODE (SET_SRC (x)) == CALL) | |
2880 | { | |
2881 | canon_reg (SET_SRC (x)); | |
2882 | return; | |
2883 | } | |
2884 | } | |
2885 | else if (GET_CODE (x) == PARALLEL) | |
2886 | { | |
2887 | register int lim = XVECLEN (x, 0); | |
2888 | ||
2889 | sets = (struct set *) alloca (lim * sizeof (struct set)); | |
2890 | ||
2891 | /* Find all regs explicitly clobbered in this insn, | |
2892 | and ensure they are not replaced with any other regs | |
2893 | elsewhere in this insn. | |
2894 | When a reg that is clobbered is also used for input, | |
2895 | we should presume that that is for a reason, | |
2896 | and we should not substitute some other register | |
2897 | which is not supposed to be clobbered. */ | |
2898 | for (i = 0; i < lim; i++) | |
2899 | { | |
2900 | register rtx y = XVECEXP (x, 0, i); | |
2901 | if (GET_CODE (y) == CLOBBER && GET_CODE (XEXP (y, 0)) == REG) | |
2902 | invalidate (XEXP (y, 0)); | |
2903 | } | |
2904 | ||
2905 | for (i = 0; i < lim; i++) | |
2906 | { | |
2907 | register rtx y = XVECEXP (x, 0, i); | |
2908 | if (GET_CODE (y) == SET) | |
2909 | sets[n_sets++].rtl = y; | |
2910 | else if (GET_CODE (y) == CLOBBER) | |
2911 | { | |
2912 | /* If we clobber memory, take note of that, | |
2913 | and canon the address. | |
2914 | This does nothing when a register is clobbered | |
2915 | because we have already invalidated the reg. */ | |
2916 | canon_reg (y); | |
2917 | note_mem_written (XEXP (y, 0), &writes_memory); | |
2918 | } | |
2919 | else if (GET_CODE (y) == USE | |
2920 | && ! (GET_CODE (XEXP (y, 0)) == REG | |
2921 | && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) | |
2922 | canon_reg (y); | |
2923 | else if (GET_CODE (y) == CALL) | |
2924 | canon_reg (y); | |
2925 | } | |
2926 | } | |
2927 | else if (GET_CODE (x) == CLOBBER) | |
2928 | note_mem_written (XEXP (x, 0), &writes_memory); | |
2929 | else if (GET_CODE (x) == CALL) | |
2930 | canon_reg (x); | |
2931 | ||
2932 | if (n_sets == 0) | |
2933 | { | |
2934 | invalidate_from_clobbers (&writes_memory, x); | |
2935 | return; | |
2936 | } | |
2937 | ||
2938 | /* Canonicalize sources and addresses of destinations. | |
2939 | set sets[i].src_elt to the class each source belongs to. | |
2940 | Detect assignments from or to volatile things | |
2941 | and set set[i] to zero so they will be ignored | |
2942 | in the rest of this function. | |
2943 | ||
2944 | Nothing in this loop changes the hash table or the register chains. */ | |
2945 | ||
2946 | for (i = 0; i < n_sets; i++) | |
2947 | { | |
2948 | register rtx src, dest; | |
2949 | register struct table_elt *elt; | |
2950 | enum machine_mode mode; | |
2951 | ||
2952 | dest = SET_DEST (sets[i].rtl); | |
2953 | src = SET_SRC (sets[i].rtl); | |
2954 | ||
2955 | /* If SRC is a constant that has no machine mode, | |
2956 | hash it with the destination's machine mode. | |
2957 | This way we can keep different modes separate. */ | |
2958 | ||
2959 | mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
2960 | sets[i].mode = mode; | |
2961 | ||
2962 | /* Replace each registers in SRC with oldest equivalent register, | |
2963 | but if DEST is a register do not replace it if it appears in SRC. */ | |
2964 | ||
2965 | if (GET_CODE (dest) == REG) | |
2966 | { | |
2967 | int tem = reg_qty[REGNO (dest)]; | |
2968 | reg_qty[REGNO (dest)] = REGNO (dest); | |
2969 | src = canon_reg (src); | |
2970 | ||
2971 | if (src_eqv) | |
2972 | src_eqv = canon_reg (src_eqv); | |
2973 | ||
2974 | reg_qty[REGNO (dest)] = tem; | |
2975 | } | |
2976 | else | |
2977 | { | |
2978 | src = canon_reg (src); | |
2979 | ||
2980 | if (src_eqv) | |
2981 | src_eqv = canon_reg (src_eqv); | |
2982 | } | |
2983 | ||
2984 | if (src_eqv) | |
2985 | { | |
2986 | enum machine_mode eqvmode = mode; | |
2987 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
2988 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
2989 | do_not_record = 0; | |
2990 | hash_arg_in_memory = 0; | |
2991 | hash_arg_in_struct = 0; | |
2992 | src_eqv = fold_rtx (src_eqv, 0); | |
2993 | src_eqv_hash_code = HASH (src_eqv, eqvmode); | |
2994 | ||
2995 | /* Replace the src_eqv with its cheapest equivalent. */ | |
2996 | ||
2997 | if (!do_not_record) | |
2998 | { | |
2999 | elt = lookup (src_eqv, src_eqv_hash_code, eqvmode); | |
3000 | if (elt && elt != elt->first_same_value) | |
3001 | { | |
3002 | elt = elt->first_same_value; | |
3003 | /* Find the cheapest one that is still valid. */ | |
3004 | while ((GET_CODE (elt->exp) != REG | |
3005 | && !exp_equiv_p (elt->exp, elt->exp, 1)) | |
3006 | || elt->equivalence_only) | |
3007 | elt = elt->next_same_value; | |
3008 | src_eqv = copy_rtx (elt->exp); | |
3009 | hash_arg_in_memory = 0; | |
3010 | hash_arg_in_struct = 0; | |
3011 | src_eqv_hash_code = HASH (src_eqv, elt->mode); | |
3012 | } | |
3013 | src_eqv_elt = elt; | |
3014 | } | |
3015 | else | |
3016 | src_eqv = 0; | |
3017 | ||
3018 | src_eqv_in_memory = hash_arg_in_memory; | |
3019 | src_eqv_in_struct = hash_arg_in_struct; | |
3020 | } | |
3021 | ||
3022 | /* Compute SRC's hash code, and also notice if it | |
3023 | should not be recorded at all. In that case, | |
3024 | prevent any further processing of this assignment. */ | |
3025 | do_not_record = 0; | |
3026 | hash_arg_in_memory = 0; | |
3027 | hash_arg_in_struct = 0; | |
3028 | src = fold_rtx (src, 0); | |
3029 | /* If SRC is a subreg of a reg with a known value, | |
3030 | perform the truncation now. */ | |
3031 | if (GET_CODE (src) == SUBREG) | |
3032 | { | |
3033 | rtx temp = equiv_constant (src); | |
3034 | if (temp) | |
3035 | src = temp; | |
3036 | } | |
3037 | /* If we have (NOT Y), see if Y is known to be (NOT Z). | |
3038 | If so, (NOT Y) simplifies to Z. */ | |
3039 | if (GET_CODE (src) == NOT || GET_CODE (src) == NEG) | |
3040 | { | |
3041 | rtx y = lookup_as_function (XEXP (src, 0), GET_CODE (src)); | |
3042 | if (y != 0) | |
3043 | src = copy_rtx (XEXP (y, 0)); | |
3044 | } | |
3045 | ||
3046 | /* If storing a constant value in a register that | |
3047 | previously held the constant value 0, | |
3048 | record this fact with a REG_WAS_0 note on this insn. */ | |
3049 | if (GET_CODE (src) == CONST_INT | |
3050 | && GET_CODE (dest) == REG | |
3051 | && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) | |
3052 | REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, | |
3053 | qty_const_insn[reg_qty[REGNO (dest)]], | |
3054 | REG_NOTES (insn)); | |
3055 | ||
3056 | sets[i].src_hash_code = HASH (src, mode); | |
3057 | ||
3058 | sets[i].src_volatile = do_not_record; | |
3059 | ||
3060 | #if 0 | |
3061 | /* This code caused multiple hash-table entries | |
3062 | to be created for registers. Invalidation | |
3063 | would only get one, leaving others that didn't belong. | |
3064 | I don't know what good this ever did. */ | |
3065 | if (GET_CODE (src) == REG) | |
3066 | { | |
3067 | sets[i].src_in_memory = 0; | |
3068 | sets[i].src_elt = 0; | |
3069 | } | |
3070 | else ...; | |
3071 | #endif | |
3072 | /* If source is a perverse subreg (such as QI treated as an SI), | |
3073 | treat it as volatile. It may do the work of an SI in one context | |
3074 | where the extra bits are not being used, but cannot replace an SI | |
3075 | in general. */ | |
3076 | if (GET_CODE (src) == SUBREG | |
3077 | && (GET_MODE_SIZE (GET_MODE (src)) | |
3078 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) | |
3079 | sets[i].src_volatile = 1; | |
3080 | else if (!sets[i].src_volatile) | |
3081 | { | |
3082 | /* Replace the source with its cheapest equivalent. */ | |
3083 | ||
3084 | elt = lookup (src, sets[i].src_hash_code, mode); | |
3085 | if (elt && elt != elt->first_same_value) | |
3086 | { | |
3087 | elt = elt->first_same_value; | |
3088 | /* Find the cheapest one that is still valid. */ | |
3089 | while ((GET_CODE (elt->exp) != REG | |
3090 | && !exp_equiv_p (elt->exp, elt->exp, 1)) | |
3091 | || elt->equivalence_only) | |
3092 | elt = elt->next_same_value; | |
3093 | /* Don't replace with things that are not likely to be valid, | |
3094 | such as arithmetic expressions, unless the destination is | |
3095 | a register. */ | |
3096 | if (general_operand (elt->exp, VOIDmode) | |
3097 | || GET_CODE (dest) == REG) | |
3098 | { | |
3099 | src = copy_rtx (elt->exp); | |
3100 | hash_arg_in_memory = 0; | |
3101 | hash_arg_in_struct = 0; | |
3102 | sets[i].src_hash_code = HASH (src, elt->mode); | |
3103 | } | |
3104 | } | |
3105 | ||
3106 | /* If ELT is a constant, is there a register | |
3107 | linearly related to it? If so, replace it | |
3108 | with the sum of that register plus an offset. */ | |
3109 | ||
3110 | if (GET_CODE (src) == CONST && n_sets == 1 | |
3111 | && SET_DEST (sets[i].rtl) != cc0_rtx) | |
3112 | { | |
3113 | rtx newsrc = use_related_value (src, elt); | |
3114 | if (newsrc == 0 && src_eqv != 0) | |
3115 | newsrc = use_related_value (src_eqv, src_eqv_elt); | |
3116 | if (newsrc) | |
3117 | { | |
3118 | rtx oldsrc = src; | |
3119 | src = newsrc; | |
3120 | hash_arg_in_memory = 0; | |
3121 | hash_arg_in_struct = 0; | |
3122 | sets[i].src_hash_code = HASH (src, GET_MODE (src)); | |
3123 | /* The new expression for the SRC has the same value | |
3124 | as the previous one; so if the previous one is in | |
3125 | the hash table, put the new one in as equivalent. */ | |
3126 | if (elt != 0) | |
3127 | elt = insert (src, elt->first_same_value, sets[i].src_hash_code, | |
3128 | elt->mode); | |
3129 | else | |
3130 | { | |
3131 | /* Maybe the new expression is in the table already. */ | |
3132 | elt = lookup (src, sets[i].src_hash_code, mode); | |
3133 | /* And maybe a register contains the same value. */ | |
3134 | if (elt && elt != elt->first_same_value) | |
3135 | { | |
3136 | elt = elt->first_same_value; | |
3137 | /* Find the cheapest one that is still valid. */ | |
3138 | while ((GET_CODE (elt->exp) != REG | |
3139 | && !exp_equiv_p (elt->exp, elt->exp, 1)) | |
3140 | || elt->equivalence_only) | |
3141 | elt = elt->next_same_value; | |
3142 | src = copy_rtx (elt->exp); | |
3143 | hash_arg_in_memory = 0; | |
3144 | hash_arg_in_struct = 0; | |
3145 | sets[i].src_hash_code = HASH (src, elt->mode); | |
3146 | } | |
3147 | } | |
3148 | ||
3149 | /* This would normally be inhibited by the REG_EQUIV | |
3150 | note we are about to make. */ | |
3151 | #if 0 | |
3152 | /* Deleted because the inhibition was deleted. */ | |
3153 | SET_SRC (sets[i].rtl) = src; | |
3154 | #endif | |
3155 | ||
3156 | /* Record the actual constant value | |
3157 | in a REG_EQUIV or REG_EQUAL note. */ | |
3158 | if (GET_CODE (SET_DEST (sets[i].rtl)) == REG) | |
3159 | { | |
3160 | /* A REG_EQUIV note means the dest never changes. | |
3161 | Don't put one on unless there is already one. */ | |
3162 | rtx note = find_reg_note (insn, REG_EQUIV, 0); | |
3163 | if (note != 0) | |
3164 | XEXP (note, 0) = oldsrc; | |
3165 | else | |
3166 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, | |
3167 | oldsrc, REG_NOTES (insn)); | |
3168 | } | |
3169 | } | |
3170 | } | |
3171 | ||
3172 | sets[i].src_elt = elt; | |
3173 | sets[i].src_in_memory = hash_arg_in_memory; | |
3174 | sets[i].src_in_struct = hash_arg_in_struct; | |
3175 | } | |
3176 | ||
3177 | /* Either canon_reg or the copy_rtx may have changed this. */ | |
3178 | /* Note it is not safe to replace the sources if there | |
3179 | is more than one set. We could get an insn | |
3180 | [(set (reg) (reg)) (set (reg) (reg))], which is probably | |
3181 | not in the machine description. | |
3182 | This case we could handle by breaking into several insns. | |
3183 | Cases of partial substitution cannot win at all. */ | |
3184 | /* Also, if this insn is setting a "constant" register, | |
3185 | we may not replace the value that is given to it. */ | |
3186 | if (n_sets == 1) | |
3187 | #if 0 | |
3188 | /* Now that the REG_EQUIV contains the constant instead of the reg, | |
3189 | it should be ok to modify the insn's actual source. */ | |
3190 | if (REG_NOTES (insn) == 0 | |
3191 | || REG_NOTE_KIND (REG_NOTES (insn)) != REG_EQUIV) | |
3192 | #endif | |
3193 | SET_SRC (sets[0].rtl) = src; | |
3194 | ||
3195 | do_not_record = 0; | |
3196 | sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); | |
3197 | ||
3198 | /* Look within any SIGN_EXTRACT or ZERO_EXTRACT | |
3199 | to the MEM or REG within it. */ | |
3200 | while (1) | |
3201 | { | |
3202 | if (GET_CODE (dest) == SIGN_EXTRACT | |
3203 | || GET_CODE (dest) == ZERO_EXTRACT) | |
3204 | { | |
3205 | XEXP (dest, 1) = canon_reg (XEXP (dest, 1)); | |
3206 | XEXP (dest, 2) = canon_reg (XEXP (dest, 2)); | |
3207 | sets[i].inner_dest_loc = &XEXP (dest, 0); | |
3208 | dest = XEXP (dest, 0); | |
3209 | } | |
3210 | else if (GET_CODE (dest) == SUBREG | |
3211 | || GET_CODE (dest) == STRICT_LOW_PART) | |
3212 | { | |
3213 | sets[i].inner_dest_loc = &XEXP (dest, 0); | |
3214 | dest = XEXP (dest, 0); | |
3215 | } | |
3216 | else | |
3217 | break; | |
3218 | } | |
3219 | ||
3220 | sets[i].inner_dest = dest; | |
3221 | ||
3222 | /* If storing into memory, do cse on the memory address. | |
3223 | Also compute the hash code of the destination now, | |
3224 | before the effects of this instruction are recorded, | |
3225 | since the register values used in the address computation | |
3226 | are those before this instruction. */ | |
3227 | if (GET_CODE (dest) == MEM) | |
3228 | { | |
3229 | register rtx addr; | |
3230 | register int hash; | |
3231 | ||
3232 | canon_reg (dest); | |
3233 | dest = fold_rtx (dest, 0); | |
3234 | addr = XEXP (dest, 0); | |
3235 | ||
3236 | /* Pushing or popping does not invalidate anything. */ | |
3237 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
3238 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
3239 | && GET_CODE (XEXP (addr, 0)) == REG | |
3240 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
3241 | ; | |
3242 | else | |
3243 | /* Otherwise, decide whether we invalidate | |
3244 | everything in memory, or just things at non-fixed places. | |
3245 | Writing a large aggregate must invalidate everything | |
3246 | because we don't know how long it is. */ | |
3247 | note_mem_written (dest, &writes_memory); | |
3248 | ||
3249 | /* Do not try to replace addresses of local and argument slots. | |
3250 | The MEM expressions for args and non-register local variables | |
3251 | are made only once and inserted in many instructions, | |
3252 | as well as being used to control symbol table output. | |
3253 | It is not safe to clobber them. It also doesn't do any good! */ | |
3254 | if ((GET_CODE (addr) == PLUS | |
3255 | && GET_CODE (XEXP (addr, 0)) == REG | |
3256 | && GET_CODE (XEXP (addr, 1)) == CONST_INT | |
3257 | && (hash = REGNO (XEXP (addr, 0)), | |
3258 | hash == FRAME_POINTER_REGNUM || hash == ARG_POINTER_REGNUM)) | |
3259 | || (GET_CODE (addr) == REG | |
3260 | && (hash = REGNO (addr), | |
3261 | hash == FRAME_POINTER_REGNUM || hash == ARG_POINTER_REGNUM))) | |
3262 | sets[i].dest_hash_code = ((int)MEM + canon_hash (addr, GET_MODE (dest))) % NBUCKETS; | |
3263 | else | |
3264 | { | |
3265 | /* Look for a simpler equivalent for the destination address. */ | |
3266 | hash = HASH (addr, Pmode); | |
3267 | if (! do_not_record) | |
3268 | { | |
3269 | elt = lookup (addr, hash, Pmode); | |
3270 | sets[i].dest_hash_code = ((int) MEM + hash) % NBUCKETS; | |
3271 | ||
3272 | if (elt && elt != elt->first_same_value) | |
3273 | { | |
3274 | elt = elt->first_same_value; | |
3275 | /* Find the cheapest one that is still valid. */ | |
3276 | while ((GET_CODE (elt->exp) != REG | |
3277 | && !exp_equiv_p (elt->exp, elt->exp, 1)) | |
3278 | || elt->equivalence_only) | |
3279 | elt = elt->next_same_value; | |
3280 | ||
3281 | addr = copy_rtx (elt->exp); | |
3282 | /* Create a new MEM rtx, in case the old one | |
3283 | is shared somewhere else. */ | |
3284 | dest = gen_rtx (MEM, GET_MODE (dest), addr); | |
3285 | MEM_VOLATILE_P (dest) | |
3286 | = MEM_VOLATILE_P (sets[i].inner_dest); | |
3287 | MEM_IN_STRUCT_P (dest) | |
3288 | = MEM_IN_STRUCT_P (sets[i].inner_dest); | |
3289 | *sets[i].inner_dest_loc = dest; | |
3290 | sets[i].inner_dest = dest; | |
3291 | } | |
3292 | } | |
3293 | } | |
3294 | } | |
3295 | ||
3296 | /* Don't enter a bit-field in the hash table | |
3297 | because the value in it after the store | |
3298 | may not equal what was stored, due to truncation. */ | |
3299 | ||
3300 | if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT | |
3301 | || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) | |
3302 | { | |
3303 | rtx width = XEXP (SET_DEST (sets[i].rtl), 1); | |
3304 | rtx value = equiv_constant (SET_SRC (sets[i].rtl)); | |
3305 | ||
3306 | if (value != 0 && GET_CODE (value) == CONST_INT | |
3307 | && GET_CODE (width) == CONST_INT | |
3308 | && INTVAL (width) < HOST_BITS_PER_INT | |
3309 | && ! (INTVAL (value) & (-1) << INTVAL (width))) | |
3310 | /* Exception: if the value is constant, | |
3311 | we can tell whether truncation would change it. */ | |
3312 | ; | |
3313 | else | |
3314 | sets[i].src_volatile = 1, src_eqv = 0; | |
3315 | } | |
3316 | ||
3317 | /* No further processing for this assignment | |
3318 | if destination is volatile or if the source and destination | |
3319 | are the same. */ | |
3320 | ||
3321 | else if (do_not_record | |
3322 | || (GET_CODE (dest) == REG | |
3323 | ? REGNO (dest) == STACK_POINTER_REGNUM | |
3324 | : GET_CODE (dest) != MEM) | |
3325 | || rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) | |
3326 | sets[i].rtl = 0; | |
3327 | ||
3328 | if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) | |
3329 | sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode); | |
3330 | ||
3331 | if (dest == cc0_rtx | |
3332 | && (GET_CODE (src) == COMPARE | |
3333 | || CONSTANT_P (src) | |
3334 | || GET_CODE (src) == REG)) | |
3335 | this_insn_cc0 = fold_cc0 (sets[i].mode, src); | |
3336 | ||
3337 | if (dest == cc0_rtx && GET_CODE (src) == CONST_INT) | |
3338 | this_insn_explicit_cc0 = src; | |
3339 | } | |
3340 | ||
3341 | /* Now enter all non-volatile source expressions in the hash table | |
3342 | if they are not already present. | |
3343 | Record in src_elt the heads of their equivalence classes. | |
3344 | This way we can insert the corresponding destinations into | |
3345 | the same classes even if the actual sources are no longer in them | |
3346 | (having been invalidated). */ | |
3347 | ||
3348 | if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0) | |
3349 | { | |
3350 | register struct table_elt *elt; | |
3351 | rtx dest = SET_DEST (sets[0].rtl); | |
3352 | enum machine_mode eqvmode = GET_MODE (dest); | |
3353 | ||
3354 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
3355 | eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); | |
3356 | if (insert_regs (src_eqv, 0, 0)) | |
3357 | src_eqv_hash_code = HASH (src_eqv, eqvmode); | |
3358 | elt = insert (src_eqv, 0, src_eqv_hash_code, eqvmode); | |
3359 | elt->in_memory = src_eqv_in_memory; | |
3360 | elt->in_struct = src_eqv_in_struct; | |
3361 | elt->equivalence_only = 1; | |
3362 | src_eqv_elt = elt->first_same_value; | |
3363 | } | |
3364 | ||
3365 | for (i = 0; i < n_sets; i++) | |
3366 | if (sets[i].rtl && ! sets[i].src_volatile) | |
3367 | { | |
3368 | if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) | |
3369 | { | |
3370 | /* REG_EQUAL in setting a STRICT_LOW_PART | |
3371 | gives an equivalent for the entire destination register, | |
3372 | not just for the subreg being stored in now. | |
3373 | This is a more interesting equivalent, so we arrange later | |
3374 | to treat the entire reg as the destination. */ | |
3375 | sets[i].src_elt = src_eqv_elt; | |
3376 | sets[i].src_hash_code = src_eqv_hash_code; | |
3377 | } | |
3378 | else if (sets[i].src_elt == 0) | |
3379 | { | |
3380 | register rtx src = SET_SRC (sets[i].rtl); | |
3381 | register rtx dest = SET_DEST (sets[i].rtl); | |
3382 | register struct table_elt *elt; | |
3383 | enum machine_mode mode | |
3384 | = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); | |
3385 | ||
3386 | /* Note that these insert_regs calls cannot remove | |
3387 | any of the src_elt's, because they would have failed to match | |
3388 | if not still valid. */ | |
3389 | if (insert_regs (src, 0, 0)) | |
3390 | sets[i].src_hash_code = HASH (src, mode); | |
3391 | elt = insert (src, src_eqv_elt, sets[i].src_hash_code, mode); | |
3392 | elt->in_memory = sets[i].src_in_memory; | |
3393 | elt->in_struct = sets[i].src_in_struct; | |
3394 | sets[i].src_elt = elt->first_same_value; | |
3395 | } | |
3396 | } | |
3397 | ||
3398 | invalidate_from_clobbers (&writes_memory, x); | |
3399 | ||
3400 | /* Now invalidate everything set by this instruction. | |
3401 | If a SUBREG or other funny destination is being set, | |
3402 | sets[i].rtl is still nonzero, so here we invalidate the reg | |
3403 | a part of which is being set. */ | |
3404 | ||
3405 | for (i = 0; i < n_sets; i++) | |
3406 | if (sets[i].rtl) | |
3407 | { | |
3408 | register rtx dest = sets[i].inner_dest; | |
3409 | ||
3410 | /* Needed for registers to remove the register from its | |
3411 | previous quantity's chain. | |
3412 | Needed for memory if this is a nonvarying address, unless | |
3413 | we have just done an invalidate_memory that covers even those. */ | |
3414 | if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG | |
3415 | || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest))) | |
3416 | invalidate (dest); | |
3417 | } | |
3418 | ||
3419 | /* Make sure registers mentioned in destinations | |
3420 | are safe for use in an expression to be inserted. | |
3421 | This removes from the hash table | |
3422 | any invalid entry that refers to one of these registers. */ | |
3423 | ||
3424 | for (i = 0; i < n_sets; i++) | |
3425 | if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) | |
3426 | mention_regs (SET_DEST (sets[i].rtl)); | |
3427 | ||
3428 | /* We may have just removed some of the src_elt's from the hash table. | |
3429 | So replace each one with the current head of the same class. */ | |
3430 | ||
3431 | for (i = 0; i < n_sets; i++) | |
3432 | if (sets[i].rtl) | |
3433 | { | |
3434 | /* If the source is volatile, its destination goes in | |
3435 | a class of its own. */ | |
3436 | if (sets[i].src_volatile) | |
3437 | sets[i].src_elt = 0; | |
3438 | ||
3439 | if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) | |
3440 | /* If elt was removed, find current head of same class, | |
3441 | or 0 if nothing remains of that class. */ | |
3442 | { | |
3443 | register struct table_elt *elt = sets[i].src_elt; | |
3444 | ||
3445 | while (elt && elt->first_same_value == 0) | |
3446 | elt = elt->next_same_value; | |
3447 | sets[i].src_elt = elt ? elt->first_same_value : 0; | |
3448 | } | |
3449 | } | |
3450 | ||
3451 | /* Now insert the destinations into their equivalence classes. */ | |
3452 | ||
3453 | for (i = 0; i < n_sets; i++) | |
3454 | if (sets[i].rtl) | |
3455 | { | |
3456 | register rtx dest = SET_DEST (sets[i].rtl); | |
3457 | register struct table_elt *elt; | |
3458 | ||
3459 | if (flag_float_store | |
3460 | && GET_CODE (dest) == MEM | |
3461 | && (GET_MODE (dest) == SFmode || GET_MODE (dest) == DFmode)) | |
3462 | continue; | |
3463 | ||
3464 | /* STRICT_LOW_PART isn't part of the value BEING set, | |
3465 | and neither is the SUBREG inside it. | |
3466 | Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ | |
3467 | if (GET_CODE (dest) == STRICT_LOW_PART) | |
3468 | dest = SUBREG_REG (XEXP (dest, 0)); | |
3469 | ||
3470 | if (GET_CODE (dest) == REG) | |
3471 | /* Registers must also be inserted into chains for quantities. */ | |
3472 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
3473 | /* If `insert_regs' changes something, the hash code must be | |
3474 | recalculated. */ | |
3475 | sets[i].dest_hash_code = HASHREG (dest); | |
3476 | ||
3477 | if (GET_CODE (dest) == SUBREG) | |
3478 | /* Registers must also be inserted into chains for quantities. */ | |
3479 | if (insert_regs (dest, sets[i].src_elt, 1)) | |
3480 | /* If `insert_regs' changes something, the hash code must be | |
3481 | recalculated. */ | |
3482 | sets[i].dest_hash_code | |
3483 | = canon_hash (dest, GET_MODE (dest)) % NBUCKETS; | |
3484 | ||
3485 | elt = insert (dest, sets[i].src_elt, sets[i].dest_hash_code, GET_MODE (dest)); | |
3486 | elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM; | |
3487 | if (elt->in_memory) | |
3488 | { | |
3489 | elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) | |
3490 | || sets[i].inner_dest != SET_DEST (sets[i].rtl)); | |
3491 | } | |
3492 | } | |
3493 | ||
3494 | /* Special handling for (set REG0 REG1) | |
3495 | where REG0 is the "cheapest", cheaper than REG1. | |
3496 | After cse, REG1 will probably not be used in the sequel, | |
3497 | so (if easily done) change this insn to (set REG1 REG0) and | |
3498 | replace REG1 with REG0 in the previous insn that computed their value. | |
3499 | Then REG1 will become a dead store and won't cloud the situation | |
3500 | for later optimizations. */ | |
3501 | if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG | |
3502 | && GET_CODE (SET_SRC (sets[0].rtl)) == REG | |
3503 | && rtx_equal_p (canon_reg (SET_SRC (sets[0].rtl)), SET_DEST (sets[0].rtl))) | |
3504 | { | |
3505 | rtx prev = PREV_INSN (insn); | |
3506 | while (prev && GET_CODE (prev) == NOTE) | |
3507 | prev = PREV_INSN (prev); | |
3508 | ||
3509 | if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET | |
3510 | && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) | |
3511 | { | |
3512 | rtx dest = SET_DEST (sets[0].rtl); | |
3513 | rtx note = find_reg_note (prev, REG_EQUIV, 0); | |
3514 | ||
3515 | SET_DEST (PATTERN (prev)) = dest; | |
3516 | SET_DEST (sets[0].rtl) = SET_SRC (sets[0].rtl); | |
3517 | SET_SRC (sets[0].rtl) = dest; | |
3518 | /* If REG1 was equivalent to a constant, REG0 is not. */ | |
3519 | if (note) | |
3520 | PUT_MODE (note, REG_EQUAL); | |
3521 | } | |
3522 | } | |
3523 | ||
3524 | /* Did this insn become an unconditional branch or become a no-op? */ | |
3525 | if (GET_CODE (insn) == JUMP_INSN | |
3526 | && GET_CODE (x) == SET | |
3527 | && SET_DEST (x) == pc_rtx) | |
3528 | { | |
3529 | if (SET_SRC (x) == pc_rtx) | |
3530 | { | |
3531 | PUT_CODE (insn, NOTE); | |
3532 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
3533 | NOTE_SOURCE_FILE (insn) = 0; | |
3534 | cse_jumps_altered = 1; | |
3535 | /* If previous insn just set CC0 for us, delete it too. */ | |
3536 | if (prev_insn_cc0 != 0 || prev_insn_explicit_cc0 != 0) | |
3537 | { | |
3538 | PUT_CODE (prev_insn, NOTE); | |
3539 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
3540 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
3541 | } | |
3542 | /* One less use of the label this insn used to jump to. */ | |
3543 | --LABEL_NUSES (JUMP_LABEL (insn)); | |
3544 | } | |
3545 | else if (GET_CODE (SET_SRC (x)) == LABEL_REF) | |
3546 | { | |
3547 | rtx label; | |
3548 | ||
3549 | emit_barrier_after (insn); | |
3550 | cse_jumps_altered = 1; | |
3551 | /* If previous insn just set CC0 for us, delete it too. */ | |
3552 | if (prev_insn_cc0 != 0 || prev_insn_explicit_cc0 != 0) | |
3553 | { | |
3554 | PUT_CODE (prev_insn, NOTE); | |
3555 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
3556 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
3557 | } | |
3558 | /* If jump target is the following label, and this is only use of it, | |
3559 | skip direct to that label and continue optimizing there. */ | |
3560 | label = insn; | |
3561 | while (label != 0 && GET_CODE (label) != CODE_LABEL) | |
3562 | label = NEXT_INSN (label); | |
3563 | if (label == XEXP (SET_SRC (x), 0) | |
3564 | && LABEL_NUSES (label) == 1) | |
3565 | cse_skip_to_next_block = 1; | |
3566 | } | |
3567 | } | |
3568 | ||
3569 | /* If this insn used to store a value based on CC0 but now value is constant, | |
3570 | and the previous insn just set CC0 for us, delete previous insn. | |
3571 | Here we use the fact that nothing expects CC0 to be valid over an insn, | |
3572 | which is true until the final pass. */ | |
3573 | if (GET_CODE (x) == SET && prev_insn_cc0 | |
3574 | && CONSTANT_P (SET_SRC (x))) | |
3575 | { | |
3576 | PUT_CODE (prev_insn, NOTE); | |
3577 | NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; | |
3578 | NOTE_SOURCE_FILE (prev_insn) = 0; | |
3579 | } | |
3580 | ||
3581 | prev_insn_explicit_cc0 = this_insn_explicit_cc0; | |
3582 | prev_insn_cc0 = this_insn_cc0; | |
3583 | prev_insn = insn; | |
3584 | } | |
3585 | \f | |
3586 | /* Store 1 in *WRITES_PTR for those categories of memory ref | |
3587 | that must be invalidated when the expression WRITTEN is stored in. | |
3588 | If WRITTEN is null, say everything must be invalidated. */ | |
3589 | ||
3590 | static void | |
3591 | note_mem_written (written, writes_ptr) | |
3592 | rtx written; | |
3593 | struct write_data *writes_ptr; | |
3594 | { | |
3595 | static struct write_data everything = {1, 1, 1}; | |
3596 | ||
3597 | if (written == 0) | |
3598 | *writes_ptr = everything; | |
3599 | else if (GET_CODE (written) == MEM) | |
3600 | { | |
3601 | /* Pushing or popping the stack invalidates nothing. */ | |
3602 | rtx addr = XEXP (written, 0); | |
3603 | if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC | |
3604 | || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) | |
3605 | && GET_CODE (XEXP (addr, 0)) == REG | |
3606 | && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) | |
3607 | return; | |
3608 | if (GET_MODE (written) == BLKmode) | |
3609 | *writes_ptr = everything; | |
3610 | else if (cse_rtx_addr_varies_p (written)) | |
3611 | { | |
3612 | /* A varying address that is a sum indicates an array element, | |
3613 | and that's just as good as a structure element | |
3614 | in implying that we need not invalidate scalar variables. */ | |
3615 | if (!(MEM_IN_STRUCT_P (written) | |
3616 | || GET_CODE (XEXP (written, 0)) == PLUS)) | |
3617 | writes_ptr->all = 1; | |
3618 | writes_ptr->nonscalar = 1; | |
3619 | } | |
3620 | writes_ptr->var = 1; | |
3621 | } | |
3622 | } | |
3623 | ||
3624 | /* Perform invalidation on the basis of everything about an insn | |
3625 | except for invalidating the actual places that are SET in it. | |
3626 | This includes the places CLOBBERed, and anything that might | |
3627 | alias with something that is SET or CLOBBERed. | |
3628 | ||
3629 | W points to the writes_memory for this insn, a struct write_data | |
3630 | saying which kinds of memory references must be invalidated. | |
3631 | X is the pattern of the insn. */ | |
3632 | ||
3633 | static void | |
3634 | invalidate_from_clobbers (w, x) | |
3635 | struct write_data *w; | |
3636 | rtx x; | |
3637 | { | |
3638 | /* If W->var is not set, W specifies no action. | |
3639 | If W->all is set, this step gets all memory refs | |
3640 | so they can be ignored in the rest of this function. */ | |
3641 | if (w->var) | |
3642 | invalidate_memory (w); | |
3643 | ||
3644 | if (GET_CODE (x) == CLOBBER) | |
3645 | { | |
3646 | rtx ref = XEXP (x, 0); | |
3647 | if (ref | |
3648 | && (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
3649 | || (GET_CODE (ref) == MEM && ! w->all))) | |
3650 | invalidate (ref); | |
3651 | } | |
3652 | else if (GET_CODE (x) == PARALLEL) | |
3653 | { | |
3654 | register int i; | |
3655 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) | |
3656 | { | |
3657 | register rtx y = XVECEXP (x, 0, i); | |
3658 | if (GET_CODE (y) == CLOBBER) | |
3659 | { | |
3660 | rtx ref = XEXP (y, 0); | |
3661 | if (ref | |
3662 | &&(GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG | |
3663 | || (GET_CODE (ref) == MEM && !w->all))) | |
3664 | invalidate (ref); | |
3665 | } | |
3666 | } | |
3667 | } | |
3668 | } | |
3669 | \f | |
3670 | /* Find the end of INSN's basic block, and return the cuid of its last insn | |
3671 | and the total number of SETs in all the insns of the block. */ | |
3672 | ||
3673 | struct cse_basic_block_data { int cuid, nsets; rtx last; }; | |
3674 | ||
3675 | static struct cse_basic_block_data | |
3676 | cse_end_of_basic_block (insn) | |
3677 | rtx insn; | |
3678 | { | |
3679 | rtx p = insn; | |
3680 | struct cse_basic_block_data val; | |
3681 | int nsets = 0; | |
3682 | int last_uid = 0; | |
3683 | ||
3684 | /* Scan to end of this basic block. */ | |
3685 | while (p && GET_CODE (p) != CODE_LABEL) | |
3686 | { | |
3687 | /* Don't cse out the end of a loop. This makes a difference | |
3688 | only for the unusual loops that always execute at least once; | |
3689 | all other loops have labels there so we will stop in any case. | |
3690 | Cse'ing out the end of the loop is dangerous because it | |
3691 | might cause an invariant expression inside the loop | |
3692 | to be reused after the end of the loop. This would make it | |
3693 | hard to move the expression out of the loop in loop.c, | |
3694 | especially if it is one of several equivalent expressions | |
3695 | and loop.c would like to eliminate it. | |
3696 | The occasional optimizations lost by this will all come back | |
3697 | if loop and cse are made to work alternatingly. */ | |
3698 | if (GET_CODE (p) == NOTE | |
3699 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) | |
3700 | break; | |
3701 | ||
3702 | /* Don't cse over a call to setjmp; on some machines (eg vax) | |
3703 | the regs restored by the longjmp come from | |
3704 | a later time than the setjmp. */ | |
3705 | if (GET_CODE (p) == NOTE | |
3706 | && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) | |
3707 | break; | |
3708 | ||
3709 | /* A PARALLEL can have lots of SETs in it, | |
3710 | especially if it is really an ASM_OPERANDS. */ | |
3711 | if (GET_CODE (p) == INSN && GET_CODE (PATTERN (p)) == PARALLEL) | |
3712 | nsets += XVECLEN (PATTERN (p), 0); | |
3713 | else | |
3714 | nsets += 1; | |
3715 | ||
3716 | last_uid = INSN_UID (p); | |
3717 | p = NEXT_INSN (p); | |
3718 | } | |
3719 | val.cuid = uid_cuid[last_uid]; | |
3720 | val.nsets = nsets; | |
3721 | val.last = p; | |
3722 | ||
3723 | return val; | |
3724 | } | |
3725 | \f | |
3726 | static rtx cse_basic_block (); | |
3727 | ||
3728 | /* Perform cse on the instructions of a function. | |
3729 | F is the first instruction. | |
3730 | NREGS is one plus the highest pseudo-reg number used in the instruction. | |
3731 | ||
3732 | Returns 1 if jump_optimize should be redone due to simplifications | |
3733 | in conditional jump instructions. */ | |
3734 | ||
3735 | int | |
3736 | cse_main (f, nregs) | |
3737 | /* f is the first instruction of a chain of insns for one function */ | |
3738 | rtx f; | |
3739 | /* nregs is the total number of registers used in it */ | |
3740 | int nregs; | |
3741 | { | |
3742 | register rtx insn = f; | |
3743 | register int i; | |
3744 | ||
3745 | cse_jumps_altered = 0; | |
3746 | ||
3747 | init_recog (); | |
3748 | ||
3749 | max_reg = nregs; | |
3750 | ||
3751 | all_minus_one = (int *) alloca (nregs * sizeof (int)); | |
3752 | consec_ints = (int *) alloca (nregs * sizeof (int)); | |
3753 | for (i = 0; i < nregs; i++) | |
3754 | { | |
3755 | all_minus_one[i] = -1; | |
3756 | consec_ints[i] = i; | |
3757 | } | |
3758 | ||
3759 | reg_next_eqv = (int *) alloca (nregs * sizeof (int)); | |
3760 | reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); | |
3761 | reg_qty = (int *) alloca (nregs * sizeof (int)); | |
3762 | reg_rtx = (rtx *) alloca (nregs * sizeof (rtx)); | |
3763 | reg_in_table = (int *) alloca (nregs * sizeof (int)); | |
3764 | reg_tick = (int *) alloca (nregs * sizeof (int)); | |
3765 | ||
3766 | /* Discard all the free elements of the previous function | |
3767 | since they are allocated in the temporarily obstack. */ | |
3768 | bzero (table, sizeof table); | |
3769 | free_element_chain = 0; | |
3770 | n_elements_made = 0; | |
3771 | ||
3772 | /* Find the largest uid. */ | |
3773 | ||
3774 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
3775 | if (INSN_UID (insn) > i) | |
3776 | i = INSN_UID (insn); | |
3777 | ||
3778 | uid_cuid = (short *) alloca ((i + 1) * sizeof (short)); | |
3779 | bzero (uid_cuid, (i + 1) * sizeof (short)); | |
3780 | ||
3781 | /* Compute the mapping from uids to cuids. | |
3782 | CUIDs are numbers assigned to insns, like uids, | |
3783 | except that cuids increase monotonically through the code. | |
3784 | Don't assign cuids to line-number NOTEs, so that the distance in cuids | |
3785 | between two insns is not affected by -g. */ | |
3786 | ||
3787 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) | |
3788 | { | |
3789 | if (GET_CODE (insn) != NOTE | |
3790 | || NOTE_LINE_NUMBER (insn) < 0) | |
3791 | INSN_CUID (insn) = ++i; | |
3792 | else | |
3793 | /* Give a line number note the same cuid as preceding insn. */ | |
3794 | INSN_CUID (insn) = i; | |
3795 | } | |
3796 | ||
3797 | /* Loop over basic blocks. | |
3798 | Compute the maximum number of qty's needed for each basic block | |
3799 | (which is 2 for each SET). */ | |
3800 | insn = f; | |
3801 | while (insn) | |
3802 | { | |
3803 | struct cse_basic_block_data val; | |
3804 | ||
3805 | val = cse_end_of_basic_block (insn); | |
3806 | ||
3807 | cse_basic_block_end = val.cuid; | |
3808 | cse_basic_block_start = INSN_CUID (insn); | |
3809 | max_qty = val.nsets * 2; | |
3810 | ||
3811 | /* Make MAX_QTY bigger to give us room to optimize | |
3812 | past the end of this basic block, if that should prove useful. */ | |
3813 | if (max_qty < 500) | |
3814 | max_qty = 500; | |
3815 | ||
3816 | max_qty += max_reg; | |
3817 | ||
3818 | insn = cse_basic_block (insn, val.last); | |
3819 | #ifdef USE_C_ALLOCA | |
3820 | alloca (0); | |
3821 | #endif | |
3822 | } | |
3823 | ||
3824 | /* Tell refers_to_mem_p that qty_const info is not available. */ | |
3825 | qty_const = 0; | |
3826 | ||
3827 | if (max_elements_made < n_elements_made) | |
3828 | max_elements_made = n_elements_made; | |
3829 | ||
3830 | return cse_jumps_altered; | |
3831 | } | |
3832 | ||
3833 | static rtx | |
3834 | cse_basic_block (from, to) | |
3835 | register rtx from, to; | |
3836 | { | |
3837 | register rtx insn; | |
3838 | int *qv1 = (int *) alloca (max_qty * sizeof (int)); | |
3839 | int *qv2 = (int *) alloca (max_qty * sizeof (int)); | |
3840 | rtx *qv3 = (rtx *) alloca (max_qty * sizeof (rtx)); | |
3841 | ||
3842 | qty_first_reg = qv1; | |
3843 | qty_last_reg = qv2; | |
3844 | qty_const = qv3; | |
3845 | qty_const_insn = (rtx *) alloca (max_qty * sizeof (rtx)); | |
3846 | ||
3847 | new_basic_block (); | |
3848 | ||
3849 | cse_skip_to_next_block = 0; | |
3850 | ||
3851 | for (insn = from; insn != to; insn = NEXT_INSN (insn)) | |
3852 | { | |
3853 | register enum rtx_code code; | |
3854 | ||
3855 | code = GET_CODE (insn); | |
3856 | ||
3857 | if (code == INSN || code == JUMP_INSN || code == CALL_INSN) | |
3858 | cse_insn (insn); | |
3859 | /* Memory, and some registers, are invalidate by subroutine calls. */ | |
3860 | if (code == CALL_INSN) | |
3861 | { | |
3862 | register int i; | |
3863 | static struct write_data everything = {1, 1, 1}; | |
3864 | invalidate_memory (&everything); | |
3865 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
3866 | if (call_used_regs[i] && reg_rtx[i] | |
3867 | && i != FRAME_POINTER_REGNUM | |
3868 | && i != ARG_POINTER_REGNUM) | |
3869 | invalidate (reg_rtx[i]); | |
3870 | } | |
3871 | /* Loop beginnings are often followed by jumps | |
3872 | (that enter the loop above the endtest). | |
3873 | See if we can prove the loop will be executed at least once; | |
3874 | if so, delete the jump. Also perhaps we can prove loop | |
3875 | will never be executed and delete the entire thing. */ | |
3876 | if (code == NOTE | |
3877 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG | |
3878 | && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN) | |
3879 | { | |
3880 | predecide_loop_entry (insn); | |
3881 | /* Whether that jump was deleted or not, | |
3882 | it certainly is the end of the basic block. | |
3883 | Since the jump is unconditional, | |
3884 | it requires no further processing here. */ | |
3885 | break; | |
3886 | } | |
3887 | ||
3888 | /* See if it is ok to keep on going past the label | |
3889 | which used to end our basic block. */ | |
3890 | if (cse_skip_to_next_block | |
3891 | || (to != 0 && NEXT_INSN (insn) == to && LABEL_NUSES (to) == 0)) | |
3892 | { | |
3893 | struct cse_basic_block_data val; | |
3894 | ||
3895 | /* Skip the remaining insns in this block. */ | |
3896 | cse_skip_to_next_block = 0; | |
3897 | insn = to; | |
3898 | if (insn == 0) | |
3899 | break; | |
3900 | ||
3901 | /* Find the end of the following block. */ | |
3902 | val = cse_end_of_basic_block (NEXT_INSN (insn)); | |
3903 | ||
3904 | /* If the tables we allocated have enough space left | |
3905 | to handle all the SETs in the next basic block, | |
3906 | continue through it. Otherwise, return, | |
3907 | and that block will be scanned individually. */ | |
3908 | if (val.nsets * 2 + next_qty > max_qty) | |
3909 | break; | |
3910 | ||
3911 | cse_basic_block_end = val.cuid; | |
3912 | to = val.last; | |
3913 | } | |
3914 | } | |
3915 | ||
3916 | if (next_qty > max_qty) | |
3917 | abort (); | |
3918 | ||
3919 | return to ? NEXT_INSN (to) : 0; | |
3920 | } |