vax headers
[unix-history] / usr / src / sys / vax / uba / up.c
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18eded4b
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1/* up.c 4.60 82/10/10 */
2.f
008c0481 3
66b4fb09 4#include "up.h"
a3cb8f60 5#if NSC > 0
008c0481 6/*
10fb932f 7 * UNIBUS disk driver with overlapped seeks and ECC recovery.
0c48c799
BJ
8 *
9 * TODO:
0c48c799 10 * Add bad sector forwarding code
299d67ed 11 * Check that offset recovery code works
008c0481
BJ
12 */
13
14#include "../h/param.h"
15#include "../h/systm.h"
41888f16 16#include "../h/dk.h"
008c0481
BJ
17#include "../h/buf.h"
18#include "../h/conf.h"
19#include "../h/dir.h"
20#include "../h/user.h"
21#include "../h/map.h"
80e7c811 22#include "../h/pte.h"
008c0481 23#include "../h/vm.h"
0ff318b2 24#include "../h/cmap.h"
740e4029 25#include "../h/uio.h"
008c0481 26
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BJ
27#include "../vax/cpu.h"
28#include "../vax/nexus.h"
29#include "../vaxuba/ubavar.h"
30#include "../vaxuba/ubareg.h"
31#include "../vaxuba/upreg.h"
008c0481 32
3f3a34c3
BJ
33struct up_softc {
34 int sc_softas;
71236e46 35 int sc_ndrive;
3f3a34c3 36 int sc_wticks;
736772ef 37 int sc_recal;
a3cb8f60 38} up_softc[NSC];
008c0481 39
3f3a34c3 40/* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
008c0481
BJ
41struct size
42{
43 daddr_t nblocks;
44 int cyloff;
45} up_sizes[8] = {
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46#ifdef ERNIE
47 49324, 0, /* A=cyl 0 thru 26 */
48#else
008c0481 49 15884, 0, /* A=cyl 0 thru 26 */
c94d7fe4 50#endif
008c0481 51 33440, 27, /* B=cyl 27 thru 81 */
d1778415 52 495520, 0, /* C=cyl 0 thru 814 */
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BJ
53 15884, 562, /* D=cyl 562 thru 588 */
54 55936, 589, /* E=cyl 589 thru 680 */
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BJ
55#ifndef NOBADSECT
56 81376, 681, /* F=cyl 681 thru 814 */
57 153728, 562, /* G=cyl 562 thru 814 */
58#else
59 81472, 681,
60 153824, 562,
61#endif
008c0481 62 291346, 82, /* H=cyl 82 thru 561 */
3f3a34c3
BJ
63}, fj_sizes[8] = {
64 15884, 0, /* A=cyl 0 thru 49 */
65 33440, 50, /* B=cyl 50 thru 154 */
66 263360, 0, /* C=cyl 0 thru 822 */
67 0, 0,
68 0, 0,
69 0, 0,
70 0, 0,
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BJ
71#ifndef NOBADSECT
72 213664, 155, /* H=cyl 155 thru 822 */
73#else
74 213760, 155,
75#endif
a1ef7a52 76}, upam_sizes[8] = {
0cc9b5a9
BJ
77 15884, 0, /* A=cyl 0 thru 31 */
78 33440, 32, /* B=cyl 32 thru 97 */
79 524288, 0, /* C=cyl 0 thru 1023 */
eadd189e
SL
80 27786, 668,
81 27786, 723,
82 125440, 778,
0cc9b5a9
BJ
83 181760, 668, /* G=cyl 668 thru 1022 */
84 291346, 98, /* H=cyl 98 thru 667 */
008c0481 85};
3f3a34c3 86/* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
008c0481 87
cc7ff771
BJ
88/*
89 * On a 780 upSDIST could be 2, but
90 * in the interest of 750's...
91 */
92#define _upSDIST 3 /* 1.5 msec */
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BJ
93#define _upRDIST 4 /* 2.0 msec */
94
95int upSDIST = _upSDIST;
96int upRDIST = _upRDIST;
97
71236e46 98int upprobe(), upslave(), upattach(), updgo(), upintr();
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BJ
99struct uba_ctlr *upminfo[NSC];
100struct uba_device *updinfo[NUP];
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101#define UPIPUNITS 8
102struct uba_device *upip[NSC][UPIPUNITS]; /* fuji w/fixed head gives n,n+4 */
d763a2b7 103
71236e46 104u_short upstd[] = { 0776700, 0774400, 0776300, 0 };
0801d37f 105struct uba_driver scdriver =
71236e46 106 { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo };
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107struct buf uputab[NUP];
108
109struct upst {
110 short nsect;
111 short ntrak;
112 short nspc;
113 short ncyl;
114 struct size *sizes;
115} upst[] = {
71236e46
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116 32, 19, 32*19, 823, up_sizes, /* 9300/cdc */
117/* 9300 actually has 815 cylinders... */
3f3a34c3 118 32, 10, 32*10, 823, fj_sizes, /* fujitsu 160m */
a1ef7a52 119 32, 16, 32*16, 1024, upam_sizes, /* ampex capricorn */
3f3a34c3 120};
008c0481 121
2601dfbd 122u_char up_offset[16] = {
299d67ed
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123 UPOF_P400, UPOF_M400, UPOF_P400, UPOF_M400,
124 UPOF_P800, UPOF_M800, UPOF_P800, UPOF_M800,
125 UPOF_P1200, UPOF_M1200, UPOF_P1200, UPOF_M1200,
126 0, 0, 0, 0
2601dfbd 127};
008c0481 128
0801d37f 129struct buf rupbuf[NUP];
008c0481 130
008c0481
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131#define b_cylin b_resid
132
008c0481
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133#ifdef INTRLVE
134daddr_t dkblock();
135#endif
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136
137int upwstart, upwatch(); /* Have started guardian */
7e00c42b 138int upseek;
f88f8fdb 139int upwaitdry;
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140
141/*ARGSUSED*/
71236e46 142upprobe(reg)
3f3a34c3 143 caddr_t reg;
008c0481 144{
d763a2b7
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145 register int br, cvec;
146
71236e46
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147#ifdef lint
148 br = 0; cvec = br; br = cvec;
149#endif
2601dfbd 150 ((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY;
71236e46 151 DELAY(10);
2601dfbd 152 ((struct updevice *)reg)->upcs1 = 0;
9c0adba0 153 return (sizeof (struct updevice));
3f3a34c3
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154}
155
71236e46 156upslave(ui, reg)
89bd2f01 157 struct uba_device *ui;
3f3a34c3
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158 caddr_t reg;
159{
2601dfbd 160 register struct updevice *upaddr = (struct updevice *)reg;
3f3a34c3
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161
162 upaddr->upcs1 = 0; /* conservative */
71236e46 163 upaddr->upcs2 = ui->ui_slave;
c224ab94 164 upaddr->upcs1 = UP_NOP|UP_GO;
299d67ed 165 if (upaddr->upcs2&UPCS2_NED) {
2601dfbd 166 upaddr->upcs1 = UP_DCLR|UP_GO;
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167 return (0);
168 }
71236e46
BJ
169 return (1);
170}
171
172upattach(ui)
89bd2f01 173 register struct uba_device *ui;
71236e46 174{
2601dfbd 175 register struct updevice *upaddr;
71236e46 176
6a81870e 177 if (upwstart == 0) {
7780575a 178 timeout(upwatch, (caddr_t)0, hz);
6a81870e
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179 upwstart++;
180 }
b7333467
BJ
181 if (ui->ui_dk >= 0)
182 dk_mspw[ui->ui_dk] = .0000020345;
71236e46
BJ
183 upip[ui->ui_ctlr][ui->ui_slave] = ui;
184 up_softc[ui->ui_ctlr].sc_ndrive++;
2601dfbd
BJ
185 upaddr = (struct updevice *)ui->ui_addr;
186 upaddr->upcs1 = 0;
187 upaddr->upcs2 = ui->ui_slave;
26e15512 188 upaddr->uphr = UPHR_MAXTRAK;
c6a51a7b 189 if (upaddr->uphr == 9)
26e15512 190 ui->ui_type = 1; /* fujitsu hack */
0cc9b5a9
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191 else if (upaddr->uphr == 15)
192 ui->ui_type = 2; /* ampex hack */
26e15512
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193 upaddr->upcs2 = UPCS2_CLR;
194/*
195 upaddr->uphr = UPHR_MAXCYL;
196 printf("maxcyl %d\n", upaddr->uphr);
197 upaddr->uphr = UPHR_MAXTRAK;
198 printf("maxtrak %d\n", upaddr->uphr);
199 upaddr->uphr = UPHR_MAXSECT;
200 printf("maxsect %d\n", upaddr->uphr);
201*/
3f3a34c3
BJ
202}
203
3f3a34c3
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204upstrategy(bp)
205 register struct buf *bp;
206{
89bd2f01 207 register struct uba_device *ui;
3f3a34c3
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208 register struct upst *st;
209 register int unit;
7e00c42b 210 register struct buf *dp;
3f3a34c3 211 int xunit = minor(bp->b_dev) & 07;
7e00c42b 212 long bn, sz;
3f3a34c3 213
7e00c42b 214 sz = (bp->b_bcount+511) >> 9;
008c0481 215 unit = dkunit(bp);
3f3a34c3
BJ
216 if (unit >= NUP)
217 goto bad;
218 ui = updinfo[unit];
219 if (ui == 0 || ui->ui_alive == 0)
220 goto bad;
221 st = &upst[ui->ui_type];
222 if (bp->b_blkno < 0 ||
223 (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
224 goto bad;
225 bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
0cc9b5a9 226 (void) spl5();
7e00c42b
BJ
227 dp = &uputab[ui->ui_unit];
228 disksort(dp, bp);
229 if (dp->b_active == 0) {
3f3a34c3
BJ
230 (void) upustart(ui);
231 bp = &ui->ui_mi->um_tab;
232 if (bp->b_actf && bp->b_active == 0)
233 (void) upstart(ui->ui_mi);
008c0481 234 }
0cc9b5a9 235 (void) spl0();
3f3a34c3
BJ
236 return;
237
238bad:
239 bp->b_flags |= B_ERROR;
240 iodone(bp);
241 return;
008c0481
BJ
242}
243
736772ef
BJ
244/*
245 * Unit start routine.
246 * Seek the drive to be where the data is
247 * and then generate another interrupt
248 * to actually start the transfer.
249 * If there is only one drive on the controller,
250 * or we are very close to the data, don't
251 * bother with the search. If called after
252 * searching once, don't bother to look where
253 * we are, just queue for transfer (to avoid
254 * positioning forever without transferrring.)
255 */
3f3a34c3 256upustart(ui)
89bd2f01 257 register struct uba_device *ui;
008c0481
BJ
258{
259 register struct buf *bp, *dp;
89bd2f01 260 register struct uba_ctlr *um;
2601dfbd 261 register struct updevice *upaddr;
3f3a34c3 262 register struct upst *st;
008c0481 263 daddr_t bn;
736772ef 264 int sn, csn;
71236e46
BJ
265 /*
266 * The SC21 cancels commands if you just say
2601dfbd 267 * cs1 = UP_IE
71236e46
BJ
268 * so we are cautious about handling of cs1.
269 * Also don't bother to clear as bits other than in upintr().
270 */
736772ef
BJ
271 int didie = 0;
272
273 if (ui == 0)
274 return (0);
89bd2f01 275 um = ui->ui_mi;
3f3a34c3
BJ
276 dk_busy &= ~(1<<ui->ui_dk);
277 dp = &uputab[ui->ui_unit];
7bc8d985 278 if ((bp = dp->b_actf) == NULL)
eb891eaa 279 goto out;
736772ef
BJ
280 /*
281 * If the controller is active, just remember
282 * that this device would like to be positioned...
283 * if we tried to position now we would confuse the SC21.
284 */
3f3a34c3 285 if (um->um_tab.b_active) {
d763a2b7 286 up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave;
2a3b9a7f
BJ
287 return (0);
288 }
736772ef
BJ
289 /*
290 * If we have already positioned this drive,
291 * then just put it on the ready queue.
292 */
a3f430e0
BJ
293 if (dp->b_active)
294 goto done;
295 dp->b_active = 1;
2601dfbd 296 upaddr = (struct updevice *)um->um_addr;
3f3a34c3 297 upaddr->upcs2 = ui->ui_slave;
736772ef
BJ
298 /*
299 * If drive has just come up,
300 * setup the pack.
301 */
299d67ed 302 if ((upaddr->upds & UPDS_VV) == 0) {
71236e46 303 /* SHOULD WARN SYSTEM THAT THIS HAPPENED */
2601dfbd
BJ
304 upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO;
305 upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO;
299d67ed 306 upaddr->upof = UPOF_FMT22;
eb891eaa 307 didie = 1;
008c0481 308 }
736772ef
BJ
309 /*
310 * If drive is offline, forget about positioning.
311 */
299d67ed 312 if ((upaddr->upds & (UPDS_DPR|UPDS_MOL)) != (UPDS_DPR|UPDS_MOL))
2a3b9a7f 313 goto done;
736772ef
BJ
314 /*
315 * If there is only one drive,
316 * dont bother searching.
317 */
71236e46
BJ
318 if (up_softc[um->um_ctlr].sc_ndrive == 1)
319 goto done;
736772ef
BJ
320 /*
321 * Figure out where this transfer is going to
322 * and see if we are close enough to justify not searching.
323 */
3f3a34c3 324 st = &upst[ui->ui_type];
008c0481 325 bn = dkblock(bp);
3f3a34c3
BJ
326 sn = bn%st->nspc;
327 sn = (sn + st->nsect - upSDIST) % st->nsect;
736772ef 328 if (bp->b_cylin - upaddr->updc)
7bc8d985 329 goto search; /* Not on-cylinder */
2a3b9a7f
BJ
330 else if (upseek)
331 goto done; /* Ok just to be on-cylinder */
008c0481 332 csn = (upaddr->upla>>6) - sn - 1;
7bc8d985 333 if (csn < 0)
3f3a34c3
BJ
334 csn += st->nsect;
335 if (csn > st->nsect - upRDIST)
008c0481 336 goto done;
008c0481 337search:
736772ef
BJ
338 upaddr->updc = bp->b_cylin;
339 /*
340 * Not on cylinder at correct position,
341 * seek/search.
342 */
2a3b9a7f 343 if (upseek)
2601dfbd 344 upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO;
7e00c42b 345 else {
2a3b9a7f 346 upaddr->upda = sn;
2601dfbd 347 upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO;
2a3b9a7f 348 }
eb891eaa 349 didie = 1;
736772ef
BJ
350 /*
351 * Mark unit busy for iostat.
352 */
3f3a34c3
BJ
353 if (ui->ui_dk >= 0) {
354 dk_busy |= 1<<ui->ui_dk;
355 dk_seek[ui->ui_dk]++;
008c0481 356 }
eb891eaa 357 goto out;
008c0481 358done:
736772ef
BJ
359 /*
360 * Device is ready to go.
361 * Put it on the ready queue for the controller
362 * (unless its already there.)
363 */
2601dfbd
BJ
364 if (dp->b_active != 2) {
365 dp->b_forw = NULL;
366 if (um->um_tab.b_actf == NULL)
367 um->um_tab.b_actf = dp;
368 else
369 um->um_tab.b_actl->b_forw = dp;
370 um->um_tab.b_actl = dp;
371 dp->b_active = 2;
372 }
eb891eaa
BJ
373out:
374 return (didie);
008c0481
BJ
375}
376
736772ef
BJ
377/*
378 * Start up a transfer on a drive.
379 */
3f3a34c3 380upstart(um)
89bd2f01 381 register struct uba_ctlr *um;
008c0481
BJ
382{
383 register struct buf *bp, *dp;
89bd2f01 384 register struct uba_device *ui;
2601dfbd 385 register struct updevice *upaddr;
7e00c42b 386 struct upst *st;
008c0481 387 daddr_t bn;
f88f8fdb 388 int dn, sn, tn, cmd, waitdry;
008c0481 389
008c0481 390loop:
736772ef
BJ
391 /*
392 * Pull a request off the controller queue
393 */
3f3a34c3 394 if ((dp = um->um_tab.b_actf) == NULL)
eb891eaa 395 return (0);
008c0481 396 if ((bp = dp->b_actf) == NULL) {
3f3a34c3 397 um->um_tab.b_actf = dp->b_forw;
008c0481
BJ
398 goto loop;
399 }
736772ef
BJ
400 /*
401 * Mark controller busy, and
402 * determine destination of this request.
403 */
3f3a34c3
BJ
404 um->um_tab.b_active++;
405 ui = updinfo[dkunit(bp)];
008c0481 406 bn = dkblock(bp);
3f3a34c3
BJ
407 dn = ui->ui_slave;
408 st = &upst[ui->ui_type];
409 sn = bn%st->nspc;
410 tn = sn/st->nsect;
411 sn %= st->nsect;
2601dfbd 412 upaddr = (struct updevice *)ui->ui_addr;
736772ef
BJ
413 /*
414 * Select drive if not selected already.
415 */
416 if ((upaddr->upcs2&07) != dn)
417 upaddr->upcs2 = dn;
418 /*
419 * Check that it is ready and online
420 */
f88f8fdb 421 waitdry = 0;
299d67ed 422 while ((upaddr->upds&UPDS_DRY) == 0) {
ac1276f8 423 printf("up%d: ds wait ds=%o\n",dkunit(bp),upaddr->upds);
f88f8fdb
BJ
424 if (++waitdry > 512)
425 break;
426 upwaitdry++;
427 }
299d67ed 428 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
f6d201ff 429 printf("up%d: not ready", dkunit(bp));
299d67ed 430 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
71236e46 431 printf("\n");
3f3a34c3
BJ
432 um->um_tab.b_active = 0;
433 um->um_tab.b_errcnt = 0;
88253fd2
BJ
434 dp->b_actf = bp->av_forw;
435 dp->b_active = 0;
436 bp->b_flags |= B_ERROR;
437 iodone(bp);
88253fd2
BJ
438 goto loop;
439 }
736772ef
BJ
440 /*
441 * Oh, well, sometimes this
442 * happens, for reasons unknown.
443 */
2601dfbd 444 printf(" (flakey)\n");
008c0481 445 }
736772ef
BJ
446 /*
447 * Setup for the transfer, and get in the
448 * UNIBUS adaptor queue.
449 */
5aa9d5ea 450 upaddr->updc = bp->b_cylin;
008c0481 451 upaddr->upda = (tn << 8) + sn;
008c0481
BJ
452 upaddr->upwc = -bp->b_bcount / sizeof (short);
453 if (bp->b_flags & B_READ)
2601dfbd 454 cmd = UP_IE|UP_RCOM|UP_GO;
008c0481 455 else
2601dfbd 456 cmd = UP_IE|UP_WCOM|UP_GO;
b7333467 457 um->um_cmd = cmd;
a0eab615 458 (void) ubago(ui);
eb891eaa 459 return (1);
008c0481
BJ
460}
461
736772ef
BJ
462/*
463 * Now all ready to go, stuff the registers.
464 */
b7333467 465updgo(um)
89bd2f01 466 struct uba_ctlr *um;
3f3a34c3 467{
2601dfbd 468 register struct updevice *upaddr = (struct updevice *)um->um_addr;
7e00c42b 469
de59ccc2 470 um->um_tab.b_active = 2; /* should now be 2 */
b7333467
BJ
471 upaddr->upba = um->um_ubinfo;
472 upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300);
3f3a34c3
BJ
473}
474
736772ef
BJ
475/*
476 * Handle a disk interrupt.
477 */
443c8066 478upintr(sc21)
3f3a34c3 479 register sc21;
008c0481
BJ
480{
481 register struct buf *bp, *dp;
89bd2f01
BJ
482 register struct uba_ctlr *um = upminfo[sc21];
483 register struct uba_device *ui;
2601dfbd 484 register struct updevice *upaddr = (struct updevice *)um->um_addr;
008c0481 485 register unit;
7e00c42b 486 struct up_softc *sc = &up_softc[um->um_ctlr];
71236e46 487 int as = (upaddr->upas & 0377) | sc->sc_softas;
f88f8fdb 488 int needie = 1, waitdry;
008c0481 489
7e00c42b 490 sc->sc_wticks = 0;
71236e46 491 sc->sc_softas = 0;
736772ef
BJ
492 /*
493 * If controller wasn't transferring, then this is an
494 * interrupt for attention status on seeking drives.
495 * Just service them.
496 */
cc7ff771 497 if (um->um_tab.b_active != 2 && !sc->sc_recal) {
736772ef
BJ
498 if (upaddr->upcs1 & UP_TRE)
499 upaddr->upcs1 = UP_TRE;
500 goto doattn;
501 }
de59ccc2 502 um->um_tab.b_active = 1;
736772ef
BJ
503 /*
504 * Get device and block structures, and a pointer
89bd2f01 505 * to the uba_device for the drive. Select the drive.
736772ef
BJ
506 */
507 dp = um->um_tab.b_actf;
508 bp = dp->b_actf;
509 ui = updinfo[dkunit(bp)];
510 dk_busy &= ~(1 << ui->ui_dk);
511 if ((upaddr->upcs2&07) != ui->ui_slave)
3f3a34c3 512 upaddr->upcs2 = ui->ui_slave;
736772ef
BJ
513 /*
514 * Check for and process errors on
515 * either the drive or the controller.
516 */
299d67ed 517 if ((upaddr->upds&UPDS_ERR) || (upaddr->upcs1&UP_TRE)) {
f88f8fdb 518 waitdry = 0;
299d67ed 519 while ((upaddr->upds & UPDS_DRY) == 0) {
f88f8fdb
BJ
520 if (++waitdry > 512)
521 break;
522 upwaitdry++;
523 }
299d67ed 524 if (upaddr->uper1&UPER1_WLE) {
736772ef
BJ
525 /*
526 * Give up on write locked devices
527 * immediately.
528 */
f6d201ff 529 printf("up%d: write locked\n", dkunit(bp));
736772ef
BJ
530 bp->b_flags |= B_ERROR;
531 } else if (++um->um_tab.b_errcnt > 27) {
532 /*
533 * After 28 retries (16 without offset, and
534 * 12 with offset positioning) give up.
535 */
f6d201ff
BJ
536 harderr(bp, "up");
537 printf("cs2=%b er1=%b er2=%b\n",
c84ff1f9
BJ
538 upaddr->upcs2, UPCS2_BITS,
539 upaddr->uper1, UPER1_BITS,
540 upaddr->uper2, UPER2_BITS);
736772ef
BJ
541 bp->b_flags |= B_ERROR;
542 } else {
543 /*
544 * Retriable error.
545 * If a soft ecc, correct it (continuing
546 * by returning if necessary.
547 * Otherwise fall through and retry the transfer
548 */
55de6ac9 549 if ((upaddr->uper1&(UPER1_DCK|UPER1_ECH))==UPER1_DCK) {
2601dfbd
BJ
550 if (upecc(ui))
551 return;
55de6ac9
BJ
552 } else
553 um->um_tab.b_active = 0; /* force retry */
736772ef
BJ
554 }
555 /*
556 * Clear drive error and, every eight attempts,
557 * (starting with the fourth)
558 * recalibrate to clear the slate.
559 */
560 upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
561 needie = 0;
fc4d0a69 562 if ((um->um_tab.b_errcnt&07) == 4 && um->um_tab.b_active == 0) {
736772ef 563 upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO;
a6442a2f
BJ
564 sc->sc_recal = 0;
565 goto nextrecal;
736772ef
BJ
566 }
567 }
568 /*
a6442a2f
BJ
569 * Advance recalibration finite state machine
570 * if recalibrate in progress, through
571 * RECAL
572 * SEEK
573 * OFFSET (optional)
574 * RETRY
736772ef 575 */
a6442a2f
BJ
576 switch (sc->sc_recal) {
577
578 case 1:
579 upaddr->updc = bp->b_cylin;
580 upaddr->upcs1 = UP_SEEK|UP_IE|UP_GO;
581 goto nextrecal;
582 case 2:
583 if (um->um_tab.b_errcnt < 16 || (bp->b_flags&B_READ) == 0)
584 goto donerecal;
299d67ed 585 upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UPOF_FMT22;
a6442a2f
BJ
586 upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO;
587 goto nextrecal;
588 nextrecal:
589 sc->sc_recal++;
590 um->um_tab.b_active = 1;
591 return;
592 donerecal:
593 case 3:
736772ef 594 sc->sc_recal = 0;
a6442a2f
BJ
595 um->um_tab.b_active = 0;
596 break;
736772ef
BJ
597 }
598 /*
599 * If still ``active'', then don't need any more retries.
600 */
601 if (um->um_tab.b_active) {
602 /*
603 * If we were offset positioning,
604 * return to centerline.
605 */
606 if (um->um_tab.b_errcnt >= 16) {
299d67ed 607 upaddr->upof = UPOF_FMT22;
736772ef 608 upaddr->upcs1 = UP_RTC|UP_GO|UP_IE;
299d67ed 609 while (upaddr->upds & UPDS_PIP)
736772ef 610 DELAY(25);
eb891eaa 611 needie = 0;
008c0481 612 }
736772ef
BJ
613 um->um_tab.b_active = 0;
614 um->um_tab.b_errcnt = 0;
615 um->um_tab.b_actf = dp->b_forw;
616 dp->b_active = 0;
617 dp->b_errcnt = 0;
618 dp->b_actf = bp->av_forw;
619 bp->b_resid = (-upaddr->upwc * sizeof(short));
620 iodone(bp);
621 /*
622 * If this unit has more work to do,
623 * then start it up right away.
624 */
625 if (dp->b_actf)
626 if (upustart(ui))
eb891eaa 627 needie = 0;
008c0481 628 }
736772ef 629 as &= ~(1<<ui->ui_slave);
8c58f40c
BJ
630 /*
631 * Release unibus resources and flush data paths.
632 */
633 ubadone(um);
736772ef
BJ
634doattn:
635 /*
636 * Process other units which need attention.
637 * For each unit which needs attention, call
638 * the unit start routine to place the slave
639 * on the controller device queue.
640 */
a6442a2f
BJ
641 while (unit = ffs(as)) {
642 unit--; /* was 1 origin */
643 as &= ~(1<<unit);
644 upaddr->upas = 1<<unit;
c10bcf0a 645 if (unit < UPIPUNITS && upustart(upip[sc21][unit]))
a6442a2f
BJ
646 needie = 0;
647 }
736772ef
BJ
648 /*
649 * If the controller is not transferring, but
650 * there are devices ready to transfer, start
651 * the controller.
652 */
3f3a34c3
BJ
653 if (um->um_tab.b_actf && um->um_tab.b_active == 0)
654 if (upstart(um))
eb891eaa 655 needie = 0;
2a3b9a7f 656 if (needie)
2601dfbd 657 upaddr->upcs1 = UP_IE;
008c0481
BJ
658}
659
740e4029 660upread(dev, uio)
0801d37f 661 dev_t dev;
740e4029 662 struct uio *uio;
008c0481 663{
0801d37f 664 register int unit = minor(dev) >> 3;
7e00c42b 665
0801d37f 666 if (unit >= NUP)
0cd5eac7
BJ
667 return (ENXIO);
668 return (physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys, uio));
008c0481
BJ
669}
670
002227dd 671upwrite(dev, uio)
0801d37f 672 dev_t dev;
002227dd 673 struct uio *uio;
008c0481 674{
0801d37f 675 register int unit = minor(dev) >> 3;
7e00c42b 676
0801d37f 677 if (unit >= NUP)
0cd5eac7
BJ
678 return (ENXIO);
679 return (physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys, uio));
008c0481
BJ
680}
681
7bc8d985
BJ
682/*
683 * Correct an ECC error, and restart the i/o to complete
684 * the transfer if necessary. This is quite complicated because
685 * the transfer may be going to an odd memory address base and/or
686 * across a page boundary.
687 */
3f3a34c3 688upecc(ui)
89bd2f01 689 register struct uba_device *ui;
008c0481 690{
2601dfbd 691 register struct updevice *up = (struct updevice *)ui->ui_addr;
3f3a34c3 692 register struct buf *bp = uputab[ui->ui_unit].b_actf;
89bd2f01 693 register struct uba_ctlr *um = ui->ui_mi;
3f3a34c3
BJ
694 register struct upst *st;
695 struct uba_regs *ubp = ui->ui_hd->uh_uba;
7bc8d985 696 register int i;
008c0481 697 caddr_t addr;
7bc8d985 698 int reg, bit, byte, npf, mask, o, cmd, ubaddr;
008c0481
BJ
699 int bn, cn, tn, sn;
700
008c0481 701 /*
7bc8d985
BJ
702 * Npf is the number of sectors transferred before the sector
703 * containing the ECC error, and reg is the UBA register
704 * mapping (the first part of) the transfer.
705 * O is offset within a memory page of the first byte transferred.
008c0481 706 */
7bc8d985 707 npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1;
b7333467 708 reg = btop(um->um_ubinfo&0x3ffff) + npf;
008c0481 709 o = (int)bp->b_un.b_addr & PGOFSET;
89bd2f01 710 printf("up%d%c: soft ecc sn%d\n", dkunit(bp),
0c48c799 711 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
008c0481 712 mask = up->upec2;
299d67ed 713#ifdef UPECCDEBUG
8c58f40c
BJ
714 printf("npf %d reg %x o %d mask %o pos %d\n", npf, reg, o, mask,
715 up->upec1);
299d67ed 716#endif
7bc8d985
BJ
717 /*
718 * Flush the buffered data path, and compute the
719 * byte and bit position of the error. The variable i
720 * is the byte offset in the transfer, the variable byte
721 * is the offset from a page boundary in main memory.
722 */
060afaf6 723 ubapurge(um);
7bc8d985
BJ
724 i = up->upec1 - 1; /* -1 makes 0 origin */
725 bit = i&07;
726 i = (i&~07)>>3;
008c0481 727 byte = i + o;
7bc8d985
BJ
728 /*
729 * Correct while possible bits remain of mask. Since mask
730 * contains 11 bits, we continue while the bit offset is > -11.
731 * Also watch out for end of this block and the end of the whole
732 * transfer.
733 */
734 while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
735 addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+
736 (byte & PGOFSET);
299d67ed 737#ifdef UPECCDEBUG
8c58f40c
BJ
738 printf("addr %x map reg %x\n",
739 addr, *(int *)(&ubp->uba_map[reg+btop(byte)]));
740 printf("old: %x, ", getmemc(addr));
299d67ed 741#endif
7bc8d985 742 putmemc(addr, getmemc(addr)^(mask<<bit));
299d67ed 743#ifdef UPECCDEBUG
8c58f40c 744 printf("new: %x\n", getmemc(addr));
299d67ed 745#endif
7bc8d985
BJ
746 byte++;
747 i++;
748 bit -= 8;
008c0481 749 }
55de6ac9
BJ
750 if (up->upwc == 0) {
751 um->um_tab.b_active = 0;
008c0481 752 return (0);
55de6ac9 753 }
7bc8d985
BJ
754 /*
755 * Have to continue the transfer... clear the drive,
756 * and compute the position where the transfer is to continue.
757 * We have completed npf+1 sectors of the transfer already;
758 * restart at offset o of next sector (i.e. in UBA register reg+1).
759 */
2601dfbd
BJ
760#ifdef notdef
761 up->uper1 = 0;
762 up->upcs1 |= UP_GO;
763#else
764 up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
008c0481 765 bn = dkblock(bp);
3f3a34c3 766 st = &upst[ui->ui_type];
008c0481 767 cn = bp->b_cylin;
3f3a34c3
BJ
768 sn = bn%st->nspc + npf + 1;
769 tn = sn/st->nsect;
770 sn %= st->nsect;
771 cn += tn/st->ntrak;
772 tn %= st->ntrak;
008c0481 773 up->updc = cn;
7bc8d985
BJ
774 up->upda = (tn << 8) | sn;
775 ubaddr = (int)ptob(reg+1) + o;
776 up->upba = ubaddr;
777 cmd = (ubaddr >> 8) & 0x300;
2601dfbd 778 cmd |= UP_IE|UP_GO|UP_RCOM;
de59ccc2 779 um->um_tab.b_active = 2; /* continuing transfer ... */
7bc8d985 780 up->upcs1 = cmd;
2601dfbd 781#endif
008c0481
BJ
782 return (1);
783}
977c2848
BJ
784
785/*
786 * Reset driver after UBA init.
787 * Cancel software state of all pending transfers
788 * and restart all units and the controller.
789 */
3f3a34c3 790upreset(uban)
f6d201ff 791 int uban;
977c2848 792{
89bd2f01
BJ
793 register struct uba_ctlr *um;
794 register struct uba_device *ui;
3f3a34c3
BJ
795 register sc21, unit;
796
a3cb8f60 797 for (sc21 = 0; sc21 < NSC; sc21++) {
7e00c42b
BJ
798 if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban ||
799 um->um_alive == 0)
3f3a34c3 800 continue;
f6d201ff 801 printf(" sc%d", sc21);
3f3a34c3
BJ
802 um->um_tab.b_active = 0;
803 um->um_tab.b_actf = um->um_tab.b_actl = 0;
f6d201ff 804 up_softc[sc21].sc_recal = 0;
cc7ff771 805 up_softc[sc21].sc_wticks = 0;
b7333467
BJ
806 if (um->um_ubinfo) {
807 printf("<%d>", (um->um_ubinfo>>28)&0xf);
0801d37f 808 ubadone(um);
3f3a34c3 809 }
299d67ed 810 ((struct updevice *)(um->um_addr))->upcs2 = UPCS2_CLR;
3f3a34c3
BJ
811 for (unit = 0; unit < NUP; unit++) {
812 if ((ui = updinfo[unit]) == 0)
813 continue;
f6d201ff 814 if (ui->ui_alive == 0 || ui->ui_mi != um)
3f3a34c3
BJ
815 continue;
816 uputab[unit].b_active = 0;
817 (void) upustart(ui);
818 }
819 (void) upstart(um);
977c2848 820 }
977c2848 821}
6a81870e
BJ
822
823/*
824 * Wake up every second and if an interrupt is pending
825 * but nothing has happened increment a counter.
f6d201ff 826 * If nothing happens for 20 seconds, reset the UNIBUS
6a81870e
BJ
827 * and begin anew.
828 */
829upwatch()
830{
89bd2f01 831 register struct uba_ctlr *um;
3f3a34c3 832 register sc21, unit;
7e00c42b 833 register struct up_softc *sc;
6a81870e 834
7780575a 835 timeout(upwatch, (caddr_t)0, hz);
a3cb8f60 836 for (sc21 = 0; sc21 < NSC; sc21++) {
3f3a34c3 837 um = upminfo[sc21];
7e00c42b
BJ
838 if (um == 0 || um->um_alive == 0)
839 continue;
840 sc = &up_softc[sc21];
3f3a34c3
BJ
841 if (um->um_tab.b_active == 0) {
842 for (unit = 0; unit < NUP; unit++)
2601dfbd
BJ
843 if (uputab[unit].b_active &&
844 updinfo[unit]->ui_mi == um)
3f3a34c3 845 goto active;
7e00c42b 846 sc->sc_wticks = 0;
3f3a34c3
BJ
847 continue;
848 }
f6d201ff 849active:
7e00c42b
BJ
850 sc->sc_wticks++;
851 if (sc->sc_wticks >= 20) {
852 sc->sc_wticks = 0;
f6d201ff 853 printf("sc%d: lost interrupt\n", sc21);
a3cb8f60 854 ubareset(um->um_ubanum);
3f3a34c3 855 }
6a81870e
BJ
856 }
857}
0ff318b2
BJ
858
859#define DBSIZE 20
860
861updump(dev)
862 dev_t dev;
863{
2601dfbd 864 struct updevice *upaddr;
0ff318b2 865 char *start;
a0eab615 866 int num, blk, unit;
0ff318b2 867 struct size *sizes;
3f3a34c3 868 register struct uba_regs *uba;
89bd2f01 869 register struct uba_device *ui;
0ff318b2 870 register short *rp;
3f3a34c3 871 struct upst *st;
cd8ce595 872 register int retry;
0ff318b2 873
0ff318b2 874 unit = minor(dev) >> 3;
0c48c799
BJ
875 if (unit >= NUP)
876 return (ENXIO);
7e00c42b 877#define phys(cast, addr) ((cast)((int)addr & 0x7fffffff))
89bd2f01 878 ui = phys(struct uba_device *, updinfo[unit]);
0c48c799
BJ
879 if (ui->ui_alive == 0)
880 return (ENXIO);
3f3a34c3 881 uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba;
89bd2f01 882 ubainit(uba);
2601dfbd 883 upaddr = (struct updevice *)ui->ui_physaddr;
cd8ce595 884 DELAY(5000000);
3f3a34c3 885 num = maxfree;
0ff318b2 886 upaddr->upcs2 = unit;
89bd2f01 887 DELAY(100);
cd8ce595
SL
888 upaddr->upcs1 = UP_DCLR|UP_GO;
889 upaddr->upcs1 = UP_PRESET|UP_GO;
890 upaddr->upof = UPOF_FMT22;
891 retry = 0;
892 do {
893 DELAY(25);
894 if (++retry > 527)
895 break;
0599cbf1 896 } while ((upaddr->upds & UP_RDY) == 0);
299d67ed 897 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY)
0c48c799 898 return (EFAULT);
cd8ce595 899 start = 0;
7e00c42b 900 st = &upst[ui->ui_type];
3f3a34c3 901 sizes = phys(struct size *, st->sizes);
0c48c799
BJ
902 if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks)
903 return (EINVAL);
0ff318b2
BJ
904 while (num > 0) {
905 register struct pte *io;
906 register int i;
907 int cn, sn, tn;
908 daddr_t bn;
909
910 blk = num > DBSIZE ? DBSIZE : num;
3f3a34c3 911 io = uba->uba_map;
0ff318b2 912 for (i = 0; i < blk; i++)
89bd2f01 913 *(int *)io++ = (btop(start)+i) | (1<<21) | UBAMR_MRV;
0ff318b2
BJ
914 *(int *)io = 0;
915 bn = dumplo + btop(start);
71236e46
BJ
916 cn = bn/st->nspc + sizes[minor(dev)&07].cyloff;
917 sn = bn%st->nspc;
918 tn = sn/st->nsect;
919 sn = sn%st->nsect;
0ff318b2
BJ
920 upaddr->updc = cn;
921 rp = (short *) &upaddr->upda;
922 *rp = (tn << 8) + sn;
923 *--rp = 0;
924 *--rp = -blk*NBPG / sizeof (short);
2601dfbd 925 *--rp = UP_GO|UP_WCOM;
cd8ce595 926 retry = 0;
0ff318b2
BJ
927 do {
928 DELAY(25);
cd8ce595
SL
929 if (++retry > 527)
930 break;
2601dfbd 931 } while ((upaddr->upcs1 & UP_RDY) == 0);
cd8ce595 932 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
0599cbf1 933 printf("up%d: not ready", unit);
cd8ce595
SL
934 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
935 printf("\n");
936 return (EIO);
937 }
938 printf(" (flakey)\n");
939 }
299d67ed 940 if (upaddr->upds&UPDS_ERR)
0c48c799 941 return (EIO);
0ff318b2
BJ
942 start += blk*NBPG;
943 num -= blk;
944 }
0ff318b2
BJ
945 return (0);
946}
63c35a63 947#endif