Commit | Line | Data |
---|---|---|
43b01214 | 1 | /* hp.c 6.2 83/09/25 */ |
b70e4030 BJ |
2 | |
3 | #ifdef HPDEBUG | |
6ac24ecd | 4 | int hpdebug; |
b70e4030 BJ |
5 | #endif |
6 | #ifdef HPBDEBUG | |
7 | int hpbdebug; | |
8 | #endif | |
04b9d53d | 9 | |
66b4fb09 | 10 | #include "hp.h" |
a5cc519e | 11 | #if NHP > 0 |
04b9d53d | 12 | /* |
b19f1d3a | 13 | * HP disk driver for RP0x+RMxx+ML11 |
1b81ee79 BJ |
14 | * |
15 | * TODO: | |
b70e4030 | 16 | * check RM80 skip sector handling when ECC's occur later |
d565635a | 17 | * check offset recovery handling |
b70e4030 BJ |
18 | * see if DCLR and/or RELEASE set attention status |
19 | * print bits of mr && mr2 symbolically | |
04b9d53d | 20 | */ |
961945a8 | 21 | #include "../machine/pte.h" |
04b9d53d BJ |
22 | |
23 | #include "../h/param.h" | |
24 | #include "../h/systm.h" | |
41888f16 | 25 | #include "../h/dk.h" |
04b9d53d BJ |
26 | #include "../h/buf.h" |
27 | #include "../h/conf.h" | |
28 | #include "../h/dir.h" | |
29 | #include "../h/user.h" | |
30 | #include "../h/map.h" | |
c895c266 | 31 | #include "../vax/mtpr.h" |
80e7c811 | 32 | #include "../h/vm.h" |
e3b4b145 | 33 | #include "../h/cmap.h" |
b70e4030 | 34 | #include "../h/dkbad.h" |
942f05a9 | 35 | #include "../h/ioctl.h" |
deb8980a | 36 | #include "../h/uio.h" |
04b9d53d | 37 | |
f13af4da | 38 | #include "../vax/dkio.h" |
c895c266 BJ |
39 | #include "../vaxmba/mbareg.h" |
40 | #include "../vaxmba/mbavar.h" | |
41 | #include "../vaxmba/hpreg.h" | |
04b9d53d | 42 | |
b81fd3e8 BJ |
43 | /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ |
44 | struct size { | |
04b9d53d BJ |
45 | daddr_t nblocks; |
46 | int cyloff; | |
d07ce937 | 47 | } rp06_sizes[8] = { |
5c777efe BJ |
48 | 15884, 0, /* A=cyl 0 thru 37 */ |
49 | 33440, 38, /* B=cyl 38 thru 117 */ | |
50 | 340670, 0, /* C=cyl 0 thru 814 */ | |
d07ce937 SL |
51 | 15884, 118, /* D=cyl 118 thru 155 */ |
52 | 55936, 156, /* E=cyl 156 thru 289 */ | |
53 | 219384, 290, /* F=cyl 290 thru 814 */ | |
e897671e | 54 | 291280, 118, /* G=cyl 118 thru 814 */ |
04b9d53d | 55 | 0, 0, |
d07ce937 SL |
56 | }, rp05_sizes[8] = { |
57 | 15884, 0, /* A=cyl 0 thru 37 */ | |
58 | 33440, 38, /* B=cyl 38 thru 117 */ | |
59 | 171798, 0, /* C=cyl 0 thru 410 */ | |
60 | 15884, 118, /* D=cyl 118 thru 155 */ | |
61 | 55936, 156, /* E=cyl 156 thru 289 */ | |
62 | 50512, 290, /* F=cyl 290 thru 410 */ | |
63 | 122408, 118, /* G=cyl 118 thru 410 */ | |
64 | 0, 0, | |
65 | }, rm03_sizes[8] = { | |
5c777efe | 66 | 15884, 0, /* A=cyl 0 thru 99 */ |
d07ce937 | 67 | 33440, 100, /* B=cyl 100 thru 308 */ |
5c777efe | 68 | 131680, 0, /* C=cyl 0 thru 822 */ |
d07ce937 SL |
69 | 15884, 309, /* D=cyl 309 thru 408 */ |
70 | 55936, 409, /* E=cyl 409 thru 758 */ | |
71 | 10144, 759, /* F=cyl 759 thru 822 */ | |
d07ce937 | 72 | 82144, 309, /* G=cyl 309 thru 822 */ |
04b9d53d | 73 | 0, 0, |
d07ce937 | 74 | }, rm05_sizes[8] = { |
5c777efe BJ |
75 | 15884, 0, /* A=cyl 0 thru 26 */ |
76 | 33440, 27, /* B=cyl 27 thru 81 */ | |
e83ccfd7 | 77 | 500384, 0, /* C=cyl 0 thru 822 */ |
5c777efe BJ |
78 | 15884, 562, /* D=cyl 562 thru 588 */ |
79 | 55936, 589, /* E=cyl 589 thru 680 */ | |
e897671e BJ |
80 | 86240, 681, /* F=cyl 681 thru 822 */ |
81 | 158592, 562, /* G=cyl 562 thru 822 */ | |
5c777efe | 82 | 291346, 82, /* H=cyl 82 thru 561 */ |
b81fd3e8 BJ |
83 | }, rm80_sizes[8] = { |
84 | 15884, 0, /* A=cyl 0 thru 36 */ | |
85 | 33440, 37, /* B=cyl 37 thru 114 */ | |
86 | 242606, 0, /* C=cyl 0 thru 558 */ | |
d07ce937 SL |
87 | 15884, 115, /* D=cyl 115 thru 151 */ |
88 | 55936, 152, /* E=cyl 152 thru 280 */ | |
89 | 120559, 281, /* F=cyl 281 thru 558 */ | |
90 | 192603, 115, /* G=cyl 115 thru 558 */ | |
b81fd3e8 | 91 | 0, 0, |
d07ce937 | 92 | }, rp07_sizes[8] = { |
822a683f | 93 | 15884, 0, /* A=cyl 0 thru 9 */ |
d07ce937 SL |
94 | 66880, 10, /* B=cyl 10 thru 51 */ |
95 | 1008000, 0, /* C=cyl 0 thru 629 */ | |
96 | 15884, 235, /* D=cyl 235 thru 244 */ | |
97 | 307200, 245, /* E=cyl 245 thru 436 */ | |
98 | 308650, 437, /* F=cyl 437 thru 629 */ | |
99 | 631850, 235, /* G=cyl 235 thru 629 */ | |
100 | 291346, 52, /* H=cyl 52 thru 234 */ | |
101 | }, cdc9775_sizes[8] = { | |
102 | 15884, 0, /* A=cyl 0 thru 12 */ | |
103 | 66880, 13, /* B=cyl 13 thru 65 */ | |
43b01214 | 104 | 1077760, 0, /* C=cyl 0 thru 841 */ |
d07ce937 SL |
105 | 15884, 294, /* D=cyl 294 thru 306 */ |
106 | 307200, 307, /* E=cyl 307 thru 546 */ | |
43b01214 MK |
107 | 377440, 547, /* F=cyl 547 thru 841 */ |
108 | 701280, 294, /* G=cyl 294 thru 841 */ | |
d07ce937 SL |
109 | 291346, 66, /* H=cyl 66 thru 293 */ |
110 | }, cdc9730_sizes[8] = { | |
822a683f SL |
111 | 15884, 0, /* A=cyl 0 thru 49 */ |
112 | 33440, 50, /* B=cyl 50 thru 154 */ | |
113 | 263360, 0, /* C=cyl 0 thru 822 */ | |
d07ce937 SL |
114 | 15884, 155, /* D=cyl 155 thru 204 */ |
115 | 55936, 205, /* E=cyl 205 thru 379 */ | |
116 | 141664, 380, /* F=cyl 380 thru 822 */ | |
117 | 213664, 155, /* G=cyl 155 thru 822 */ | |
822a683f | 118 | 0, 0, |
d07ce937 | 119 | }, capricorn_sizes[8] = { |
822a683f SL |
120 | 15884, 0, /* A=cyl 0 thru 31 */ |
121 | 33440, 32, /* B=cyl 32 thru 97 */ | |
122 | 524288, 0, /* C=cyl 0 thru 1023 */ | |
d07ce937 SL |
123 | 15884, 668, /* D=cyl 668 thru 699 */ |
124 | 55936, 700, /* E=cyl 700 thru 809 */ | |
125 | 109472, 810, /* F=cyl 810 thru 1023 */ | |
126 | 182176, 668, /* G=cyl 668 thru 1023 */ | |
822a683f | 127 | 291346, 98, /* H=cyl 98 thru 667 */ |
d07ce937 | 128 | }, eagle_sizes[8] = { |
d07ce937 SL |
129 | 15884, 0, /* A=cyl 0 thru 16 */ |
130 | 66880, 17, /* B=cyl 17 thru 86 */ | |
abf739bc | 131 | 808320, 0, /* C=cyl 0 thru 841 */ |
d07ce937 SL |
132 | 15884, 391, /* D=cyl 391 thru 407 */ |
133 | 307200, 408, /* E=cyl 408 thru 727 */ | |
abf739bc SL |
134 | 109296, 728, /* F=cyl 728 thru 841 */ |
135 | 432816, 391, /* G=cyl 391 thru 841 */ | |
d07ce937 | 136 | 291346, 87, /* H=cyl 87 thru 390 */ |
21d26e19 | 137 | }, ampex_sizes[8] = { |
f68569f0 SL |
138 | 15884, 0, /* A=cyl 0 thru 26 */ |
139 | 33440, 27, /* B=cyl 27 thru 81 */ | |
16639614 | 140 | 495520, 0, /* C=cyl 0 thru 814 */ |
f68569f0 SL |
141 | 15884, 562, /* D=cyl 562 thru 588 */ |
142 | 55936, 589, /* E=cyl 589 thru 680 */ | |
16639614 HS |
143 | 81312, 681, /* F=cyl 681 thru 814 */ |
144 | 153664, 562, /* G=cyl 562 thru 814 */ | |
f68569f0 | 145 | 291346, 82, /* H=cyl 82 thru 561 */ |
04b9d53d | 146 | }; |
b81fd3e8 | 147 | /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ |
04b9d53d | 148 | |
822a683f SL |
149 | /* |
150 | * Table for converting Massbus drive types into | |
151 | * indices into the partition tables. Slots are | |
152 | * left for those drives devined from other means | |
153 | * (e.g. SI, AMPEX, etc.). | |
154 | */ | |
155 | short hptypes[] = { | |
156 | #define HPDT_RM03 0 | |
157 | MBDT_RM03, | |
158 | #define HPDT_RM05 1 | |
159 | MBDT_RM05, | |
160 | #define HPDT_RP06 2 | |
161 | MBDT_RP06, | |
162 | #define HPDT_RM80 3 | |
163 | MBDT_RM80, | |
28b0477e SL |
164 | #define HPDT_RP04 4 |
165 | MBDT_RP04, | |
166 | #define HPDT_RP05 5 | |
822a683f | 167 | MBDT_RP05, |
28b0477e | 168 | #define HPDT_RP07 6 |
822a683f | 169 | MBDT_RP07, |
28b0477e | 170 | #define HPDT_ML11A 7 |
822a683f | 171 | MBDT_ML11A, |
28b0477e | 172 | #define HPDT_ML11B 8 |
822a683f | 173 | MBDT_ML11B, |
28b0477e | 174 | #define HPDT_9775 9 |
822a683f | 175 | -1, |
28b0477e | 176 | #define HPDT_9730 10 |
822a683f | 177 | -1, |
28b0477e | 178 | #define HPDT_CAPRICORN 11 |
822a683f | 179 | -1, |
28b0477e | 180 | #define HPDT_EAGLE 12 |
e74d4c15 | 181 | -1, |
28b0477e | 182 | #define HPDT_9300 13 |
f68569f0 | 183 | -1, |
28b0477e | 184 | #define HPDT_RM02 14 |
e74d4c15 | 185 | MBDT_RM02, /* beware, actually capricorn or eagle */ |
822a683f SL |
186 | 0 |
187 | }; | |
4a4e3072 | 188 | struct mba_device *hpinfo[NHP]; |
5530f6f7 | 189 | int hpattach(),hpustart(),hpstart(),hpdtint(); |
b81fd3e8 | 190 | struct mba_driver hpdriver = |
4a4e3072 BJ |
191 | { hpattach, 0, hpustart, hpstart, hpdtint, 0, |
192 | hptypes, "hp", 0, hpinfo }; | |
b81fd3e8 | 193 | |
fb93d0ee SL |
194 | /* |
195 | * Beware, sdist and rdist are not well tuned | |
196 | * for many of the drives listed in this table. | |
197 | * Try patching things with something i/o intensive | |
198 | * running and watch iostat. | |
199 | */ | |
b81fd3e8 | 200 | struct hpst { |
fb93d0ee SL |
201 | short nsect; /* # sectors/track */ |
202 | short ntrak; /* # tracks/cylinder */ | |
203 | short nspc; /* # sector/cylinders */ | |
204 | short ncyl; /* # cylinders */ | |
205 | struct size *sizes; /* partition tables */ | |
206 | short sdist; /* seek distance metric */ | |
207 | short rdist; /* rotational distance metric */ | |
b81fd3e8 | 208 | } hpst[] = { |
fb93d0ee SL |
209 | { 32, 5, 32*5, 823, rm03_sizes, 3, 4 }, /* RM03 */ |
210 | { 32, 19, 32*19, 823, rm05_sizes, 3, 4 }, /* RM05 */ | |
211 | { 22, 19, 22*19, 815, rp06_sizes, 3, 4 }, /* RP06 */ | |
212 | { 31, 14, 31*14, 559, rm80_sizes, 3, 4 }, /* RM80 */ | |
28b0477e | 213 | { 22, 19, 22*19, 411, rp05_sizes, 3, 4 }, /* RP04 */ |
fb93d0ee SL |
214 | { 22, 19, 22*19, 411, rp05_sizes, 3, 4 }, /* RP05 */ |
215 | { 50, 32, 50*32, 630, rp07_sizes, 7, 8 }, /* RP07 */ | |
216 | { 1, 1, 1, 1, 0, 0, 0 }, /* ML11A */ | |
217 | { 1, 1, 1, 1, 0, 0, 0 }, /* ML11B */ | |
218 | { 32, 40, 32*40, 843, cdc9775_sizes, 3, 4 }, /* 9775 */ | |
219 | { 32, 10, 32*10, 823, cdc9730_sizes, 3, 4 }, /* 9730 */ | |
220 | { 32, 16, 32*16, 1024, capricorn_sizes,7, 8 }, /* Capricorn */ | |
221 | { 48, 20, 48*20, 842, eagle_sizes, 7, 8 }, /* EAGLE */ | |
21d26e19 | 222 | { 32, 19, 32*19, 815, ampex_sizes, 3, 4 }, /* 9300 */ |
b81fd3e8 BJ |
223 | }; |
224 | ||
804f6eab | 225 | u_char hp_offset[16] = { |
d565635a BJ |
226 | HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, |
227 | HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, | |
228 | HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, | |
229 | 0, 0, 0, 0, | |
04b9d53d BJ |
230 | }; |
231 | ||
804f6eab | 232 | struct buf rhpbuf[NHP]; |
b70e4030 BJ |
233 | struct buf bhpbuf[NHP]; |
234 | struct dkbad hpbad[NHP]; | |
c983ca83 SL |
235 | |
236 | struct hpsoftc { | |
237 | u_char sc_hpinit; /* drive initialized */ | |
238 | u_char sc_recal; /* recalibrate state */ | |
239 | u_char sc_hdr; /* next i/o includes header */ | |
240 | u_char sc_doseeks; /* perform explicit seeks */ | |
241 | daddr_t sc_mlsize; /* ML11 size */ | |
242 | } hpsoftc[NHP]; | |
04b9d53d BJ |
243 | |
244 | #define b_cylin b_resid | |
245 | ||
b19f1d3a BJ |
246 | /* #define ML11 0 to remove ML11 support */ |
247 | #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) | |
248 | #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) | |
249 | #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) | |
250 | ||
0be277a1 SL |
251 | #define MASKREG(reg) ((reg)&0xffff) |
252 | ||
04b9d53d BJ |
253 | #ifdef INTRLVE |
254 | daddr_t dkblock(); | |
255 | #endif | |
71236e46 | 256 | |
4a4e3072 BJ |
257 | /*ARGSUSED*/ |
258 | hpattach(mi, slave) | |
2be84ab1 | 259 | register struct mba_device *mi; |
71236e46 | 260 | { |
822a683f | 261 | |
2be84ab1 SL |
262 | mi->mi_type = hpmaptype(mi); |
263 | if (!ML11 && mi->mi_dk >= 0) { | |
264 | struct hpst *st = &hpst[mi->mi_type]; | |
265 | ||
266 | dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); | |
267 | } | |
268 | } | |
269 | ||
270 | /* | |
271 | * Map apparent MASSBUS drive type into manufacturer | |
272 | * specific configuration. For SI controllers this is done | |
273 | * based on codes in the serial number register. For | |
274 | * EMULEX controllers, the track and sector attributes are | |
275 | * used when the drive type is an RM02 (not supported by DEC). | |
276 | */ | |
277 | hpmaptype(mi) | |
278 | register struct mba_device *mi; | |
279 | { | |
280 | register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; | |
281 | register int type = mi->mi_type; | |
822a683f SL |
282 | |
283 | /* | |
f68569f0 | 284 | * Model-byte processing for SI controllers. |
822a683f SL |
285 | * NB: Only deals with RM03 and RM05 emulations. |
286 | */ | |
2be84ab1 SL |
287 | if (type == HPDT_RM03 || type == HPDT_RM05) { |
288 | int hpsn = hpaddr->hpsn; | |
822a683f | 289 | |
822a683f | 290 | if ((hpsn & SIMB_LU) != mi->mi_drive) |
2be84ab1 | 291 | return (type); |
822a683f SL |
292 | switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { |
293 | ||
294 | case SI9775D: | |
f68569f0 | 295 | printf("hp%d: 9775 (direct)\n", mi->mi_unit); |
2be84ab1 | 296 | type = HPDT_9775; |
822a683f SL |
297 | break; |
298 | ||
299 | case SI9730D: | |
f68569f0 | 300 | printf("hp%d: 9730 (direct)\n", mi->mi_unit); |
2be84ab1 | 301 | type = HPDT_9730; |
822a683f SL |
302 | break; |
303 | ||
dae6f30b | 304 | /* |
f68569f0 SL |
305 | * Beware, since the only SI controller we |
306 | * have has a 9300 instead of a 9766, we map the | |
307 | * drive type into the 9300. This means that | |
308 | * on a 9766 you lose the last 8 cylinders (argh). | |
dae6f30b | 309 | */ |
822a683f | 310 | case SI9766: |
f68569f0 SL |
311 | printf("hp%d: 9300\n", mi->mi_unit); |
312 | type = HPDT_9300; | |
822a683f SL |
313 | break; |
314 | ||
315 | case SI9762: | |
316 | printf("hp%d: 9762\n", mi->mi_unit); | |
2be84ab1 | 317 | type = HPDT_RM03; |
822a683f | 318 | break; |
f68569f0 SL |
319 | |
320 | case SICAPD: | |
321 | printf("hp%d: capricorn\n", mi->mi_unit); | |
322 | type = HPDT_CAPRICORN; | |
323 | break; | |
324 | ||
325 | case SI9751D: | |
326 | printf("hp%d: eagle\n", mi->mi_unit); | |
327 | type = HPDT_EAGLE; | |
328 | break; | |
822a683f | 329 | } |
2be84ab1 SL |
330 | return (type); |
331 | } | |
822a683f SL |
332 | |
333 | /* | |
2be84ab1 | 334 | * EMULEX SC750 or SC780. Poke the holding register. |
822a683f | 335 | */ |
2be84ab1 SL |
336 | if (type == HPDT_RM02) { |
337 | int ntracks, nsectors; | |
338 | ||
a02e9248 SL |
339 | hpaddr->hpof = HPOF_FMT22; |
340 | mbclrattn(mi); | |
822a683f SL |
341 | hpaddr->hpcs1 = HP_NOP; |
342 | hpaddr->hphr = HPHR_MAXTRAK; | |
0be277a1 | 343 | ntracks = MASKREG(hpaddr->hphr) + 1; |
7ca1a4fe | 344 | if (ntracks == 16) { |
822a683f | 345 | printf("hp%d: capricorn\n", mi->mi_unit); |
2be84ab1 SL |
346 | type = HPDT_CAPRICORN; |
347 | goto done; | |
348 | } | |
28b0477e SL |
349 | if (ntracks == 19) { |
350 | printf("hp%d: 9300\n", mi->mi_unit); | |
351 | type = HPDT_9300; | |
352 | goto done; | |
353 | } | |
2be84ab1 SL |
354 | hpaddr->hpcs1 = HP_NOP; |
355 | hpaddr->hphr = HPHR_MAXSECT; | |
0be277a1 | 356 | nsectors = MASKREG(hpaddr->hphr) + 1; |
a02e9248 | 357 | if (ntracks == 20 && nsectors == 48) { |
2be84ab1 | 358 | type = HPDT_EAGLE; |
d07ce937 | 359 | printf("hp%d: eagle\n", mi->mi_unit); |
a02e9248 | 360 | goto done; |
2be84ab1 | 361 | } |
a02e9248 | 362 | printf("hp%d: ntracks %d, nsectors %d: unknown device\n", |
28b0477e | 363 | mi->mi_unit, ntracks, nsectors); |
2be84ab1 | 364 | done: |
822a683f | 365 | hpaddr->hpcs1 = HP_DCLR|HP_GO; |
a02e9248 | 366 | mbclrattn(mi); /* conservative */ |
2be84ab1 SL |
367 | return (type); |
368 | } | |
822a683f | 369 | |
2be84ab1 SL |
370 | /* |
371 | * Map all ML11's to the same type. Also calculate | |
372 | * transfer rates based on device characteristics. | |
373 | */ | |
374 | if (type == HPDT_ML11A || type == HPDT_ML11B) { | |
c983ca83 SL |
375 | register struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; |
376 | register int trt; | |
b19f1d3a | 377 | |
c983ca83 | 378 | sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ; |
b19f1d3a | 379 | if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) |
c983ca83 | 380 | sc->sc_mlsize >>= 2; |
b19f1d3a BJ |
381 | if (mi->mi_dk >= 0) { |
382 | trt = (hpaddr->hpmr & HPMR_TRT) >> 8; | |
383 | dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); | |
384 | } | |
2be84ab1 | 385 | type = HPDT_ML11A; |
b19f1d3a | 386 | } |
2be84ab1 | 387 | return (type); |
71236e46 BJ |
388 | } |
389 | ||
473a2e47 BJ |
390 | hpopen(dev) |
391 | dev_t dev; | |
392 | { | |
393 | register int unit = minor(dev) >> 3; | |
394 | register struct mba_device *mi; | |
395 | ||
396 | if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) | |
397 | return (ENXIO); | |
398 | return (0); | |
399 | } | |
400 | ||
04b9d53d | 401 | hpstrategy(bp) |
b81fd3e8 | 402 | register struct buf *bp; |
04b9d53d | 403 | { |
4a4e3072 | 404 | register struct mba_device *mi; |
b81fd3e8 BJ |
405 | register struct hpst *st; |
406 | register int unit; | |
04b9d53d | 407 | long sz, bn; |
b81fd3e8 | 408 | int xunit = minor(bp->b_dev) & 07; |
530d0032 | 409 | int s; |
04b9d53d | 410 | |
04b9d53d BJ |
411 | sz = bp->b_bcount; |
412 | sz = (sz+511) >> 9; | |
413 | unit = dkunit(bp); | |
b81fd3e8 BJ |
414 | if (unit >= NHP) |
415 | goto bad; | |
416 | mi = hpinfo[unit]; | |
3f3a34c3 | 417 | if (mi == 0 || mi->mi_alive == 0) |
b81fd3e8 BJ |
418 | goto bad; |
419 | st = &hpst[mi->mi_type]; | |
b19f1d3a | 420 | if (ML11) { |
c983ca83 SL |
421 | struct hpsoftc *sc = &hpsoftc[unit]; |
422 | ||
b19f1d3a | 423 | if (bp->b_blkno < 0 || |
c983ca83 | 424 | dkblock(bp)+sz > sc->sc_mlsize) |
b19f1d3a BJ |
425 | goto bad; |
426 | bp->b_cylin = 0; | |
427 | } else { | |
428 | if (bp->b_blkno < 0 || | |
429 | (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) | |
430 | goto bad; | |
431 | bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; | |
432 | } | |
530d0032 | 433 | s = spl5(); |
b81fd3e8 BJ |
434 | disksort(&mi->mi_tab, bp); |
435 | if (mi->mi_tab.b_active == 0) | |
436 | mbustart(mi); | |
530d0032 | 437 | splx(s); |
b81fd3e8 BJ |
438 | return; |
439 | ||
440 | bad: | |
441 | bp->b_flags |= B_ERROR; | |
442 | iodone(bp); | |
443 | return; | |
04b9d53d BJ |
444 | } |
445 | ||
b81fd3e8 | 446 | hpustart(mi) |
4a4e3072 | 447 | register struct mba_device *mi; |
04b9d53d | 448 | { |
804f6eab | 449 | register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; |
b81fd3e8 | 450 | register struct buf *bp = mi->mi_tab.b_actf; |
a02e9248 | 451 | register struct hpst *st; |
c983ca83 | 452 | struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; |
04b9d53d | 453 | daddr_t bn; |
a0eab615 | 454 | int sn, dist; |
04b9d53d | 455 | |
a02e9248 | 456 | st = &hpst[mi->mi_type]; |
b70e4030 | 457 | hpaddr->hpcs1 = 0; |
804f6eab | 458 | if ((hpaddr->hpcs1&HP_DVA) == 0) |
b81fd3e8 | 459 | return (MBU_BUSY); |
c983ca83 | 460 | if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) { |
b70e4030 | 461 | struct buf *bbp = &bhpbuf[mi->mi_unit]; |
b70e4030 | 462 | |
c983ca83 | 463 | sc->sc_hpinit = 1; |
804f6eab | 464 | hpaddr->hpcs1 = HP_DCLR|HP_GO; |
27a897a2 BJ |
465 | if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) |
466 | printf("DCLR attn\n"); | |
804f6eab | 467 | hpaddr->hpcs1 = HP_PRESET|HP_GO; |
b19f1d3a BJ |
468 | if (!ML11) |
469 | hpaddr->hpof = HPOF_FMT22; | |
27a897a2 | 470 | mbclrattn(mi); |
b19f1d3a BJ |
471 | if (!ML11) { |
472 | bbp->b_flags = B_READ|B_BUSY; | |
473 | bbp->b_dev = bp->b_dev; | |
474 | bbp->b_bcount = 512; | |
475 | bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; | |
476 | bbp->b_blkno = st->ncyl*st->nspc - st->nsect; | |
477 | bbp->b_cylin = st->ncyl - 1; | |
478 | mi->mi_tab.b_actf = bbp; | |
479 | bbp->av_forw = bp; | |
480 | bp = bbp; | |
481 | } | |
04b9d53d | 482 | } |
71236e46 | 483 | if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) |
b81fd3e8 | 484 | return (MBU_DODATA); |
b19f1d3a BJ |
485 | if (ML11) |
486 | return (MBU_DODATA); | |
d565635a | 487 | if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) |
b81fd3e8 | 488 | return (MBU_DODATA); |
3f3a34c3 BJ |
489 | bn = dkblock(bp); |
490 | sn = bn%st->nspc; | |
fb93d0ee | 491 | sn = (sn + st->nsect - st->sdist) % st->nsect; |
0be277a1 | 492 | if (bp->b_cylin == MASKREG(hpaddr->hpdc)) { |
5d3fd70b | 493 | if (sc->sc_doseeks) |
b81fd3e8 | 494 | return (MBU_DODATA); |
0be277a1 | 495 | dist = (MASKREG(hpaddr->hpla) >> 6) - st->nsect + 1; |
b81fd3e8 BJ |
496 | if (dist < 0) |
497 | dist += st->nsect; | |
fb93d0ee | 498 | if (dist > st->nsect - st->rdist) |
b81fd3e8 | 499 | return (MBU_DODATA); |
0801d37f BJ |
500 | } else |
501 | hpaddr->hpdc = bp->b_cylin; | |
5d3fd70b | 502 | if (sc->sc_doseeks) |
804f6eab | 503 | hpaddr->hpcs1 = HP_SEEK|HP_GO; |
41888f16 BJ |
504 | else { |
505 | hpaddr->hpda = sn; | |
804f6eab | 506 | hpaddr->hpcs1 = HP_SEARCH|HP_GO; |
41888f16 | 507 | } |
b81fd3e8 | 508 | return (MBU_STARTED); |
04b9d53d BJ |
509 | } |
510 | ||
b81fd3e8 | 511 | hpstart(mi) |
4a4e3072 | 512 | register struct mba_device *mi; |
04b9d53d | 513 | { |
804f6eab | 514 | register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; |
b81fd3e8 BJ |
515 | register struct buf *bp = mi->mi_tab.b_actf; |
516 | register struct hpst *st = &hpst[mi->mi_type]; | |
c983ca83 | 517 | struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; |
04b9d53d | 518 | daddr_t bn; |
b81fd3e8 | 519 | int sn, tn; |
04b9d53d | 520 | |
04b9d53d | 521 | bn = dkblock(bp); |
b19f1d3a BJ |
522 | if (ML11) |
523 | hpaddr->hpda = bn; | |
524 | else { | |
525 | sn = bn%st->nspc; | |
526 | tn = sn/st->nsect; | |
527 | sn %= st->nsect; | |
528 | hpaddr->hpdc = bp->b_cylin; | |
529 | hpaddr->hpda = (tn << 8) + sn; | |
530 | } | |
c983ca83 | 531 | if (sc->sc_hdr) { |
b19f1d3a BJ |
532 | if (bp->b_flags & B_READ) |
533 | return (HP_RHDR|HP_GO); | |
534 | else | |
535 | return (HP_WHDR|HP_GO); | |
536 | } | |
537 | return (0); | |
04b9d53d BJ |
538 | } |
539 | ||
a0eab615 | 540 | hpdtint(mi, mbsr) |
4a4e3072 | 541 | register struct mba_device *mi; |
a0eab615 | 542 | int mbsr; |
04b9d53d | 543 | { |
804f6eab | 544 | register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; |
b81fd3e8 | 545 | register struct buf *bp = mi->mi_tab.b_actf; |
a02e9248 | 546 | register struct hpst *st; |
705c30ac | 547 | register int er1, er2; |
c983ca83 | 548 | struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; |
e34bc1ef | 549 | int retry = 0; |
b81fd3e8 | 550 | |
a02e9248 SL |
551 | st = &hpst[mi->mi_type]; |
552 | if (bp->b_flags&B_BAD && hpecc(mi, CONT)) | |
553 | return (MBD_RESTARTED); | |
a0eab615 | 554 | if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { |
5530f6f7 HS |
555 | er1 = hpaddr->hper1; |
556 | er2 = hpaddr->hper2; | |
b70e4030 | 557 | #ifdef HPDEBUG |
6ac24ecd | 558 | if (hpdebug) { |
b70e4030 BJ |
559 | int dc = hpaddr->hpdc, da = hpaddr->hpda; |
560 | ||
561 | printf("hperr: bp %x cyl %d blk %d as %o ", | |
562 | bp, bp->b_cylin, bp->b_blkno, | |
563 | hpaddr->hpas&0xff); | |
0be277a1 | 564 | printf("dc %x da %x\n",MASKREG(dc), MASKREG(da)); |
6ac24ecd BJ |
565 | printf("errcnt %d ", mi->mi_tab.b_errcnt); |
566 | printf("mbsr=%b ", mbsr, mbsr_bits); | |
5530f6f7 HS |
567 | printf("er1=%b er2=%b\n", MASKREG(er1), HPER1_BITS, |
568 | MASKREG(er2), HPER2_BITS); | |
6ac24ecd BJ |
569 | DELAY(1000000); |
570 | } | |
b70e4030 | 571 | #endif |
705c30ac | 572 | if (er1 & HPER1_HCRC) { |
6cee54a8 | 573 | er1 &= ~(HPER1_HCE|HPER1_FER); |
705c30ac BJ |
574 | er2 &= ~HPER2_BSE; |
575 | } | |
6cee54a8 | 576 | if (er1&HPER1_WLE) { |
fd2cb420 | 577 | printf("hp%d: write locked\n", dkunit(bp)); |
e34bc1ef | 578 | bp->b_flags |= B_ERROR; |
0be277a1 | 579 | } else if (MASKREG(er1) == HPER1_FER && RP06 && !sc->sc_hdr) { |
b19f1d3a | 580 | if (hpecc(mi, BSE)) |
0be277a1 SL |
581 | return (MBD_RESTARTED); |
582 | goto hard; | |
e34bc1ef | 583 | } else if (++mi->mi_tab.b_errcnt > 27 || |
a0eab615 | 584 | mbsr & MBSR_HARD || |
6cee54a8 | 585 | er1 & HPER1_HARD || |
c983ca83 | 586 | sc->sc_hdr || |
705c30ac | 587 | (!ML11 && (er2 & HPER2_HARD))) { |
8fa6acee | 588 | /* |
f5f43574 HS |
589 | * HCRC means the header is screwed up and the sector |
590 | * might well exist in the bad sector table, | |
591 | * better check.... | |
8fa6acee | 592 | */ |
f5f43574 HS |
593 | if ((er1&HPER1_HCRC) && |
594 | !ML11 && !sc->sc_hdr && hpecc(mi, BSE)) | |
0be277a1 | 595 | return (MBD_RESTARTED); |
b70e4030 | 596 | hard: |
49d28f6f | 597 | if (ML11) |
0be277a1 | 598 | bp->b_blkno = MASKREG(hpaddr->hpda); |
49d28f6f | 599 | else |
0be277a1 SL |
600 | bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc + |
601 | (MASKREG(hpaddr->hpda) >> 8) * st->nsect + | |
5530f6f7 | 602 | (hpaddr->hpda&0xff); |
f5f43574 HS |
603 | /* |
604 | * If we have a data check error or a hard | |
605 | * ecc error the bad sector has been read/written, | |
606 | * and the controller registers are pointing to | |
607 | * the next sector... | |
608 | */ | |
5530f6f7 | 609 | if (er1&(HPER1_DCK|HPER1_ECH) || sc->sc_hdr) |
f5f43574 | 610 | bp->b_blkno--; |
fd2cb420 | 611 | harderr(bp, "hp"); |
e83ccfd7 BJ |
612 | if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) |
613 | printf("mbsr=%b ", mbsr, mbsr_bits); | |
b70e4030 | 614 | printf("er1=%b er2=%b", |
5530f6f7 HS |
615 | MASKREG(hpaddr->hper1), HPER1_BITS, |
616 | MASKREG(hpaddr->hper2), HPER2_BITS); | |
b70e4030 | 617 | if (hpaddr->hpmr) |
0be277a1 | 618 | printf(" mr=%o", MASKREG(hpaddr->hpmr)); |
b70e4030 | 619 | if (hpaddr->hpmr2) |
0be277a1 | 620 | printf(" mr2=%o", MASKREG(hpaddr->hpmr2)); |
f5f43574 HS |
621 | if (sc->sc_hdr) |
622 | printf(" (hdr i/o)"); | |
b70e4030 | 623 | printf("\n"); |
b81fd3e8 | 624 | bp->b_flags |= B_ERROR; |
49d28f6f | 625 | retry = 0; |
c983ca83 | 626 | sc->sc_recal = 0; |
705c30ac | 627 | } else if ((er2 & HPER2_BSE) && !ML11) { |
b70e4030 | 628 | if (hpecc(mi, BSE)) |
0be277a1 | 629 | return (MBD_RESTARTED); |
a02e9248 | 630 | goto hard; |
705c30ac | 631 | } else if (RM80 && er2&HPER2_SSE) { |
b620b354 | 632 | (void) hpecc(mi, SSE); |
c9e9b65b | 633 | return (MBD_RESTARTED); |
6cee54a8 | 634 | } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) { |
b70e4030 | 635 | if (hpecc(mi, ECC)) |
e34bc1ef BJ |
636 | return (MBD_RESTARTED); |
637 | /* else done */ | |
638 | } else | |
639 | retry = 1; | |
640 | hpaddr->hpcs1 = HP_DCLR|HP_GO; | |
b19f1d3a BJ |
641 | if (ML11) { |
642 | if (mi->mi_tab.b_errcnt >= 16) | |
643 | goto hard; | |
644 | } else if ((mi->mi_tab.b_errcnt&07) == 4) { | |
e34bc1ef | 645 | hpaddr->hpcs1 = HP_RECAL|HP_GO; |
c983ca83 | 646 | sc->sc_recal = 1; |
0be277a1 | 647 | return (MBD_RESTARTED); |
04b9d53d | 648 | } |
e34bc1ef BJ |
649 | if (retry) |
650 | return (MBD_RETRY); | |
651 | } | |
b70e4030 | 652 | #ifdef HPDEBUG |
6ac24ecd | 653 | else |
c983ca83 SL |
654 | if (hpdebug && sc->sc_recal) { |
655 | printf("recal %d ", sc->sc_recal); | |
6ac24ecd BJ |
656 | printf("errcnt %d\n", mi->mi_tab.b_errcnt); |
657 | printf("mbsr=%b ", mbsr, mbsr_bits); | |
658 | printf("er1=%b er2=%b\n", | |
659 | hpaddr->hper1, HPER1_BITS, | |
660 | hpaddr->hper2, HPER2_BITS); | |
661 | } | |
b70e4030 | 662 | #endif |
c983ca83 | 663 | switch (sc->sc_recal) { |
d565635a BJ |
664 | |
665 | case 1: | |
666 | hpaddr->hpdc = bp->b_cylin; | |
667 | hpaddr->hpcs1 = HP_SEEK|HP_GO; | |
c983ca83 | 668 | sc->sc_recal++; |
b70e4030 | 669 | return (MBD_RESTARTED); |
d565635a BJ |
670 | case 2: |
671 | if (mi->mi_tab.b_errcnt < 16 || | |
6ac24ecd | 672 | (bp->b_flags & B_READ) == 0) |
d565635a BJ |
673 | goto donerecal; |
674 | hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; | |
675 | hpaddr->hpcs1 = HP_OFFSET|HP_GO; | |
c983ca83 | 676 | sc->sc_recal++; |
d565635a BJ |
677 | return (MBD_RESTARTED); |
678 | donerecal: | |
a6442a2f | 679 | case 3: |
c983ca83 | 680 | sc->sc_recal = 0; |
3dbaa9da BJ |
681 | return (MBD_RETRY); |
682 | } | |
c983ca83 | 683 | sc->sc_hdr = 0; |
0be277a1 | 684 | bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr); |
aeecd470 | 685 | if (mi->mi_tab.b_errcnt >= 16) { |
d565635a BJ |
686 | /* |
687 | * This is fast and occurs rarely; we don't | |
688 | * bother with interrupts. | |
689 | */ | |
804f6eab | 690 | hpaddr->hpcs1 = HP_RTC|HP_GO; |
d565635a | 691 | while (hpaddr->hpds & HPDS_PIP) |
b81fd3e8 BJ |
692 | ; |
693 | mbclrattn(mi); | |
04b9d53d | 694 | } |
b19f1d3a BJ |
695 | if (!ML11) { |
696 | hpaddr->hpof = HPOF_FMT22; | |
697 | hpaddr->hpcs1 = HP_RELEASE|HP_GO; | |
698 | } | |
b81fd3e8 | 699 | return (MBD_DONE); |
04b9d53d BJ |
700 | } |
701 | ||
deb8980a | 702 | hpread(dev, uio) |
804f6eab | 703 | dev_t dev; |
deb8980a | 704 | struct uio *uio; |
04b9d53d | 705 | { |
804f6eab | 706 | register int unit = minor(dev) >> 3; |
04b9d53d | 707 | |
804f6eab | 708 | if (unit >= NHP) |
23458a62 BJ |
709 | return (ENXIO); |
710 | return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); | |
04b9d53d BJ |
711 | } |
712 | ||
406ddcbe | 713 | hpwrite(dev, uio) |
804f6eab | 714 | dev_t dev; |
406ddcbe | 715 | struct uio *uio; |
04b9d53d | 716 | { |
804f6eab | 717 | register int unit = minor(dev) >> 3; |
04b9d53d | 718 | |
804f6eab | 719 | if (unit >= NHP) |
23458a62 BJ |
720 | return (ENXIO); |
721 | return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); | |
04b9d53d BJ |
722 | } |
723 | ||
b19f1d3a | 724 | /*ARGSUSED*/ |
942f05a9 | 725 | hpioctl(dev, cmd, data, flag) |
b19f1d3a BJ |
726 | dev_t dev; |
727 | int cmd; | |
942f05a9 | 728 | caddr_t data; |
b19f1d3a BJ |
729 | int flag; |
730 | { | |
731 | ||
732 | switch (cmd) { | |
942f05a9 | 733 | |
b19f1d3a | 734 | case DKIOCHDR: /* do header read/write */ |
c983ca83 | 735 | hpsoftc[minor(dev) >> 3].sc_hdr = 1; |
473a2e47 | 736 | return (0); |
b19f1d3a BJ |
737 | |
738 | default: | |
473a2e47 | 739 | return (ENXIO); |
b19f1d3a BJ |
740 | } |
741 | } | |
742 | ||
b70e4030 | 743 | hpecc(mi, flag) |
4a4e3072 | 744 | register struct mba_device *mi; |
b70e4030 | 745 | int flag; |
04b9d53d | 746 | { |
b81fd3e8 | 747 | register struct mba_regs *mbp = mi->mi_mba; |
804f6eab | 748 | register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; |
b81fd3e8 | 749 | register struct buf *bp = mi->mi_tab.b_actf; |
b70e4030 BJ |
750 | register struct hpst *st = &hpst[mi->mi_type]; |
751 | int npf, o; | |
b81fd3e8 | 752 | int bn, cn, tn, sn; |
fa1d69d6 | 753 | int bcr; |
80e7c811 | 754 | |
0be277a1 | 755 | bcr = MASKREG(mbp->mba_bcr); |
fa1d69d6 BJ |
756 | if (bcr) |
757 | bcr |= 0xffff0000; /* sxt */ | |
b70e4030 BJ |
758 | if (flag == CONT) |
759 | npf = bp->b_error; | |
760 | else | |
b70e4030 | 761 | npf = btop(bcr + bp->b_bcount); |
80e7c811 | 762 | o = (int)bp->b_un.b_addr & PGOFSET; |
80e7c811 | 763 | bn = dkblock(bp); |
80e7c811 | 764 | cn = bp->b_cylin; |
b70e4030 | 765 | sn = bn%(st->nspc) + npf; |
b81fd3e8 BJ |
766 | tn = sn/st->nsect; |
767 | sn %= st->nsect; | |
768 | cn += tn/st->ntrak; | |
769 | tn %= st->ntrak; | |
b70e4030 | 770 | switch (flag) { |
ba783028 | 771 | case ECC: { |
b70e4030 BJ |
772 | register int i; |
773 | caddr_t addr; | |
774 | struct pte mpte; | |
775 | int bit, byte, mask; | |
776 | ||
777 | npf--; /* because block in error is previous block */ | |
778 | printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), | |
779 | 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); | |
0be277a1 SL |
780 | mask = MASKREG(rp->hpec2); |
781 | i = MASKREG(rp->hpec1) - 1; /* -1 makes 0 origin */ | |
b70e4030 BJ |
782 | bit = i&07; |
783 | i = (i&~07)>>3; | |
784 | byte = i + o; | |
785 | while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { | |
786 | mpte = mbp->mba_map[npf+btop(byte)]; | |
787 | addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); | |
788 | putmemc(addr, getmemc(addr)^(mask<<bit)); | |
789 | byte++; | |
790 | i++; | |
791 | bit -= 8; | |
792 | } | |
793 | if (bcr == 0) | |
794 | return (0); | |
089adc9d | 795 | npf++; |
b70e4030 BJ |
796 | break; |
797 | } | |
798 | ||
799 | case SSE: | |
800 | rp->hpof |= HPOF_SSEI; | |
801 | mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); | |
802 | break; | |
803 | ||
b70e4030 BJ |
804 | case BSE: |
805 | #ifdef HPBDEBUG | |
806 | if (hpbdebug) | |
807 | printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); | |
808 | #endif | |
0be277a1 SL |
809 | if (rp->hpof&HPOF_SSEI) |
810 | sn++; | |
b70e4030 | 811 | if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) |
0be277a1 | 812 | return (0); |
b70e4030 BJ |
813 | bp->b_flags |= B_BAD; |
814 | bp->b_error = npf + 1; | |
815 | bn = st->ncyl*st->nspc - st->nsect - 1 - bn; | |
816 | cn = bn/st->nspc; | |
817 | sn = bn%st->nspc; | |
818 | tn = sn/st->nsect; | |
819 | sn %= st->nsect; | |
820 | mbp->mba_bcr = -512; | |
8fa6acee | 821 | rp->hpof &= ~HPOF_SSEI; |
b70e4030 BJ |
822 | #ifdef HPBDEBUG |
823 | if (hpbdebug) | |
824 | printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); | |
825 | #endif | |
826 | break; | |
827 | ||
828 | case CONT: | |
829 | #ifdef HPBDEBUG | |
830 | if (hpbdebug) | |
831 | printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); | |
832 | #endif | |
833 | npf = bp->b_error; | |
834 | bp->b_flags &= ~B_BAD; | |
835 | mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); | |
0be277a1 SL |
836 | if (MASKREG(mbp->mba_bcr) == 0) |
837 | return (0); | |
b70e4030 | 838 | break; |
b70e4030 BJ |
839 | } |
840 | rp->hpcs1 = HP_DCLR|HP_GO; | |
8eb99b75 | 841 | if (rp->hpof&HPOF_SSEI) |
c9e9b65b | 842 | sn++; |
80e7c811 BJ |
843 | rp->hpdc = cn; |
844 | rp->hpda = (tn<<8) + sn; | |
845 | mbp->mba_sr = -1; | |
b70e4030 BJ |
846 | mbp->mba_var = (int)ptob(npf) + o; |
847 | rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; | |
848 | mi->mi_tab.b_errcnt = 0; /* error has been corrected */ | |
80e7c811 | 849 | return (1); |
04b9d53d | 850 | } |
e3b4b145 BJ |
851 | |
852 | #define DBSIZE 20 | |
853 | ||
854 | hpdump(dev) | |
855 | dev_t dev; | |
856 | { | |
4a4e3072 | 857 | register struct mba_device *mi; |
b81fd3e8 | 858 | register struct mba_regs *mba; |
804f6eab | 859 | struct hpdevice *hpaddr; |
e3b4b145 | 860 | char *start; |
b81fd3e8 BJ |
861 | int num, unit; |
862 | register struct hpst *st; | |
e3b4b145 BJ |
863 | |
864 | num = maxfree; | |
865 | start = 0; | |
866 | unit = minor(dev) >> 3; | |
1b81ee79 BJ |
867 | if (unit >= NHP) |
868 | return (ENXIO); | |
b81fd3e8 | 869 | #define phys(a,b) ((b)((int)(a)&0x7fffffff)) |
4a4e3072 | 870 | mi = phys(hpinfo[unit],struct mba_device *); |
1b81ee79 BJ |
871 | if (mi == 0 || mi->mi_alive == 0) |
872 | return (ENXIO); | |
b81fd3e8 | 873 | mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; |
a0eab615 | 874 | mba->mba_cr = MBCR_INIT; |
804f6eab | 875 | hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; |
d565635a | 876 | if ((hpaddr->hpds & HPDS_VV) == 0) { |
804f6eab BJ |
877 | hpaddr->hpcs1 = HP_DCLR|HP_GO; |
878 | hpaddr->hpcs1 = HP_PRESET|HP_GO; | |
d565635a | 879 | hpaddr->hpof = HPOF_FMT22; |
e3b4b145 | 880 | } |
b81fd3e8 | 881 | st = &hpst[mi->mi_type]; |
1b81ee79 BJ |
882 | if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) |
883 | return (EINVAL); | |
e3b4b145 | 884 | while (num > 0) { |
b81fd3e8 | 885 | register struct pte *hpte = mba->mba_map; |
e3b4b145 | 886 | register int i; |
b81fd3e8 | 887 | int blk, cn, sn, tn; |
e3b4b145 BJ |
888 | daddr_t bn; |
889 | ||
890 | blk = num > DBSIZE ? DBSIZE : num; | |
891 | bn = dumplo + btop(start); | |
b81fd3e8 BJ |
892 | cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; |
893 | sn = bn%st->nspc; | |
894 | tn = sn/st->nsect; | |
895 | sn = sn%st->nsect; | |
e3b4b145 BJ |
896 | hpaddr->hpdc = cn; |
897 | hpaddr->hpda = (tn << 8) + sn; | |
898 | for (i = 0; i < blk; i++) | |
899 | *(int *)hpte++ = (btop(start)+i) | PG_V; | |
b81fd3e8 BJ |
900 | mba->mba_sr = -1; |
901 | mba->mba_bcr = -(blk*NBPG); | |
902 | mba->mba_var = 0; | |
804f6eab | 903 | hpaddr->hpcs1 = HP_WCOM | HP_GO; |
d565635a | 904 | while ((hpaddr->hpds & HPDS_DRY) == 0) |
e3b4b145 | 905 | ; |
d565635a | 906 | if (hpaddr->hpds&HPDS_ERR) |
1b81ee79 | 907 | return (EIO); |
e3b4b145 BJ |
908 | start += blk*NBPG; |
909 | num -= blk; | |
910 | } | |
911 | return (0); | |
912 | } | |
cf83ab8e SL |
913 | |
914 | hpsize(dev) | |
915 | dev_t dev; | |
916 | { | |
917 | int unit = minor(dev) >> 3; | |
918 | struct mba_device *mi; | |
919 | struct hpst *st; | |
920 | ||
921 | if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) | |
922 | return (-1); | |
923 | st = &hpst[mi->mi_type]; | |
924 | return ((int)st->sizes[minor(dev) & 07].nblocks); | |
925 | } | |
a5cc519e | 926 | #endif |