handle var len names, sync with vax
[unix-history] / usr / src / sys / vax / mba / ht.c
CommitLineData
da7c5cc6 1/*
0880b18e 2 * Copyright (c) 1982, 1986 Regents of the University of California.
da7c5cc6
KM
3 * All rights reserved. The Berkeley software License Agreement
4 * specifies the terms and conditions for redistribution.
5 *
5d4eae4d 6 * @(#)ht.c 7.6 (Berkeley) %G%
da7c5cc6 7 */
0deaf016 8
89bd2f01 9#include "tu.h"
a5cc519e 10#if NHT > 0
786dff00 11/*
fcc37d29 12 * TM03/TU?? tape driver
d565635a
BJ
13 *
14 * TODO:
3ee331b1 15 * cleanup messages on errors
d565635a
BJ
16 * test ioctl's
17 * see how many rewind interrups we get if we kick when not at BOT
3ee331b1 18 * fixup rle error on block tape code
786dff00 19 */
969e52ef
JB
20#include "param.h"
21#include "systm.h"
22#include "buf.h"
23#include "conf.h"
24#include "dir.h"
25#include "file.h"
26#include "user.h"
27#include "map.h"
28#include "ioctl.h"
29#include "mtio.h"
30#include "cmap.h"
31#include "uio.h"
48165e7b 32#include "tty.h"
ef4fe5b8 33#include "syslog.h"
786dff00 34
c457503f 35#include "../machine/pte.h"
c895c266 36#include "../vax/cpu.h"
969e52ef
JB
37#include "mbareg.h"
38#include "mbavar.h"
39#include "htreg.h"
fcc37d29 40
fcc37d29
BJ
41struct buf chtbuf[NHT];
42
43short httypes[] =
fc4d0a69 44 { MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 };
89bd2f01 45struct mba_device *htinfo[NHT];
e7efef59 46struct mba_slave *tuinfo[NTU];
a0eab615 47int htattach(), htslave(), htustart(), htndtint(), htdtint();
fcc37d29 48struct mba_driver htdriver =
89bd2f01
BJ
49 { htattach, htslave, htustart, 0, htdtint, htndtint,
50 httypes, "ht", "tu", htinfo };
fcc37d29
BJ
51
52#define MASKREG(r) ((r) & 0xffff)
53
54/* bits in minor device */
89bd2f01 55#define TUUNIT(dev) (minor(dev)&03)
fcc37d29 56#define H_NOREWIND 04
5d33b5c0 57#define H_DENS(dev) ((minor(dev) >> 3) & 03)
786dff00 58
5d4eae4d 59#define HTUNIT(dev) (tuinfo[TUUNIT(dev)]->ms_ctlr)
89bd2f01 60
fcc37d29
BJ
61#define INF (daddr_t)1000000L /* a block number that wont exist */
62
d565635a 63struct tu_softc {
fcc37d29
BJ
64 char sc_openf;
65 char sc_flags;
66 daddr_t sc_blkno;
67 daddr_t sc_nxrec;
68 u_short sc_erreg;
69 u_short sc_dsreg;
70 short sc_resid;
71 short sc_dens;
48165e7b 72 struct tty *sc_ttyp; /* record user's tty for errors */
c457503f
MK
73 int sc_blks; /* number of I/O operations since open */
74 int sc_softerrs; /* number of soft I/O errors since open */
d565635a 75} tu_softc[NTU];
fcc37d29 76
fcc37d29
BJ
77/*
78 * Bits for sc_flags.
79 */
80#define H_WRITTEN 1 /* last operation was a write */
81#define H_ERASED 2 /* last write retry was an erase gap */
82#define H_REWIND 4 /* last unit start was a rewind */
786dff00 83
3ee331b1
BJ
84char hter_bits[] = HTER_BITS;
85char htds_bits[] = HTDS_BITS;
86
fcc37d29 87/*ARGSUSED*/
89bd2f01
BJ
88htattach(mi)
89 struct mba_device *mi;
90{
91
92}
93
51250c66 94htslave(mi, ms, sn)
89bd2f01
BJ
95 struct mba_device *mi;
96 struct mba_slave *ms;
51250c66 97 int sn;
fcc37d29 98{
64614526
BJ
99 register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
100
51250c66 101 htaddr->httc = sn;
64614526 102 if (htaddr->htdt & HTDT_SPR) {
e7efef59 103 tuinfo[ms->ms_unit] = ms;
64614526
BJ
104 return (1);
105 } else
106 return (0);
fcc37d29 107}
786dff00 108
5d33b5c0
MK
109int htdens[4] = { HTTC_800BPI, HTTC_1600BPI, HTTC_6250BPI, HTTC_800BPI };
110
786dff00 111htopen(dev, flag)
fcc37d29
BJ
112 dev_t dev;
113 int flag;
786dff00 114{
d565635a 115 register int tuunit;
d565635a 116 register struct tu_softc *sc;
5d4eae4d 117 register struct mba_slave *ms;
cd470e1d 118 int olddens, dens;
786dff00 119
d565635a 120 tuunit = TUUNIT(dev);
5d4eae4d
KB
121 if (tuunit >= NTU || (ms = tuinfo[tuunit]) == NULL ||
122 ms->ms_alive == 0 || htinfo[ms->ms_ctlr]->mi_alive == 0)
473a2e47 123 return (ENXIO);
1e6047bb
MK
124 if ((sc = &tu_softc[tuunit])->sc_openf)
125 return (EBUSY);
c457503f 126 sc->sc_openf = 1;
cd470e1d 127 olddens = sc->sc_dens;
5d4eae4d 128 dens = sc->sc_dens = htdens[H_DENS(dev)] | HTTC_PDP11 | ms->ms_slave;
cd470e1d
BJ
129 htcommand(dev, HT_SENSE, 1);
130 sc->sc_dens = olddens;
61add2a3 131 if ((sc->sc_dsreg & HTDS_MOL) == 0) {
c457503f 132 sc->sc_openf = 0;
1d78646d 133 uprintf("tu%d: not online\n", tuunit);
473a2e47 134 return (EIO);
61add2a3
BJ
135 }
136 if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) {
c457503f 137 sc->sc_openf = 0;
1d78646d 138 uprintf("tu%d: no write ring\n", tuunit);
473a2e47 139 return (EIO);
61add2a3
BJ
140 }
141 if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) &&
142 dens != sc->sc_dens) {
c457503f 143 sc->sc_openf = 0;
1d78646d 144 uprintf("tu%d: can't change density in mid-tape\n", tuunit);
473a2e47 145 return (EIO);
fcc37d29 146 }
fcc37d29
BJ
147 sc->sc_blkno = (daddr_t)0;
148 sc->sc_nxrec = INF;
149 sc->sc_flags = 0;
d565635a 150 sc->sc_dens = dens;
c457503f
MK
151 sc->sc_blks = 0;
152 sc->sc_softerrs = 0;
48165e7b 153 sc->sc_ttyp = u.u_ttyp;
473a2e47 154 return (0);
786dff00
BJ
155}
156
157htclose(dev, flag)
fcc37d29
BJ
158 register dev_t dev;
159 register flag;
786dff00 160{
d565635a 161 register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
786dff00 162
fcc37d29
BJ
163 if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) {
164 htcommand(dev, HT_WEOF, 1);
165 htcommand(dev, HT_WEOF, 1);
166 htcommand(dev, HT_SREV, 1);
786dff00 167 }
fcc37d29 168 if ((minor(dev)&H_NOREWIND) == 0)
fcc37d29 169 htcommand(dev, HT_REW, 0);
c457503f
MK
170 if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100)
171 log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n",
172 TUUNIT(dev), sc->sc_softerrs, sc->sc_blks);
fcc37d29 173 sc->sc_openf = 0;
786dff00
BJ
174}
175
fcc37d29
BJ
176htcommand(dev, com, count)
177 dev_t dev;
178 int com, count;
786dff00
BJ
179{
180 register struct buf *bp;
2311123d 181 register int s;
786dff00 182
fcc37d29 183 bp = &chtbuf[HTUNIT(dev)];
2311123d 184 s = spl5();
fcc37d29 185 while (bp->b_flags&B_BUSY) {
9f1dae18 186 if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
89bd2f01 187 break;
786dff00
BJ
188 bp->b_flags |= B_WANTED;
189 sleep((caddr_t)bp, PRIBIO);
190 }
dc637456 191 bp->b_flags = B_BUSY|B_READ;
2311123d 192 splx(s);
786dff00 193 bp->b_dev = dev;
fcc37d29
BJ
194 bp->b_command = com;
195 bp->b_repcnt = count;
786dff00 196 bp->b_blkno = 0;
786dff00 197 htstrategy(bp);
fcc37d29
BJ
198 if (count == 0)
199 return;
786dff00 200 iowait(bp);
fcc37d29 201 if (bp->b_flags&B_WANTED)
786dff00 202 wakeup((caddr_t)bp);
fcc37d29 203 bp->b_flags &= B_ERROR;
786dff00
BJ
204}
205
206htstrategy(bp)
fcc37d29 207 register struct buf *bp;
786dff00 208{
d565635a 209 register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)];
fcc37d29 210 register struct buf *dp;
2311123d 211 register int s;
786dff00 212
786dff00 213 bp->av_forw = NULL;
fcc37d29 214 dp = &mi->mi_tab;
2311123d 215 s = spl5();
fcc37d29
BJ
216 if (dp->b_actf == NULL)
217 dp->b_actf = bp;
786dff00 218 else
fcc37d29
BJ
219 dp->b_actl->av_forw = bp;
220 dp->b_actl = bp;
221 if (dp->b_active == 0)
222 mbustart(mi);
2311123d 223 splx(s);
786dff00
BJ
224}
225
fcc37d29 226htustart(mi)
89bd2f01 227 register struct mba_device *mi;
786dff00 228{
fcc37d29
BJ
229 register struct htdevice *htaddr =
230 (struct htdevice *)mi->mi_drv;
231 register struct buf *bp = mi->mi_tab.b_actf;
d565635a 232 register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)];
786dff00
BJ
233 daddr_t blkno;
234
fcc37d29 235 htaddr->httc = sc->sc_dens;
244b8363
MK
236#ifdef notdef
237 /* unneeded, may hang controller */
fc4d0a69 238 if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) {
9f1dae18
BJ
239 htaddr->htcs1 = HT_SENSE|HT_GO;
240 mbclrattn(mi);
241 }
244b8363 242#endif
fcc37d29
BJ
243 sc->sc_dsreg = htaddr->htds;
244 sc->sc_erreg = htaddr->hter;
245 sc->sc_resid = htaddr->htfc;
246 sc->sc_flags &= ~(H_WRITTEN|H_REWIND);
247 if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0)
248 if (sc->sc_openf > 0)
249 sc->sc_openf = -1;
250 if (sc->sc_openf < 0) {
251 bp->b_flags |= B_ERROR;
252 return (MBU_NEXT);
253 }
d565635a 254 if (bp != &chtbuf[HTUNIT(bp->b_dev)]) {
5d4eae4d
KB
255 /* transfer: check positioning */
256 if (bp->b_flags & B_RAW) {
257 /* raw transfer: record position for retry */
258 if (mi->mi_tab.b_errcnt == 0) {
259 sc->sc_blkno = bdbtofsb(bp->b_blkno);
260 sc->sc_nxrec = sc->sc_blkno + 1;
261 }
262 } else {
263 if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) {
264 bp->b_flags |= B_ERROR;
265 bp->b_error = ENXIO;
266 return (MBU_NEXT);
267 }
268 if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec &&
269 bp->b_flags&B_READ) {
270 bp->b_resid = bp->b_bcount;
271 clrbuf(bp);
272 return (MBU_NEXT);
273 }
274 if ((bp->b_flags&B_READ)==0)
275 sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1;
d565635a 276 }
fcc37d29 277 } else {
0deaf016 278 if (bp->b_command == HT_SENSE)
fcc37d29
BJ
279 return (MBU_NEXT);
280 if (bp->b_command == HT_REW)
281 sc->sc_flags |= H_REWIND;
282 else
283 htaddr->htfc = -bp->b_bcount;
284 htaddr->htcs1 = bp->b_command|HT_GO;
285 return (MBU_STARTED);
286 }
43d66181 287 if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) {
fcc37d29
BJ
288 htaddr->htfc = -bp->b_bcount;
289 if ((bp->b_flags&B_READ) == 0) {
d565635a
BJ
290 if (mi->mi_tab.b_errcnt) {
291 if ((sc->sc_flags & H_ERASED) == 0) {
fcc37d29
BJ
292 sc->sc_flags |= H_ERASED;
293 htaddr->htcs1 = HT_ERASE | HT_GO;
294 return (MBU_STARTED);
295 }
d565635a
BJ
296 sc->sc_flags &= ~H_ERASED;
297 }
fcc37d29
BJ
298 if (htaddr->htds & HTDS_EOT) {
299 bp->b_resid = bp->b_bcount;
b0130242 300 bp->b_flags |= B_ERROR;
fcc37d29
BJ
301 return (MBU_NEXT);
302 }
786dff00 303 }
fcc37d29 304 return (MBU_DODATA);
786dff00 305 }
43d66181
SL
306 if (blkno < bdbtofsb(bp->b_blkno)) {
307 htaddr->htfc = blkno - bdbtofsb(bp->b_blkno);
fcc37d29 308 htaddr->htcs1 = HT_SFORW|HT_GO;
786dff00 309 } else {
43d66181 310 htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno;
fcc37d29 311 htaddr->htcs1 = HT_SREV|HT_GO;
786dff00 312 }
fcc37d29 313 return (MBU_STARTED);
786dff00
BJ
314}
315
d565635a 316htdtint(mi, mbsr)
89bd2f01 317 register struct mba_device *mi;
d565635a 318 int mbsr;
786dff00 319{
fcc37d29
BJ
320 register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
321 register struct buf *bp = mi->mi_tab.b_actf;
d565635a 322 register struct tu_softc *sc;
0deaf016 323 int ds, er, mbs;
786dff00 324
d565635a 325 sc = &tu_softc[TUUNIT(bp->b_dev)];
fcc37d29
BJ
326 ds = sc->sc_dsreg = MASKREG(htaddr->htds);
327 er = sc->sc_erreg = MASKREG(htaddr->hter);
328 sc->sc_resid = MASKREG(htaddr->htfc);
d565635a 329 mbs = mbsr;
fcc37d29
BJ
330 sc->sc_blkno++;
331 if((bp->b_flags & B_READ) == 0)
332 sc->sc_flags |= H_WRITTEN;
d565635a 333 if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) {
fcc37d29 334 htaddr->htcs1 = HT_DCLR|HT_GO;
0deaf016 335 mbclrattn(mi);
5d4eae4d 336 if (bp->b_flags & B_RAW) {
fcc37d29 337 er &= ~HTER_FCE;
d565635a 338 mbs &= ~(MBSR_DTABT|MBSR_MBEXC);
ea59de47 339 }
fcc37d29
BJ
340 if (bp->b_flags & B_READ && ds & HTDS_PES)
341 er &= ~(HTER_CSITM|HTER_CORCRC);
d565635a 342 if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 ||
0deaf016 343 er && ++mi->mi_tab.b_errcnt >= 7) {
fcc37d29
BJ
344 if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
345 sc->sc_openf = -1;
9f1dae18
BJ
346 if ((er&HTER_HARD) == HTER_FCE &&
347 (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) &&
348 (ds&HTDS_MOL))
349 goto noprint;
48165e7b 350 tprintf(sc->sc_ttyp, "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n",
89bd2f01 351 TUUNIT(bp->b_dev), bp->b_blkno,
d565635a 352 mbsr, mbsr_bits,
3ee331b1
BJ
353 sc->sc_erreg, hter_bits,
354 sc->sc_dsreg, htds_bits);
9f1dae18 355noprint:
786dff00 356 bp->b_flags |= B_ERROR;
fcc37d29 357 return (MBD_DONE);
786dff00 358 }
fcc37d29
BJ
359 if (er)
360 return (MBD_RETRY);
786dff00 361 }
fcc37d29 362 bp->b_resid = 0;
c457503f
MK
363 sc->sc_blks++;
364 if (mi->mi_tab.b_errcnt)
365 sc->sc_softerrs++;
fcc37d29
BJ
366 if (bp->b_flags & B_READ)
367 if (ds&HTDS_TM) { /* must be a read, right? */
368 bp->b_resid = bp->b_bcount;
43d66181 369 sc->sc_nxrec = bdbtofsb(bp->b_blkno);
fcc37d29
BJ
370 } else if(bp->b_bcount > MASKREG(htaddr->htfc))
371 bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc);
372 return (MBD_DONE);
373}
786dff00 374
fcc37d29 375htndtint(mi)
89bd2f01 376 register struct mba_device *mi;
fcc37d29
BJ
377{
378 register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
379 register struct buf *bp = mi->mi_tab.b_actf;
d565635a 380 register struct tu_softc *sc;
fcc37d29 381 int er, ds, fc;
786dff00 382
d565635a
BJ
383 ds = MASKREG(htaddr->htds);
384 er = MASKREG(htaddr->hter);
385 fc = MASKREG(htaddr->htfc);
386 if (er) {
fcc37d29 387 htaddr->htcs1 = HT_DCLR|HT_GO;
0deaf016
BJ
388 mbclrattn(mi);
389 }
d565635a
BJ
390 if (bp == 0)
391 return (MBN_SKIP);
392 sc = &tu_softc[TUUNIT(bp->b_dev)];
393 sc->sc_dsreg = ds;
394 sc->sc_erreg = er;
395 sc->sc_resid = fc;
396 if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
3c58f9df 397 switch ((int)bp->b_command) {
d565635a 398 case HT_REWOFFL:
fcc37d29
BJ
399 /* offline is on purpose; don't do anything special */
400 ds |= HTDS_MOL;
d565635a
BJ
401 break;
402 case HT_SREV:
403 /* if backspace file hit bot, its not an error */
404 if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT &&
405 bp->b_repcnt == INF)
406 er &= ~HTER_NEF;
407 break;
408 }
fcc37d29
BJ
409 er &= ~HTER_FCE;
410 if (er == 0)
411 ds &= ~HTDS_ERR;
412 }
413 if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) {
414 if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
415 sc->sc_openf = -1;
48165e7b 416 tprintf(sc->sc_ttyp, "tu%d: hard error bn%d er=%b ds=%b\n",
89bd2f01 417 TUUNIT(bp->b_dev), bp->b_blkno,
3ee331b1 418 sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits);
fcc37d29
BJ
419 bp->b_flags |= B_ERROR;
420 return (MBN_DONE);
786dff00 421 }
d565635a 422 if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
fcc37d29
BJ
423 if (sc->sc_flags & H_REWIND)
424 return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);
425 bp->b_resid = -sc->sc_resid;
426 return (MBN_DONE);
427 }
428 if (ds & HTDS_TM)
43d66181
SL
429 if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) {
430 sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc;
fcc37d29 431 sc->sc_blkno = sc->sc_nxrec;
d565635a 432 } else {
43d66181 433 sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc;
fcc37d29
BJ
434 sc->sc_nxrec = sc->sc_blkno - 1;
435 }
436 else
43d66181 437 sc->sc_blkno = bdbtofsb(bp->b_blkno);
fcc37d29 438 return (MBN_RETRY);
786dff00
BJ
439}
440
fcc37d29 441/*ARGSUSED*/
942f05a9 442htioctl(dev, cmd, data, flag)
fcc37d29
BJ
443 dev_t dev;
444 int cmd;
942f05a9 445 caddr_t data;
fcc37d29
BJ
446 int flag;
447{
d565635a
BJ
448 register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
449 register struct buf *bp = &chtbuf[HTUNIT(dev)];
fcc37d29
BJ
450 register callcount;
451 int fcount;
942f05a9
SL
452 struct mtop *mtop;
453 struct mtget *mtget;
fcc37d29
BJ
454 /* we depend of the values and order of the MT codes here */
455 static htops[] =
456 {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE};
457
458 switch (cmd) {
942f05a9
SL
459
460 case MTIOCTOP: /* tape operation */
461 mtop = (struct mtop *)data;
462 switch (mtop->mt_op) {
463
fcc37d29 464 case MTWEOF:
942f05a9 465 callcount = mtop->mt_count;
fcc37d29
BJ
466 fcount = 1;
467 break;
942f05a9 468
fcc37d29 469 case MTFSF: case MTBSF:
942f05a9 470 callcount = mtop->mt_count;
fcc37d29
BJ
471 fcount = INF;
472 break;
942f05a9 473
fcc37d29
BJ
474 case MTFSR: case MTBSR:
475 callcount = 1;
942f05a9 476 fcount = mtop->mt_count;
fcc37d29 477 break;
942f05a9 478
fcc37d29
BJ
479 case MTREW: case MTOFFL:
480 callcount = 1;
481 fcount = 1;
482 break;
942f05a9 483
fcc37d29 484 default:
473a2e47 485 return (ENXIO);
fcc37d29 486 }
473a2e47
BJ
487 if (callcount <= 0 || fcount <= 0)
488 return (EINVAL);
fcc37d29 489 while (--callcount >= 0) {
942f05a9
SL
490 htcommand(dev, htops[mtop->mt_op], fcount);
491 if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) &&
473a2e47
BJ
492 bp->b_resid)
493 return (EIO);
d565635a 494 if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT)
fcc37d29
BJ
495 break;
496 }
5a1f132a 497 return (geterror(bp));
942f05a9 498
fcc37d29 499 case MTIOCGET:
942f05a9
SL
500 mtget = (struct mtget *)data;
501 mtget->mt_dsreg = sc->sc_dsreg;
502 mtget->mt_erreg = sc->sc_erreg;
503 mtget->mt_resid = sc->sc_resid;
504 mtget->mt_type = MT_ISHT;
473a2e47 505 break;
942f05a9 506
fcc37d29 507 default:
473a2e47 508 return (ENXIO);
fcc37d29 509 }
473a2e47 510 return (0);
fcc37d29 511}
f0a3ddbd
BJ
512
513#define DBSIZE 20
514
fcc37d29 515htdump()
f0a3ddbd 516{
89bd2f01 517 register struct mba_device *mi;
fcc37d29
BJ
518 register struct mba_regs *mp;
519 register struct htdevice *htaddr;
520 int blk, num;
521 int start;
522
523 start = 0;
524 num = maxfree;
525#define phys(a,b) ((b)((int)(a)&0x7fffffff))
526 if (htinfo[0] == 0)
527 return (ENXIO);
89bd2f01 528 mi = phys(htinfo[0], struct mba_device *);
fcc37d29 529 mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
9f1dae18 530 mp->mba_cr = MBCR_IE;
fcc37d29
BJ
531 htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];
532 htaddr->httc = HTTC_PDP11|HTTC_1600BPI;
533 htaddr->htcs1 = HT_DCLR|HT_GO;
f0a3ddbd
BJ
534 while (num > 0) {
535 blk = num > DBSIZE ? DBSIZE : num;
fcc37d29
BJ
536 htdwrite(start, blk, htaddr, mp);
537 start += blk;
f0a3ddbd
BJ
538 num -= blk;
539 }
fcc37d29
BJ
540 hteof(htaddr);
541 hteof(htaddr);
9f1dae18 542 htwait(htaddr);
fc4d0a69 543 if (htaddr->htds&HTDS_ERR)
9f1dae18
BJ
544 return (EIO);
545 htaddr->htcs1 = HT_REW|HT_GO;
a0eab615 546 return (0);
f0a3ddbd
BJ
547}
548
fcc37d29
BJ
549htdwrite(dbuf, num, htaddr, mp)
550 register dbuf, num;
551 register struct htdevice *htaddr;
552 struct mba_regs *mp;
f0a3ddbd 553{
fcc37d29 554 register struct pte *io;
f0a3ddbd
BJ
555 register int i;
556
fcc37d29
BJ
557 htwait(htaddr);
558 io = mp->mba_map;
f0a3ddbd 559 for (i = 0; i < num; i++)
fcc37d29
BJ
560 *(int *)io++ = dbuf++ | PG_V;
561 htaddr->htfc = -(num*NBPG);
562 mp->mba_sr = -1;
563 mp->mba_bcr = -(num*NBPG);
564 mp->mba_var = 0;
565 htaddr->htcs1 = HT_WCOM|HT_GO;
f0a3ddbd
BJ
566}
567
fcc37d29
BJ
568htwait(htaddr)
569 struct htdevice *htaddr;
f0a3ddbd
BJ
570{
571 register s;
572
573 do
fcc37d29
BJ
574 s = htaddr->htds;
575 while ((s & HTDS_DRY) == 0);
f0a3ddbd
BJ
576}
577
fcc37d29
BJ
578hteof(htaddr)
579 struct htdevice *htaddr;
f0a3ddbd
BJ
580{
581
fcc37d29
BJ
582 htwait(htaddr);
583 htaddr->htcs1 = HT_WEOF|HT_GO;
f0a3ddbd 584}
a5cc519e 585#endif