[unix-history] / sys / i386 / isa / vector.s

/*
 *	from: vector.s, 386BSD 0.1 unknown origin
 *	$Id$
 */

#include "i386/isa/icu.h"
#include "i386/isa/isa.h"
#include "vector.h"

#define	ICU_EOI			0x20	/* XXX - define elsewhere */

#define	IRQ_BIT(irq_num)	(1 << ((irq_num) % 8))
#define	IRQ_BYTE(irq_num)	((irq_num) / 8)

#define	ENABLE_ICU1 \
	movb	$ICU_EOI,%al ;	/* as soon as possible send EOI ... */ \
	FASTER_NOP ;		/* ... ASAP ... */ \
	outb	%al,$IO_ICU1	/* ... to clear in service bit */
#ifdef AUTO_EOI_1
#undef	ENABLE_ICU1		/* we now use auto-EOI to reduce i/o */
#define	ENABLE_ICU1
#endif

#define	ENABLE_ICU1_AND_2 \
	movb	$ICU_EOI,%al ;	/* as above */ \
	FASTER_NOP ; \
	outb	%al,$IO_ICU2 ;	/* but do second icu first */ \
	FASTER_NOP ; \
	outb	%al,$IO_ICU1	/* then first icu */
#ifdef AUTO_EOI_2
#undef	ENABLE_ICU1_AND_2	/* data sheet says no auto-EOI on slave ... */
#define	ENABLE_ICU1_AND_2	/* ... but it works */
#endif

/*
 * Macros for interrupt interrupt entry, call to handler, and exit.
 *
 * XXX - the interrupt frame is set up to look like a trap frame.  This is
 * usually a waste of time.  The only interrupt handlers that want a frame
 * are the clock handler (it wants a clock frame), the npx handler (it's
 * easier to do right all in assembler).  The interrupt return routine
 * needs a trap frame for rare AST's (it could easily convert the frame).
 * The direct costs of setting up a trap frame are two pushl's (error
 * code and trap number), an addl to get rid of these, and pushing and
 * popping the call-saved regs %esi, %edi and %ebp twice,  The indirect
 * costs are making the driver interface nonuniform so unpending of
 * interrupts is more complicated and slower (call_driver(unit) would
 * be easier than ensuring an interrupt frame for all handlers.  Finally,
 * there are some struct copies in the npx handler and maybe in the clock
 * handler that could be avoided by working more with pointers to frames
 * instead of frames.
 *
 * XXX - should we do a cld on every system entry to avoid the requirement
 * for scattered cld's?
 *
 * Coding notes for *.s:
 *
 * If possible, avoid operations that involve an operand size override.
 * Word-sized operations might be smaller, but the operand size override
 * makes them slower on on 486's and no faster on 386's unless perhaps
 * the instruction pipeline is depleted.  E.g.,
 *
 *	Use movl to seg regs instead of the equivalent but more descriptive
 *	movw - gas generates an irelevant (slower) operand size override.
 *
 *	Use movl to ordinary regs in preference to movw and especially
 *	in preference to movz[bw]l.  Use unsigned (long) variables with the
 *	top bits clear instead of unsigned short variables to provide more
 *	opportunities for movl.
 *
 * If possible, use byte-sized operations.  They are smaller and no slower.
 *
 * Use (%reg) instead of 0(%reg) - gas generates larger code for the latter.
 *
 * If the interrupt frame is made more flexible,  INTR can push %eax first
 * and decide the ipending case with less overhead, e.g., by avoiding
 * loading segregs.
 */

#define	FAST_INTR(unit, irq_num, id_num, handler, enable_icus) \
	pushl	%eax ;		/* save only call-used registers */ \
	pushl	%ecx ; \
	pushl	%edx ; \
	pushl	%ds ; \
	/* pushl	%es ; know compiler doesn't do string insns */ \
	movl	$KDSEL,%eax ; \
	movl	%ax,%ds ; \
	/* movl	%ax,%es ; */ \
	SHOW_CLI ;		/* although it interferes with "ASAP" */ \
	pushl	$unit ; \
	call	handler ;	/* do the work ASAP */ \
	enable_icus ;		/* (re)enable ASAP (helps edge trigger?) */ \
	addl	$4,%esp ; \
	incl	_cnt+V_INTR ;	/* book-keeping can wait */ \
	COUNT_EVENT(_intrcnt_actv, id_num) ; \
	SHOW_STI ; \
	/* popl	%es ; */ \
	popl	%ds ; \
	popl	%edx; \
	popl	%ecx; \
	popl	%eax; \
	iret

#define	INTR(unit, irq_num, id_num, mask, handler, icu, enable_icus, reg, stray) \
	pushl	$0 ;		/* dummy error code */ \
	pushl	$T_ASTFLT ; \
	pushal ; \
	pushl	%ds ; 		/* save our data and extra segments ... */ \
	pushl	%es ; \
	movl	$KDSEL,%eax ;	/* ... and reload with kernel's own ... */ \
	movl	%ax,%ds ; 	/* ... early in case SHOW_A_LOT is on */ \
	movl	%ax,%es ; \
	SHOW_CLI ;		/* interrupt did an implicit cli */ \
	movb	_imen + IRQ_BYTE(irq_num),%al ; \
	orb	$IRQ_BIT(irq_num),%al ; \
	movb	%al,_imen + IRQ_BYTE(irq_num) ; \
	SHOW_IMEN ; \
	FASTER_NOP ; \
	outb	%al,$icu+1 ; \
	enable_icus ; \
	incl	_cnt+V_INTR ;	/* tally interrupts */ \
	movl	_cpl,%eax ; \
	testb	$IRQ_BIT(irq_num),%reg ; \
	jne	2f ; \
1: ; \
	COUNT_EVENT(_intrcnt_actv, id_num) ; \
	movl	_cpl,%eax ; \
	pushl	%eax ; \
	pushl	$unit ; \
	orl	mask,%eax ; \
	movl	%eax,_cpl ; \
	SHOW_CPL ; \
	SHOW_STI ; \
	sti ; \
	call	handler ; \
	movb	_imen + IRQ_BYTE(irq_num),%al ; \
	andb	$~IRQ_BIT(irq_num),%al ; \
	movb	%al,_imen + IRQ_BYTE(irq_num) ; \
	SHOW_IMEN ; \
	FASTER_NOP ; \
	outb	%al,$icu+1 ; \
	jmp	doreti ; \
; \
	ALIGN_TEXT ; \
2: ; \
	COUNT_EVENT(_intrcnt_pend, id_num) ; \
	movl	$1b,%eax ;	/* register resume address */ \
				/* XXX - someday do it at attach time */ \
	movl	%eax,Vresume + (irq_num) * 4 ;	\
	orb	$IRQ_BIT(irq_num),_ipending + IRQ_BYTE(irq_num) ; \
	SHOW_IPENDING ; \
	popl	%es ; \
	popl	%ds ; \
	popal ; \
	addl	$4+4,%esp ; \
	iret

/*
 * vector.h has defined a macro 'BUILD_VECTORS' containing a big list of info
 * about vectors, including a submacro 'BUILD_VECTOR' that operates on the
 * info about each vector.  We redefine 'BUILD_VECTOR' to expand the info
 * in different ways.  Here we expand it to a list of interrupt handlers.
 * This order is of course unimportant.  Elsewhere we expand it to inline
 * linear search code for which the order is a little more important and
 * concatenating the code with no holes is very important.
 *
 * XXX - now there is BUILD_FAST_VECTOR as well as BUILD_VECTOR.
 *
 * The info consists of the following items for each vector:
 *
 *	name (identifier):	name of the vector; used to build labels
 *	unit (expression):	unit number to call the device driver with
 *	irq_num (number):	number of the IRQ to handled (0-15)
 *	id_num (number):	uniq numeric id for handler (assigned by config)
 *	mask (blank-ident):	priority mask used
 *	handler (blank-ident):	interrupt handler to call
 *	icu_num (number):	(1 + irq_num / 8) converted for label building
 *	icu_enables (number):	1 for icu_num == 1, 1_AND_2 for icu_num == 2
 *	reg (blank-ident):	al for icu_num == 1, ah for icu_num == 2
 *
 * 'irq_num' is converted in several ways at config time to get around
 * limitations in cpp.  The macros have blanks after commas iff they would
 * not mess up identifiers and numbers.
 */

#undef BUILD_FAST_VECTOR
#define	BUILD_FAST_VECTOR(name, unit, irq_num, id_num, mask, handler, \
			  icu_num, icu_enables, reg) \
	.globl	handler ; \
	.text ; \
	.globl	_V/**/name ; \
	SUPERALIGN_TEXT ; \
_V/**/name: ; \
	FAST_INTR(unit, irq_num, id_num, handler, ENABLE_ICU/**/icu_enables)

#undef BUILD_VECTOR
#define	BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
		     icu_num, icu_enables, reg) \
	.globl	handler ; \
	.text ; \
	.globl	_V/**/name ; \
	SUPERALIGN_TEXT ; \
_V/**/name: ; \
	INTR(unit,irq_num,id_num, mask, handler, IO_ICU/**/icu_num, \
	     ENABLE_ICU/**/icu_enables, reg,)

	BUILD_VECTORS

	/* hardware interrupt catcher (IDT 32 - 47) */
	.globl	_isa_strayintr

#define	STRAYINTR(irq_num, icu_num, icu_enables, reg) \
IDTVEC(intr/**/irq_num) ; \
	INTR(irq_num,irq_num,irq_num, _highmask,  _isa_strayintr, \
		  IO_ICU/**/icu_num, ENABLE_ICU/**/icu_enables, reg,stray)

/*
 * XXX - the mask (1 << 2) == IRQ_SLAVE will be generated for IRQ 2, instead
 * of the mask IRQ2 (defined as IRQ9 == (1 << 9)).  But IRQ 2 "can't happen".
 * In fact, all stray interrupts "can't happen" except for bugs.  The
 * "stray" IRQ 7 is documented behaviour of the 8259.  It happens when there
 * is a glitch on any of its interrupt inputs.  Does it really interrupt when
 * IRQ 7 is masked?
 *
 * XXX - unpend doesn't work for these, it sends them to the real handler.
 *
 * XXX - the race bug during initialization may be because I changed the
 * order of switching from the stray to the real interrupt handler to before
 * enabling interrupts.  The old order looked unsafe but maybe it is OK with
 * the stray interrupt handler installed.  But these handlers only reduce
 * the window of vulnerability - it is still open at the end of
 * isa_configure().
 *
 * XXX - many comments are stale.
 */

	STRAYINTR(0,1,1, al)
	STRAYINTR(1,1,1, al)
	STRAYINTR(2,1,1, al)
	STRAYINTR(3,1,1, al)
	STRAYINTR(4,1,1, al)
	STRAYINTR(5,1,1, al)
	STRAYINTR(6,1,1, al)
	STRAYINTR(8,2,1_AND_2, ah)
	STRAYINTR(9,2,1_AND_2, ah)
	STRAYINTR(10,2,1_AND_2, ah)
	STRAYINTR(11,2,1_AND_2, ah)
	STRAYINTR(12,2,1_AND_2, ah)
	STRAYINTR(13,2,1_AND_2, ah)
	STRAYINTR(14,2,1_AND_2, ah)
	STRAYINTR(15,2,1_AND_2, ah)
IDTVEC(intrdefault)
	STRAYINTR(7,1,1, al)	/* XXX */
#if 0
	INTRSTRAY(255, _highmask, 255) ; call	_isa_strayintr ; INTREXIT2
#endif
/*
 * These are the interrupt counters, I moved them here from icu.s so that
 * they are with the name table.  rgrimes
 *
 * There are now lots of counters, this has been redone to work with
 * Bruce Evans intr-0.1 code, which I modified some more to make it all
 * work with vmstat.
 */
	.data
Vresume:	.space	16 * 4	/* where to resume intr handler after unpend */
	.globl	_intrcnt
_intrcnt:			/* used by vmstat to calc size of table */
	.globl	_intrcnt_bad7
_intrcnt_bad7:	.space	4	/* glitches on irq 7 */
	.globl	_intrcnt_bad15
_intrcnt_bad15:	.space	4	/* glitches on irq 15 */
	.globl	_intrcnt_stray
_intrcnt_stray:	.space	4	/* total count of stray interrupts */
	.globl	_intrcnt_actv
_intrcnt_actv:	.space	NR_REAL_INT_HANDLERS * 4	/* active interrupts */
	.globl	_intrcnt_pend
_intrcnt_pend:	.space	NR_REAL_INT_HANDLERS * 4	/* pending interrupts */
	.globl	_eintrcnt
_eintrcnt:			/* used by vmstat to calc size of table */
	.globl	_intrcnt_spl
_intrcnt_spl:	.space	32 * 4	/* XXX 32 should not be hard coded ? */
	.globl	_intrcnt_show
_intrcnt_show:	.space	8 * 4	/* XXX 16 should not be hard coded ? */

/*
 * Build the interrupt name table for vmstat
 */

#undef BUILD_FAST_VECTOR
#define BUILD_FAST_VECTOR	BUILD_VECTOR

#undef BUILD_VECTOR
#define	BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
		     icu_num, icu_enables, reg) \
	.ascii	"name irq" ; \
	.asciz	"irq_num"
/*
 * XXX - use the STRING and CONCAT macros from <sys/cdefs.h> to stringize
 * and concatenate names above and elsewhere.
 */

	.text
	.globl	_intrnames, _eintrnames
_intrnames:
	BUILD_VECTOR(bad,,7,,,,,,)
	BUILD_VECTOR(bad,,15,,,,,,)
	BUILD_VECTOR(stray,,,,,,,,)
	BUILD_VECTORS

#undef BUILD_FAST_VECTOR
#define BUILD_FAST_VECTOR	BUILD_VECTOR

#undef BUILD_VECTOR
#define	BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
		     icu_num, icu_enables, reg) \
	.asciz	"name pend"

	BUILD_VECTORS
_eintrnames:

/*
 * now the spl names
 */
	.asciz	"unpend_v"
	.asciz	"doreti"
	.asciz	"p0!ni"
	.asciz	"!p0!ni"
	.asciz	"p0ni"
	.asciz	"netisr_raw"
	.asciz	"netisr_ip"
	.asciz	"netisr_imp"
	.asciz	"netisr_ns"
	.asciz	"netisr_iso"
	.asciz	"softclock"		/* 10 */
	.asciz	"trap"
	.asciz	"doreti_exit2"
	.asciz	"splbio"
	.asciz	"splclock"
	.asciz	"splhigh"
	.asciz	"splimp"
	.asciz	"splnet"
	.asciz	"splsoftclock"
	.asciz	"spltty"
	.asciz	"spl0"			/* 20 */
	.asciz	"netisr_raw2"
	.asciz	"netisr_ip2"
	.asciz	"netisr_imp2"
	.asciz	"netisr_ns2"
	.asciz	"netisr_iso2"
	.asciz	"splx"
	.asciz	"splx!0"
	.asciz	"unpend_V"
	.asciz	"spl29"		/* spl29-spl31 are spares */
	.asciz	"spl30"
	.asciz	"spl31"
/*
 * now the mask names
 */
	.asciz	"cli"
	.asciz	"cpl"
	.asciz	"imen"
	.asciz	"ipending"
	.asciz	"sti"
	.asciz	"mask5"		/* mask5-mask7 are spares */
	.asciz	"mask6"
	.asciz	"mask7"
Commit	Line	Data
15637ed4	1	/*
78ed81a3	2	* from: vector.s, 386BSD 0.1 unknown origin
78ed81a3	3	* $Id$
15637ed4 RG	4	*/
	5
	6	#include "i386/isa/icu.h"
	7	#include "i386/isa/isa.h"
	8	#include "vector.h"
	9
	10	#define ICU_EOI 0x20 /* XXX - define elsewhere */
	11
	12	#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
	13	#define IRQ_BYTE(irq_num) ((irq_num) / 8)
	14
	15	#define ENABLE_ICU1 \
	16	movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
	17	FASTER_NOP ; /* ... ASAP ... */ \
	18	outb %al,$IO_ICU1 /* ... to clear in service bit */
	19	#ifdef AUTO_EOI_1
	20	#undef ENABLE_ICU1 /* we now use auto-EOI to reduce i/o */
	21	#define ENABLE_ICU1
	22	#endif
	23
	24	#define ENABLE_ICU1_AND_2 \
	25	movb $ICU_EOI,%al ; /* as above */ \
	26	FASTER_NOP ; \
	27	outb %al,$IO_ICU2 ; /* but do second icu first */ \
	28	FASTER_NOP ; \
	29	outb %al,$IO_ICU1 /* then first icu */
	30	#ifdef AUTO_EOI_2
	31	#undef ENABLE_ICU1_AND_2 /* data sheet says no auto-EOI on slave ... */
	32	#define ENABLE_ICU1_AND_2 /* ... but it works */
	33	#endif
	34
	35	/*
	36	* Macros for interrupt interrupt entry, call to handler, and exit.
	37	*
	38	* XXX - the interrupt frame is set up to look like a trap frame. This is
	39	* usually a waste of time. The only interrupt handlers that want a frame
	40	* are the clock handler (it wants a clock frame), the npx handler (it's
	41	* easier to do right all in assembler). The interrupt return routine
	42	* needs a trap frame for rare AST's (it could easily convert the frame).
	43	* The direct costs of setting up a trap frame are two pushl's (error
	44	* code and trap number), an addl to get rid of these, and pushing and
	45	* popping the call-saved regs %esi, %edi and %ebp twice, The indirect
	46	* costs are making the driver interface nonuniform so unpending of
	47	* interrupts is more complicated and slower (call_driver(unit) would
	48	* be easier than ensuring an interrupt frame for all handlers. Finally,
	49	* there are some struct copies in the npx handler and maybe in the clock
	50	* handler that could be avoided by working more with pointers to frames
	51	* instead of frames.
	52	*
	53	* XXX - should we do a cld on every system entry to avoid the requirement
	54	* for scattered cld's?
	55	*
	56	* Coding notes for *.s:
	57	*
	58	* If possible, avoid operations that involve an operand size override.
	59	* Word-sized operations might be smaller, but the operand size override
	60	* makes them slower on on 486's and no faster on 386's unless perhaps
	61	* the instruction pipeline is depleted. E.g.,
	62	*
	63	* Use movl to seg regs instead of the equivalent but more descriptive
	64	* movw - gas generates an irelevant (slower) operand size override.
	65	*
	66	* Use movl to ordinary regs in preference to movw and especially
	67	* in preference to movz[bw]l. Use unsigned (long) variables with the
68	* top bits clear instead of unsigned short variables to provide more
69	* opportunities for movl.
70	*
71	* If possible, use byte-sized operations. They are smaller and no slower.
72	*
73	* Use (%reg) instead of 0(%reg) - gas generates larger code for the latter.
74	*
75	* If the interrupt frame is made more flexible, INTR can push %eax first
76	* and decide the ipending case with less overhead, e.g., by avoiding
77	* loading segregs.
78	*/
79
80	#define FAST_INTR(unit, irq_num, id_num, handler, enable_icus) \
81	pushl %eax ; /* save only call-used registers */ \
82	pushl %ecx ; \
83	pushl %edx ; \
84	pushl %ds ; \
85	/* pushl %es ; know compiler doesn't do string insns */ \
86	movl $KDSEL,%eax ; \
87	movl %ax,%ds ; \
88	/* movl %ax,%es ; */ \
89	SHOW_CLI ; /* although it interferes with "ASAP" */ \
90	pushl $unit ; \
91	call handler ; /* do the work ASAP */ \
92	enable_icus ; /* (re)enable ASAP (helps edge trigger?) */ \
93	addl $4,%esp ; \
94	incl _cnt+V_INTR ; /* book-keeping can wait */ \
95	COUNT_EVENT(_intrcnt_actv, id_num) ; \
96	SHOW_STI ; \
97	/* popl %es ; */ \
98	popl %ds ; \
99	popl %edx; \
100	popl %ecx; \
101	popl %eax; \
102	iret
103
104	#define INTR(unit, irq_num, id_num, mask, handler, icu, enable_icus, reg, stray) \
105	pushl $0 ; /* dummy error code */ \
106	pushl $T_ASTFLT ; \
107	pushal ; \
108	pushl %ds ; /* save our data and extra segments ... */ \
109	pushl %es ; \
110	movl $KDSEL,%eax ; /* ... and reload with kernel's own ... */ \
111	movl %ax,%ds ; /* ... early in case SHOW_A_LOT is on */ \
112	movl %ax,%es ; \
113	SHOW_CLI ; /* interrupt did an implicit cli */ \
114	movb _imen + IRQ_BYTE(irq_num),%al ; \
115	orb $IRQ_BIT(irq_num),%al ; \
116	movb %al,_imen + IRQ_BYTE(irq_num) ; \
117	SHOW_IMEN ; \
118	FASTER_NOP ; \
119	outb %al,$icu+1 ; \
120	enable_icus ; \
121	incl _cnt+V_INTR ; /* tally interrupts */ \
122	movl _cpl,%eax ; \
123	testb $IRQ_BIT(irq_num),%reg ; \
124	jne 2f ; \
125	1: ; \
126	COUNT_EVENT(_intrcnt_actv, id_num) ; \
127	movl _cpl,%eax ; \
128	pushl %eax ; \
129	pushl $unit ; \
130	orl mask,%eax ; \
131	movl %eax,_cpl ; \
132	SHOW_CPL ; \
133	SHOW_STI ; \
134	sti ; \
135	call handler ; \
136	movb _imen + IRQ_BYTE(irq_num),%al ; \
137	andb $~IRQ_BIT(irq_num),%al ; \
138	movb %al,_imen + IRQ_BYTE(irq_num) ; \
139	SHOW_IMEN ; \
140	FASTER_NOP ; \
141	outb %al,$icu+1 ; \
142	jmp doreti ; \
143	; \
144	ALIGN_TEXT ; \
145	2: ; \
146	COUNT_EVENT(_intrcnt_pend, id_num) ; \
147	movl $1b,%eax ; /* register resume address */ \
148	/* XXX - someday do it at attach time */ \
149	movl %eax,Vresume + (irq_num) * 4 ; \
150	orb $IRQ_BIT(irq_num),_ipending + IRQ_BYTE(irq_num) ; \
151	SHOW_IPENDING ; \
152	popl %es ; \
153	popl %ds ; \
154	popal ; \
155	addl $4+4,%esp ; \
156	iret
157
158	/*
159	* vector.h has defined a macro 'BUILD_VECTORS' containing a big list of info
160	* about vectors, including a submacro 'BUILD_VECTOR' that operates on the
161	* info about each vector. We redefine 'BUILD_VECTOR' to expand the info
162	* in different ways. Here we expand it to a list of interrupt handlers.
163	* This order is of course unimportant. Elsewhere we expand it to inline
164	* linear search code for which the order is a little more important and
165	* concatenating the code with no holes is very important.
166	*
167	* XXX - now there is BUILD_FAST_VECTOR as well as BUILD_VECTOR.
168	*
169	* The info consists of the following items for each vector:
170	*
171	* name (identifier): name of the vector; used to build labels
172	* unit (expression): unit number to call the device driver with
173	* irq_num (number): number of the IRQ to handled (0-15)
174	* id_num (number): uniq numeric id for handler (assigned by config)
175	* mask (blank-ident): priority mask used
176	* handler (blank-ident): interrupt handler to call
177	* icu_num (number): (1 + irq_num / 8) converted for label building
178	* icu_enables (number): 1 for icu_num == 1, 1_AND_2 for icu_num == 2
179	* reg (blank-ident): al for icu_num == 1, ah for icu_num == 2
180	*
181	* 'irq_num' is converted in several ways at config time to get around
182	* limitations in cpp. The macros have blanks after commas iff they would
183	* not mess up identifiers and numbers.
184	*/
185
186	#undef BUILD_FAST_VECTOR
187	#define BUILD_FAST_VECTOR(name, unit, irq_num, id_num, mask, handler, \
188	icu_num, icu_enables, reg) \
189	.globl handler ; \
190	.text ; \
191	.globl _V/**/name ; \
192	SUPERALIGN_TEXT ; \
193	_V/**/name: ; \
194	FAST_INTR(unit, irq_num, id_num, handler, ENABLE_ICU/**/icu_enables)
195
196	#undef BUILD_VECTOR
197	#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
198	icu_num, icu_enables, reg) \
199	.globl handler ; \
200	.text ; \
201	.globl _V/**/name ; \
202	SUPERALIGN_TEXT ; \
203	_V/**/name: ; \
204	INTR(unit,irq_num,id_num, mask, handler, IO_ICU/**/icu_num, \
205	ENABLE_ICU/**/icu_enables, reg,)
206
207	BUILD_VECTORS
208
209	/* hardware interrupt catcher (IDT 32 - 47) */
210	.globl _isa_strayintr
211
212	#define STRAYINTR(irq_num, icu_num, icu_enables, reg) \
213	IDTVEC(intr/**/irq_num) ; \
214	INTR(irq_num,irq_num,irq_num, _highmask, _isa_strayintr, \
215	IO_ICU//icu_num, ENABLE_ICU//icu_enables, reg,stray)
216
217	/*
218	* XXX - the mask (1 << 2) == IRQ_SLAVE will be generated for IRQ 2, instead
219	* of the mask IRQ2 (defined as IRQ9 == (1 << 9)). But IRQ 2 "can't happen".
220	* In fact, all stray interrupts "can't happen" except for bugs. The
221	* "stray" IRQ 7 is documented behaviour of the 8259. It happens when there
222	* is a glitch on any of its interrupt inputs. Does it really interrupt when
223	* IRQ 7 is masked?
224	*
225	* XXX - unpend doesn't work for these, it sends them to the real handler.
226	*
227	* XXX - the race bug during initialization may be because I changed the
228	* order of switching from the stray to the real interrupt handler to before
229	* enabling interrupts. The old order looked unsafe but maybe it is OK with
230	* the stray interrupt handler installed. But these handlers only reduce
231	* the window of vulnerability - it is still open at the end of
232	* isa_configure().
233	*
234	* XXX - many comments are stale.
235	*/
236
237	STRAYINTR(0,1,1, al)
238	STRAYINTR(1,1,1, al)
239	STRAYINTR(2,1,1, al)
240	STRAYINTR(3,1,1, al)
241	STRAYINTR(4,1,1, al)
242	STRAYINTR(5,1,1, al)
243	STRAYINTR(6,1,1, al)
244	STRAYINTR(8,2,1_AND_2, ah)
245	STRAYINTR(9,2,1_AND_2, ah)
246	STRAYINTR(10,2,1_AND_2, ah)
247	STRAYINTR(11,2,1_AND_2, ah)
248	STRAYINTR(12,2,1_AND_2, ah)
249	STRAYINTR(13,2,1_AND_2, ah)
250	STRAYINTR(14,2,1_AND_2, ah)
251	STRAYINTR(15,2,1_AND_2, ah)
252	IDTVEC(intrdefault)
253	STRAYINTR(7,1,1, al) /* XXX */
254	#if 0
255	INTRSTRAY(255, _highmask, 255) ; call _isa_strayintr ; INTREXIT2
256	#endif
257	/*
258	* These are the interrupt counters, I moved them here from icu.s so that
259	* they are with the name table. rgrimes
260	*
261	* There are now lots of counters, this has been redone to work with
262	* Bruce Evans intr-0.1 code, which I modified some more to make it all
263	* work with vmstat.
264	*/
265	.data
266	Vresume: .space 16 * 4 /* where to resume intr handler after unpend */
267	.globl _intrcnt
268	_intrcnt: /* used by vmstat to calc size of table */
269	.globl _intrcnt_bad7
270	_intrcnt_bad7: .space 4 /* glitches on irq 7 */
271	.globl _intrcnt_bad15
272	_intrcnt_bad15: .space 4 /* glitches on irq 15 */
273	.globl _intrcnt_stray
274	_intrcnt_stray: .space 4 /* total count of stray interrupts */
275	.globl _intrcnt_actv
276	_intrcnt_actv: .space NR_REAL_INT_HANDLERS * 4 /* active interrupts */
277	.globl _intrcnt_pend
278	_intrcnt_pend: .space NR_REAL_INT_HANDLERS * 4 /* pending interrupts */
78ed81a3	279	.globl _eintrcnt
78ed81a3	280	_eintrcnt: /* used by vmstat to calc size of table */
15637ed4 RG	281	.globl _intrcnt_spl
	282	_intrcnt_spl: .space 32 * 4 /* XXX 32 should not be hard coded ? */
	283	.globl _intrcnt_show
	284	_intrcnt_show: .space 8 * 4 /* XXX 16 should not be hard coded ? */
15637ed4 RG	285
	286	/*
	287	* Build the interrupt name table for vmstat
	288	*/
	289
	290	#undef BUILD_FAST_VECTOR
	291	#define BUILD_FAST_VECTOR BUILD_VECTOR
	292
	293	#undef BUILD_VECTOR
	294	#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
	295	icu_num, icu_enables, reg) \
	296	.ascii "name irq" ; \
	297	.asciz "irq_num"
	298	/*
	299	* XXX - use the STRING and CONCAT macros from <sys/cdefs.h> to stringize
	300	* and concatenate names above and elsewhere.
	301	*/
	302
	303	.text
	304	.globl _intrnames, _eintrnames
	305	_intrnames:
	306	BUILD_VECTOR(bad,,7,,,,,,)
	307	BUILD_VECTOR(bad,,15,,,,,,)
	308	BUILD_VECTOR(stray,,,,,,,,)
	309	BUILD_VECTORS
	310
	311	#undef BUILD_FAST_VECTOR
	312	#define BUILD_FAST_VECTOR BUILD_VECTOR
	313
	314	#undef BUILD_VECTOR
	315	#define BUILD_VECTOR(name, unit, irq_num, id_num, mask, handler, \
	316	icu_num, icu_enables, reg) \
	317	.asciz "name pend"
	318
	319	BUILD_VECTORS
78ed81a3	320	_eintrnames:
15637ed4 RG	321
	322	/*
	323	* now the spl names
	324	*/
	325	.asciz "unpend_v"
	326	.asciz "doreti"
	327	.asciz "p0!ni"
	328	.asciz "!p0!ni"
	329	.asciz "p0ni"
	330	.asciz "netisr_raw"
	331	.asciz "netisr_ip"
	332	.asciz "netisr_imp"
	333	.asciz "netisr_ns"
78ed81a3	334	.asciz "netisr_iso"
78ed81a3	335	.asciz "softclock" /* 10 */
15637ed4 RG	336	.asciz "trap"
	337	.asciz "doreti_exit2"
	338	.asciz "splbio"
	339	.asciz "splclock"
	340	.asciz "splhigh"
	341	.asciz "splimp"
	342	.asciz "splnet"
	343	.asciz "splsoftclock"
	344	.asciz "spltty"
78ed81a3	345	.asciz "spl0" /* 20 */
15637ed4 RG	346	.asciz "netisr_raw2"
15637ed4 RG	347	.asciz "netisr_ip2"
78ed81a3	348	.asciz "netisr_imp2"
	349	.asciz "netisr_ns2"
	350	.asciz "netisr_iso2"
15637ed4 RG	351	.asciz "splx"
	352	.asciz "splx!0"
	353	.asciz "unpend_V"
78ed81a3	354	.asciz "spl29" /* spl29-spl31 are spares */
15637ed4 RG	355	.asciz "spl30"
	356	.asciz "spl31"
	357	/*
	358	* now the mask names
	359	*/
	360	.asciz "cli"
	361	.asciz "cpl"
	362	.asciz "imen"
	363	.asciz "ipending"
	364	.asciz "sti"
	365	.asciz "mask5" /* mask5-mask7 are spares */
	366	.asciz "mask6"
	367	.asciz "mask7"
	368