[unix-history] / usr / src / sys / vax / uba / vp.c

/*	vp.c	4.10	81/11/18	*/

#include "vp.h"
#if NVP > 0
/*
 * Versatec matrix printer/plotter
 * dma interface driver
 *
 * SETUP NOTES:
 *	Set up both print and plot interrupts to go through the same vector
 *	Give the address of the plcsr register in the config specification
 */
#include "../h/param.h"
#include "../h/dir.h"
#include "../h/user.h"
#include "../h/buf.h"
#include "../h/systm.h"
#include "../h/map.h"
#include "../h/pte.h"
#include "../h/ubavar.h"
#include "../h/ubareg.h"
#include "../h/vcmd.h"

unsigned minvpph();

#define	VPPRI	(PZERO-1)

struct	vpdevice {
	short	plbcr;
	short	pbxaddr;
	short	prbcr;
	u_short pbaddr;
	short	plcsr;
	short	plbuf;
	short	prcsr;
	u_short prbuf;
};

#define	VP_ERROR	0100000
#define	VP_DTCINTR	0040000
#define	VP_DMAACT	0020000
#define	VP_READY	0000200
#define	VP_IENABLE	0000100
#define	VP_TERMCOM	0000040
#define	VP_FFCOM	0000020
#define	VP_EOTCOM	0000010
#define	VP_CLRCOM	0000004
#define	VP_RESET	0000002
#define	VP_SPP		0000001

struct vp_softc {
	int	sc_state;
	int	sc_count;
	int	sc_bufp;
	struct	buf *sc_bp;
	int	sc_ubinfo;
} vp_softc[NVP];

/* sc_state bits */
#define	VPSC_BUSY	0001000
#define	VPSC_MODE	0000700
#define	VPSC_SPP	0000400
#define	VPSC_PLOT	0000200
#define	VPSC_PRINT	0000100
#define	VPSC_CMNDS	0000076
#define	VPSC_OPEN	0000001

struct	uba_device *vpdinfo[NVP];

#define	VPUNIT(dev)	(minor(dev))

struct	buf rvpbuf[NVP];

int	vpprobe(), vpattach();
struct	uba_device *vpdinfo[NVP];
u_short	vpstd[] = { 0777500, 0 };
struct	uba_driver vpdriver =
    { vpprobe, 0, vpattach, 0, vpstd, "vp", vpdinfo };

vpprobe(reg)
	caddr_t reg;
{
	register int br, cvec;		/* value-result */
	register struct vpdevice *vpaddr = (struct vpdevice *)(reg-010);

#ifdef lint
	br = 0; cvec = br; br = cvec;
	vpintr(0);
#endif
	vpaddr->prcsr = VP_IENABLE|VP_DTCINTR;
	vpaddr->pbaddr = 0;
	vpaddr->pbxaddr = 0;
	vpaddr->prbcr = 1;
	DELAY(10000);
	vpaddr->prcsr = 0;
#ifdef ERNIE
	/* UNTIL REWIRED, GET INTERRUPT AT 200 BUT WANT 174 */
	if (cvec == 0200) {
		printf("vp reset vec from 200 to 174\n");
		cvec = 0174;
	}
#endif
}

/*ARGSUSED*/
vpattach(ui)
	struct uba_device *ui;
{

	ui->ui_addr -= 010;
	ui->ui_physaddr -= 010;
}

vpopen(dev)
	dev_t dev;
{
	register struct vp_softc *sc;
	register struct vpdevice *vpaddr;
	register struct uba_device *ui;

	if (VPUNIT(dev) >= NVP ||
	    ((sc = &vp_softc[minor(dev)])->sc_state&VPSC_OPEN) ||
	    (ui = vpdinfo[VPUNIT(dev)]) == 0 || ui->ui_alive == 0) {
		u.u_error = ENXIO;
		return;
	}
	vpaddr = (struct vpdevice *)ui->ui_addr;
	sc->sc_state = VPSC_OPEN|VPSC_PRINT | VP_CLRCOM|VP_RESET;
	sc->sc_count = 0;
	vpaddr->prcsr = VP_IENABLE|VP_DTCINTR;
	vptimo(dev);
	while (sc->sc_state & VPSC_CMNDS) {
		(void) spl4();
		if (vpwait(dev)) {
			vpclose(dev);
			u.u_error = EIO;
			return;
		}
		vpstart(dev);
		(void) spl0();
	}
}

vpstrategy(bp)
	register struct buf *bp;
{
	register int e;
	register struct vp_softc *sc = &vp_softc[VPUNIT(bp->b_dev)];
	register struct uba_device *ui = vpdinfo[VPUNIT(bp->b_dev)];
	register struct vpdevice *vpaddr = (struct vpdevice *)ui->ui_addr;

	(void) spl4();
	while (sc->sc_state & VPSC_BUSY)
		sleep((caddr_t)sc, VPPRI);
	sc->sc_state |= VPSC_BUSY;
	sc->sc_bp = bp;
	sc->sc_ubinfo = ubasetup(ui->ui_ubanum, bp, UBA_NEEDBDP);
	if (e = vpwait(bp->b_dev))
		goto brkout;
	sc->sc_count = bp->b_bcount;
	vpstart(bp->b_dev);
	while (((sc->sc_state&VPSC_PLOT) ? vpaddr->plcsr : vpaddr->prcsr) & VP_DMAACT)
		sleep((caddr_t)sc, VPPRI);
	sc->sc_count = 0;
	if ((sc->sc_state&VPSC_MODE) == VPSC_SPP)
		sc->sc_state = (sc->sc_state &~ VPSC_MODE) | VPSC_PLOT;
	(void) spl0();
brkout:
	ubarelse(ui->ui_ubanum, &sc->sc_ubinfo);
	sc->sc_state &= ~VPSC_BUSY;
	sc->sc_bp = 0;
	iodone(bp);
	if (e)
		u.u_error = EIO;
	wakeup((caddr_t)sc);
}

int	vpblock = 16384;

unsigned
minvpph(bp)
	struct buf *bp;
{

	if (bp->b_bcount > vpblock)
		bp->b_bcount = vpblock;
}

/*ARGSUSED*/
vpwrite(dev)
	dev_t dev;
{

	physio(vpstrategy, &rvpbuf[VPUNIT(dev)], dev, B_WRITE, minvpph);
}

vpwait(dev)
	dev_t dev;
{
	register struct vpdevice *vpaddr =
	    (struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	register int e;

	for (;;) {
		e = (sc->sc_state & VPSC_PLOT) ? vpaddr->plcsr : vpaddr->prcsr;
		if (e & (VP_READY|VP_ERROR))
			break;
		sleep((caddr_t)sc, VPPRI);
	}
	/* I wish i could tell whether an error indicated an npr timeout */
	return (e & VP_ERROR);
}

vpstart(dev)
	dev_t;
{
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	register struct vpdevice *vpaddr =
	    (struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
	short bit;

	if (sc->sc_count) {
		vpaddr->pbaddr = sc->sc_ubinfo;
		vpaddr->pbxaddr = (sc->sc_ubinfo>>12)&0x30;
		if (sc->sc_state & (VPSC_PRINT|VPSC_SPP))
			vpaddr->prbcr = sc->sc_count;
		else
			vpaddr->plbcr = sc->sc_count;
		return;
	}
	for (bit = 1; bit != 0; bit <<= 1)
		if (sc->sc_state&bit&VPSC_CMNDS) {
			vpaddr->plcsr |= bit;
			sc->sc_state &= ~bit;
			return;
		}
}

/*ARGSUSED*/
vpioctl(dev, cmd, addr, flag)
	dev_t dev;
	int cmd;
	register caddr_t addr;
	int flag;
{
	register int m;
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	register struct vpdevice *vpaddr =
	    (struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;

	switch (cmd) {

	case VGETSTATE:
		(void) suword(addr, sc->sc_state);
		return;

	case VSETSTATE:
		m = fuword(addr);
		if (m == -1) {
			u.u_error = EFAULT;
			return;
		}
		sc->sc_state =
		    (sc->sc_state & ~VPSC_MODE) | (m&(VPSC_MODE|VPSC_CMNDS));
		break;

	default:
		u.u_error = ENOTTY;
		return;
	}
	(void) spl4();
	(void) vpwait(dev);
	if (sc->sc_state&VPSC_SPP)
		vpaddr->plcsr |= VP_SPP;
	else
		vpaddr->plcsr &= ~VP_SPP;
	sc->sc_count = 0;
	while (sc->sc_state & VPSC_CMNDS) {
		(void) vpwait(dev);
		vpstart(dev);
	}
	(void) spl0();
}

vptimo(dev)
	dev_t dev;
{
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];

	if (sc->sc_state&VPSC_OPEN)
		timeout(vptimo, (caddr_t)dev, hz/10);
	vpintr(dev);
}

/*ARGSUSED*/
vpintr(dev)
	dev_t dev;
{
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];

	wakeup((caddr_t)sc);
}

vpclose(dev)
	dev_t dev;
{
	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	register struct vpdevice *vpaddr =
	    (struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;

	sc->sc_state = 0;
	sc->sc_count = 0;
	vpaddr->plcsr = 0;
}

vpreset(uban)
	int uban;
{
	register int vp11;
	register struct uba_device *ui;
	register struct vp_softc *sc = vp_softc;
	register struct vpdevice *vpaddr;

	for (vp11 = 0; vp11 < NVP; vp11++, sc++) {
		if ((ui = vpdinfo[vp11]) == 0 || ui->ui_alive == 0 ||
		    ui->ui_ubanum != uban || (sc->sc_state&VPSC_OPEN) == 0)
			continue;
		printf(" vp%d", vp11);
		vpaddr = (struct vpdevice *)ui->ui_addr;
		vpaddr->prcsr = VP_IENABLE|VP_DTCINTR;
		if ((sc->sc_state & VPSC_BUSY) == 0)
			continue;
		if (sc->sc_ubinfo) {
			printf("<%d>", (sc->sc_ubinfo>>28)&0xf);
			ubarelse(ui->ui_ubanum, &sc->sc_ubinfo);
		}
		sc->sc_count = sc->sc_bp->b_bcount;
		vpstart(sc->sc_bp->b_dev);
	}
}
#endif
Commit	Line	Data
89b8a44c	1	/* vp.c 4.10 81/11/18 */
2a75a0e9	2
66b4fb09	3	#include "vp.h"
a5cc519e BJ	4	#if NVP > 0
	5	/*
	6	* Versatec matrix printer/plotter
	7	* dma interface driver
48a8d9c7 BJ	8	*
	9	* SETUP NOTES:
	10	* Set up both print and plot interrupts to go through the same vector
	11	* Give the address of the plcsr register in the config specification
a5cc519e	12	*/
2a75a0e9 BJ	13	#include "../h/param.h"
	14	#include "../h/dir.h"
	15	#include "../h/user.h"
	16	#include "../h/buf.h"
	17	#include "../h/systm.h"
	18	#include "../h/map.h"
	19	#include "../h/pte.h"
fc4d0a69 BJ	20	#include "../h/ubavar.h"
	21	#include "../h/ubareg.h"
	22	#include "../h/vcmd.h"
2a75a0e9 BJ	23
	24	unsigned minvpph();
	25
	26	#define VPPRI (PZERO-1)
	27
fc4d0a69	28	struct vpdevice {
2a75a0e9	29	short plbcr;
3bfdaa99	30	short pbxaddr;
2a75a0e9	31	short prbcr;
fc4d0a69	32	u_short pbaddr;
2a75a0e9 BJ	33	short plcsr;
	34	short plbuf;
	35	short prcsr;
fc4d0a69	36	u_short prbuf;
2a75a0e9 BJ	37	};
2a75a0e9 BJ	38
fc4d0a69 BJ	39	#define VP_ERROR 0100000
	40	#define VP_DTCINTR 0040000
	41	#define VP_DMAACT 0020000
	42	#define VP_READY 0000200
	43	#define VP_IENABLE 0000100
	44	#define VP_TERMCOM 0000040
	45	#define VP_FFCOM 0000020
	46	#define VP_EOTCOM 0000010
	47	#define VP_CLRCOM 0000004
	48	#define VP_RESET 0000002
	49	#define VP_SPP 0000001
	50
	51	struct vp_softc {
	52	int sc_state;
	53	int sc_count;
	54	int sc_bufp;
	55	struct buf *sc_bp;
	56	int sc_ubinfo;
	57	} vp_softc[NVP];
	58
	59	/* sc_state bits */
	60	#define VPSC_BUSY 0001000
	61	#define VPSC_MODE 0000700
	62	#define VPSC_SPP 0000400
	63	#define VPSC_PLOT 0000200
	64	#define VPSC_PRINT 0000100
	65	#define VPSC_CMNDS 0000076
	66	#define VPSC_OPEN 0000001
	67
	68	struct uba_device *vpdinfo[NVP];
	69
	70	#define VPUNIT(dev) (minor(dev))
	71
	72	struct buf rvpbuf[NVP];
	73
	74	int vpprobe(), vpattach();
	75	struct uba_device *vpdinfo[NVP];
	76	u_short vpstd[] = { 0777500, 0 };
	77	struct uba_driver vpdriver =
	78	{ vpprobe, 0, vpattach, 0, vpstd, "vp", vpdinfo };
	79
	80	vpprobe(reg)
	81	caddr_t reg;
	82	{
	83	register int br, cvec; /* value-result */
	84	register struct vpdevice vpaddr = (struct vpdevice )(reg-010);
	85
89b8a44c BJ	86	#ifdef lint
	87	br = 0; cvec = br; br = cvec;
	88	vpintr(0);
	89	#endif
fc4d0a69 BJ	90	vpaddr->prcsr = VP_IENABLE\|VP_DTCINTR;
	91	vpaddr->pbaddr = 0;
	92	vpaddr->pbxaddr = 0;
48a8d9c7	93	vpaddr->prbcr = 1;
fc4d0a69 BJ	94	DELAY(10000);
fc4d0a69 BJ	95	vpaddr->prcsr = 0;
48a8d9c7 BJ	96	#ifdef ERNIE
	97	/* UNTIL REWIRED, GET INTERRUPT AT 200 BUT WANT 174 */
	98	if (cvec == 0200) {
	99	printf("vp reset vec from 200 to 174\n");
	100	cvec = 0174;
	101	}
	102	#endif
fc4d0a69 BJ	103	}
	104
	105	/ARGSUSED/
	106	vpattach(ui)
	107	struct uba_device *ui;
	108	{
	109
	110	ui->ui_addr -= 010;
	111	ui->ui_physaddr -= 010;
	112	}
	113
	114	vpopen(dev)
	115	dev_t dev;
2a75a0e9	116	{
fc4d0a69 BJ	117	register struct vp_softc *sc;
	118	register struct vpdevice *vpaddr;
	119	register struct uba_device *ui;
2a75a0e9	120
fc4d0a69 BJ	121	if (VPUNIT(dev) >= NVP \|\|
	122	((sc = &vp_softc[minor(dev)])->sc_state&VPSC_OPEN) \|\|
	123	(ui = vpdinfo[VPUNIT(dev)]) == 0 \|\| ui->ui_alive == 0) {
2a75a0e9 BJ	124	u.u_error = ENXIO;
	125	return;
	126	}
fc4d0a69 BJ	127	vpaddr = (struct vpdevice *)ui->ui_addr;
	128	sc->sc_state = VPSC_OPEN\|VPSC_PRINT \| VP_CLRCOM\|VP_RESET;
	129	sc->sc_count = 0;
	130	vpaddr->prcsr = VP_IENABLE\|VP_DTCINTR;
	131	vptimo(dev);
	132	while (sc->sc_state & VPSC_CMNDS) {
81263dba	133	(void) spl4();
fc4d0a69 BJ	134	if (vpwait(dev)) {
fc4d0a69 BJ	135	vpclose(dev);
2a75a0e9 BJ	136	u.u_error = EIO;
	137	return;
	138	}
fc4d0a69	139	vpstart(dev);
81263dba	140	(void) spl0();
2a75a0e9 BJ	141	}
	142	}
	143
	144	vpstrategy(bp)
	145	register struct buf *bp;
	146	{
	147	register int e;
fc4d0a69 BJ	148	register struct vp_softc *sc = &vp_softc[VPUNIT(bp->b_dev)];
	149	register struct uba_device *ui = vpdinfo[VPUNIT(bp->b_dev)];
	150	register struct vpdevice vpaddr = (struct vpdevice )ui->ui_addr;
2a75a0e9	151
81263dba	152	(void) spl4();
fc4d0a69 BJ	153	while (sc->sc_state & VPSC_BUSY)
	154	sleep((caddr_t)sc, VPPRI);
	155	sc->sc_state \|= VPSC_BUSY;
	156	sc->sc_bp = bp;
	157	sc->sc_ubinfo = ubasetup(ui->ui_ubanum, bp, UBA_NEEDBDP);
	158	if (e = vpwait(bp->b_dev))
2a75a0e9	159	goto brkout;
fc4d0a69 BJ	160	sc->sc_count = bp->b_bcount;
	161	vpstart(bp->b_dev);
	162	while (((sc->sc_state&VPSC_PLOT) ? vpaddr->plcsr : vpaddr->prcsr) & VP_DMAACT)
	163	sleep((caddr_t)sc, VPPRI);
	164	sc->sc_count = 0;
	165	if ((sc->sc_state&VPSC_MODE) == VPSC_SPP)
	166	sc->sc_state = (sc->sc_state &~ VPSC_MODE) \| VPSC_PLOT;
81263dba	167	(void) spl0();
2a75a0e9	168	brkout:
fc4d0a69 BJ	169	ubarelse(ui->ui_ubanum, &sc->sc_ubinfo);
	170	sc->sc_state &= ~VPSC_BUSY;
	171	sc->sc_bp = 0;
2a75a0e9 BJ	172	iodone(bp);
	173	if (e)
	174	u.u_error = EIO;
fc4d0a69	175	wakeup((caddr_t)sc);
2a75a0e9 BJ	176	}
	177
	178	int vpblock = 16384;
	179
	180	unsigned
	181	minvpph(bp)
fc4d0a69	182	struct buf *bp;
2a75a0e9 BJ	183	{
	184
	185	if (bp->b_bcount > vpblock)
	186	bp->b_bcount = vpblock;
	187	}
	188
	189	/ARGSUSED/
	190	vpwrite(dev)
fc4d0a69	191	dev_t dev;
2a75a0e9 BJ	192	{
2a75a0e9 BJ	193
fc4d0a69	194	physio(vpstrategy, &rvpbuf[VPUNIT(dev)], dev, B_WRITE, minvpph);
2a75a0e9 BJ	195	}
2a75a0e9 BJ	196
fc4d0a69 BJ	197	vpwait(dev)
fc4d0a69 BJ	198	dev_t dev;
2a75a0e9	199	{
fc4d0a69 BJ	200	register struct vpdevice *vpaddr =
	201	(struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
	202	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	203	register int e;
2a75a0e9	204
fc4d0a69 BJ	205	for (;;) {
	206	e = (sc->sc_state & VPSC_PLOT) ? vpaddr->plcsr : vpaddr->prcsr;
	207	if (e & (VP_READY\|VP_ERROR))
	208	break;
	209	sleep((caddr_t)sc, VPPRI);
	210	}
	211	/* I wish i could tell whether an error indicated an npr timeout */
	212	return (e & VP_ERROR);
2a75a0e9 BJ	213	}
2a75a0e9 BJ	214
fc4d0a69 BJ	215	vpstart(dev)
fc4d0a69 BJ	216	dev_t;
2a75a0e9	217	{
fc4d0a69 BJ	218	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	219	register struct vpdevice *vpaddr =
	220	(struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
	221	short bit;
	222
	223	if (sc->sc_count) {
	224	vpaddr->pbaddr = sc->sc_ubinfo;
	225	vpaddr->pbxaddr = (sc->sc_ubinfo>>12)&0x30;
	226	if (sc->sc_state & (VPSC_PRINT\|VPSC_SPP))
	227	vpaddr->prbcr = sc->sc_count;
2a75a0e9	228	else
fc4d0a69	229	vpaddr->plbcr = sc->sc_count;
2a75a0e9 BJ	230	return;
	231	}
	232	for (bit = 1; bit != 0; bit <<= 1)
fc4d0a69 BJ	233	if (sc->sc_state&bit&VPSC_CMNDS) {
	234	vpaddr->plcsr \|= bit;
	235	sc->sc_state &= ~bit;
2a75a0e9 BJ	236	return;
	237	}
	238	}
	239
	240	/ARGSUSED/
	241	vpioctl(dev, cmd, addr, flag)
fc4d0a69 BJ	242	dev_t dev;
fc4d0a69 BJ	243	int cmd;
2a75a0e9	244	register caddr_t addr;
fc4d0a69	245	int flag;
2a75a0e9 BJ	246	{
2a75a0e9 BJ	247	register int m;
fc4d0a69 BJ	248	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	249	register struct vpdevice *vpaddr =
	250	(struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
2a75a0e9 BJ	251
	252	switch (cmd) {
	253
fc4d0a69 BJ	254	case VGETSTATE:
fc4d0a69 BJ	255	(void) suword(addr, sc->sc_state);
2a75a0e9 BJ	256	return;
2a75a0e9 BJ	257
fc4d0a69	258	case VSETSTATE:
2a75a0e9 BJ	259	m = fuword(addr);
	260	if (m == -1) {
	261	u.u_error = EFAULT;
	262	return;
	263	}
fc4d0a69 BJ	264	sc->sc_state =
fc4d0a69 BJ	265	(sc->sc_state & ~VPSC_MODE) \| (m&(VPSC_MODE\|VPSC_CMNDS));
2a75a0e9 BJ	266	break;
	267
	268	default:
	269	u.u_error = ENOTTY;
	270	return;
	271	}
81263dba	272	(void) spl4();
fc4d0a69 BJ	273	(void) vpwait(dev);
	274	if (sc->sc_state&VPSC_SPP)
	275	vpaddr->plcsr \|= VP_SPP;
2a75a0e9	276	else
fc4d0a69 BJ	277	vpaddr->plcsr &= ~VP_SPP;
	278	sc->sc_count = 0;
	279	while (sc->sc_state & VPSC_CMNDS) {
	280	(void) vpwait(dev);
	281	vpstart(dev);
2a75a0e9	282	}
81263dba	283	(void) spl0();
2a75a0e9 BJ	284	}
2a75a0e9 BJ	285
fc4d0a69 BJ	286	vptimo(dev)
fc4d0a69 BJ	287	dev_t dev;
2a75a0e9	288	{
fc4d0a69	289	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
2a75a0e9	290
fc4d0a69 BJ	291	if (sc->sc_state&VPSC_OPEN)
	292	timeout(vptimo, (caddr_t)dev, hz/10);
	293	vpintr(dev);
2a75a0e9 BJ	294	}
	295
	296	/ARGSUSED/
	297	vpintr(dev)
fc4d0a69	298	dev_t dev;
2a75a0e9	299	{
fc4d0a69	300	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
2a75a0e9	301
fc4d0a69	302	wakeup((caddr_t)sc);
2a75a0e9 BJ	303	}
2a75a0e9 BJ	304
fc4d0a69 BJ	305	vpclose(dev)
fc4d0a69 BJ	306	dev_t dev;
2a75a0e9	307	{
fc4d0a69 BJ	308	register struct vp_softc *sc = &vp_softc[VPUNIT(dev)];
	309	register struct vpdevice *vpaddr =
	310	(struct vpdevice *)vpdinfo[VPUNIT(dev)]->ui_addr;
2a75a0e9	311
fc4d0a69 BJ	312	sc->sc_state = 0;
	313	sc->sc_count = 0;
	314	vpaddr->plcsr = 0;
2a75a0e9	315	}
d62630e9	316
fc4d0a69 BJ	317	vpreset(uban)
fc4d0a69 BJ	318	int uban;
d62630e9	319	{
fc4d0a69 BJ	320	register int vp11;
	321	register struct uba_device *ui;
	322	register struct vp_softc *sc = vp_softc;
	323	register struct vpdevice *vpaddr;
	324
	325	for (vp11 = 0; vp11 < NVP; vp11++, sc++) {
	326	if ((ui = vpdinfo[vp11]) == 0 \|\| ui->ui_alive == 0 \|\|
	327	ui->ui_ubanum != uban \|\| (sc->sc_state&VPSC_OPEN) == 0)
	328	continue;
	329	printf(" vp%d", vp11);
	330	vpaddr = (struct vpdevice *)ui->ui_addr;
	331	vpaddr->prcsr = VP_IENABLE\|VP_DTCINTR;
	332	if ((sc->sc_state & VPSC_BUSY) == 0)
	333	continue;
	334	if (sc->sc_ubinfo) {
	335	printf("<%d>", (sc->sc_ubinfo>>28)&0xf);
	336	ubarelse(ui->ui_ubanum, &sc->sc_ubinfo);
	337	}
	338	sc->sc_count = sc->sc_bp->b_bcount;
	339	vpstart(sc->sc_bp->b_dev);
d62630e9	340	}
d62630e9	341	}
a5cc519e	342	#endif