early non-blocking stuff
[unix-history] / usr / src / sys / vax / uba / up.c
CommitLineData
89b8a44c 1/* up.c 4.40 81/11/18 */
008c0481 2
66b4fb09 3#include "up.h"
a3cb8f60 4#if NSC > 0
008c0481 5/*
10fb932f 6 * UNIBUS disk driver with overlapped seeks and ECC recovery.
0c48c799
BJ
7 *
8 * TODO:
0c48c799 9 * Add bad sector forwarding code
299d67ed 10 * Check that offset recovery code works
008c0481
BJ
11 */
12
13#include "../h/param.h"
14#include "../h/systm.h"
3f3a34c3
BJ
15#include "../h/cpu.h"
16#include "../h/nexus.h"
41888f16 17#include "../h/dk.h"
008c0481
BJ
18#include "../h/buf.h"
19#include "../h/conf.h"
20#include "../h/dir.h"
21#include "../h/user.h"
22#include "../h/map.h"
80e7c811 23#include "../h/pte.h"
008c0481 24#include "../h/mtpr.h"
008c0481 25#include "../h/vm.h"
89bd2f01
BJ
26#include "../h/ubavar.h"
27#include "../h/ubareg.h"
0ff318b2 28#include "../h/cmap.h"
008c0481 29
0ff318b2 30#include "../h/upreg.h"
008c0481 31
3f3a34c3
BJ
32struct up_softc {
33 int sc_softas;
71236e46 34 int sc_ndrive;
3f3a34c3 35 int sc_wticks;
736772ef 36 int sc_recal;
a3cb8f60 37} up_softc[NSC];
008c0481 38
3f3a34c3 39/* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
008c0481
BJ
40struct size
41{
42 daddr_t nblocks;
43 int cyloff;
44} up_sizes[8] = {
45 15884, 0, /* A=cyl 0 thru 26 */
46 33440, 27, /* B=cyl 27 thru 81 */
d1778415 47 495520, 0, /* C=cyl 0 thru 814 */
008c0481
BJ
48 15884, 562, /* D=cyl 562 thru 588 */
49 55936, 589, /* E=cyl 589 thru 680 */
0d728200
BJ
50#ifndef NOBADSECT
51 81376, 681, /* F=cyl 681 thru 814 */
52 153728, 562, /* G=cyl 562 thru 814 */
53#else
54 81472, 681,
55 153824, 562,
56#endif
008c0481 57 291346, 82, /* H=cyl 82 thru 561 */
3f3a34c3
BJ
58}, fj_sizes[8] = {
59 15884, 0, /* A=cyl 0 thru 49 */
60 33440, 50, /* B=cyl 50 thru 154 */
61 263360, 0, /* C=cyl 0 thru 822 */
62 0, 0,
63 0, 0,
64 0, 0,
65 0, 0,
0d728200
BJ
66#ifndef NOBADSECT
67 213664, 155, /* H=cyl 155 thru 822 */
68#else
69 213760, 155,
70#endif
008c0481 71};
3f3a34c3 72/* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
008c0481 73
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BJ
74#define _upSDIST 2 /* 1.0 msec */
75#define _upRDIST 4 /* 2.0 msec */
76
77int upSDIST = _upSDIST;
78int upRDIST = _upRDIST;
79
71236e46 80int upprobe(), upslave(), upattach(), updgo(), upintr();
89bd2f01
BJ
81struct uba_ctlr *upminfo[NSC];
82struct uba_device *updinfo[NUP];
83struct uba_device *upip[NSC][4];
d763a2b7 84
71236e46 85u_short upstd[] = { 0776700, 0774400, 0776300, 0 };
0801d37f 86struct uba_driver scdriver =
71236e46 87 { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo };
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BJ
88struct buf uputab[NUP];
89
90struct upst {
91 short nsect;
92 short ntrak;
93 short nspc;
94 short ncyl;
95 struct size *sizes;
96} upst[] = {
71236e46
BJ
97 32, 19, 32*19, 823, up_sizes, /* 9300/cdc */
98/* 9300 actually has 815 cylinders... */
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99 32, 10, 32*10, 823, fj_sizes, /* fujitsu 160m */
100};
008c0481 101
2601dfbd 102u_char up_offset[16] = {
299d67ed
BJ
103 UPOF_P400, UPOF_M400, UPOF_P400, UPOF_M400,
104 UPOF_P800, UPOF_M800, UPOF_P800, UPOF_M800,
105 UPOF_P1200, UPOF_M1200, UPOF_P1200, UPOF_M1200,
106 0, 0, 0, 0
2601dfbd 107};
008c0481 108
0801d37f 109struct buf rupbuf[NUP];
008c0481 110
008c0481
BJ
111#define b_cylin b_resid
112
008c0481
BJ
113#ifdef INTRLVE
114daddr_t dkblock();
115#endif
3f3a34c3
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116
117int upwstart, upwatch(); /* Have started guardian */
7e00c42b 118int upseek;
f88f8fdb 119int upwaitdry;
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120
121/*ARGSUSED*/
71236e46 122upprobe(reg)
3f3a34c3 123 caddr_t reg;
008c0481 124{
d763a2b7
BJ
125 register int br, cvec;
126
71236e46
BJ
127#ifdef lint
128 br = 0; cvec = br; br = cvec;
89b8a44c 129 upintr(0);
71236e46 130#endif
2601dfbd 131 ((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY;
71236e46 132 DELAY(10);
2601dfbd 133 ((struct updevice *)reg)->upcs1 = 0;
d763a2b7 134 return (1);
3f3a34c3
BJ
135}
136
71236e46 137upslave(ui, reg)
89bd2f01 138 struct uba_device *ui;
3f3a34c3
BJ
139 caddr_t reg;
140{
2601dfbd 141 register struct updevice *upaddr = (struct updevice *)reg;
3f3a34c3
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142
143 upaddr->upcs1 = 0; /* conservative */
71236e46 144 upaddr->upcs2 = ui->ui_slave;
299d67ed 145 if (upaddr->upcs2&UPCS2_NED) {
2601dfbd 146 upaddr->upcs1 = UP_DCLR|UP_GO;
3f3a34c3
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147 return (0);
148 }
71236e46
BJ
149 return (1);
150}
151
152upattach(ui)
89bd2f01 153 register struct uba_device *ui;
71236e46 154{
2601dfbd 155 register struct updevice *upaddr;
71236e46 156
6a81870e 157 if (upwstart == 0) {
7780575a 158 timeout(upwatch, (caddr_t)0, hz);
6a81870e
BJ
159 upwstart++;
160 }
b7333467
BJ
161 if (ui->ui_dk >= 0)
162 dk_mspw[ui->ui_dk] = .0000020345;
71236e46
BJ
163 upip[ui->ui_ctlr][ui->ui_slave] = ui;
164 up_softc[ui->ui_ctlr].sc_ndrive++;
2601dfbd
BJ
165 upaddr = (struct updevice *)ui->ui_addr;
166 upaddr->upcs1 = 0;
167 upaddr->upcs2 = ui->ui_slave;
26e15512 168 upaddr->uphr = UPHR_MAXTRAK;
c6a51a7b 169 if (upaddr->uphr == 9)
26e15512
BJ
170 ui->ui_type = 1; /* fujitsu hack */
171 upaddr->upcs2 = UPCS2_CLR;
172/*
173 upaddr->uphr = UPHR_MAXCYL;
174 printf("maxcyl %d\n", upaddr->uphr);
175 upaddr->uphr = UPHR_MAXTRAK;
176 printf("maxtrak %d\n", upaddr->uphr);
177 upaddr->uphr = UPHR_MAXSECT;
178 printf("maxsect %d\n", upaddr->uphr);
179*/
3f3a34c3
BJ
180}
181
3f3a34c3
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182upstrategy(bp)
183 register struct buf *bp;
184{
89bd2f01 185 register struct uba_device *ui;
3f3a34c3
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186 register struct upst *st;
187 register int unit;
7e00c42b 188 register struct buf *dp;
3f3a34c3 189 int xunit = minor(bp->b_dev) & 07;
7e00c42b 190 long bn, sz;
3f3a34c3 191
7e00c42b 192 sz = (bp->b_bcount+511) >> 9;
008c0481 193 unit = dkunit(bp);
3f3a34c3
BJ
194 if (unit >= NUP)
195 goto bad;
196 ui = updinfo[unit];
197 if (ui == 0 || ui->ui_alive == 0)
198 goto bad;
199 st = &upst[ui->ui_type];
200 if (bp->b_blkno < 0 ||
201 (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
202 goto bad;
203 bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
008c0481 204 (void) spl5();
7e00c42b
BJ
205 dp = &uputab[ui->ui_unit];
206 disksort(dp, bp);
207 if (dp->b_active == 0) {
3f3a34c3
BJ
208 (void) upustart(ui);
209 bp = &ui->ui_mi->um_tab;
210 if (bp->b_actf && bp->b_active == 0)
211 (void) upstart(ui->ui_mi);
008c0481
BJ
212 }
213 (void) spl0();
3f3a34c3
BJ
214 return;
215
216bad:
217 bp->b_flags |= B_ERROR;
218 iodone(bp);
219 return;
008c0481
BJ
220}
221
736772ef
BJ
222/*
223 * Unit start routine.
224 * Seek the drive to be where the data is
225 * and then generate another interrupt
226 * to actually start the transfer.
227 * If there is only one drive on the controller,
228 * or we are very close to the data, don't
229 * bother with the search. If called after
230 * searching once, don't bother to look where
231 * we are, just queue for transfer (to avoid
232 * positioning forever without transferrring.)
233 */
3f3a34c3 234upustart(ui)
89bd2f01 235 register struct uba_device *ui;
008c0481
BJ
236{
237 register struct buf *bp, *dp;
89bd2f01 238 register struct uba_ctlr *um;
2601dfbd 239 register struct updevice *upaddr;
3f3a34c3 240 register struct upst *st;
008c0481 241 daddr_t bn;
736772ef 242 int sn, csn;
71236e46
BJ
243 /*
244 * The SC21 cancels commands if you just say
2601dfbd 245 * cs1 = UP_IE
71236e46
BJ
246 * so we are cautious about handling of cs1.
247 * Also don't bother to clear as bits other than in upintr().
248 */
736772ef
BJ
249 int didie = 0;
250
251 if (ui == 0)
252 return (0);
89bd2f01 253 um = ui->ui_mi;
3f3a34c3
BJ
254 dk_busy &= ~(1<<ui->ui_dk);
255 dp = &uputab[ui->ui_unit];
7bc8d985 256 if ((bp = dp->b_actf) == NULL)
eb891eaa 257 goto out;
736772ef
BJ
258 /*
259 * If the controller is active, just remember
260 * that this device would like to be positioned...
261 * if we tried to position now we would confuse the SC21.
262 */
3f3a34c3 263 if (um->um_tab.b_active) {
d763a2b7 264 up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave;
2a3b9a7f
BJ
265 return (0);
266 }
736772ef
BJ
267 /*
268 * If we have already positioned this drive,
269 * then just put it on the ready queue.
270 */
a3f430e0
BJ
271 if (dp->b_active)
272 goto done;
273 dp->b_active = 1;
2601dfbd 274 upaddr = (struct updevice *)um->um_addr;
3f3a34c3 275 upaddr->upcs2 = ui->ui_slave;
736772ef
BJ
276 /*
277 * If drive has just come up,
278 * setup the pack.
279 */
299d67ed 280 if ((upaddr->upds & UPDS_VV) == 0) {
71236e46 281 /* SHOULD WARN SYSTEM THAT THIS HAPPENED */
2601dfbd
BJ
282 upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO;
283 upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO;
299d67ed 284 upaddr->upof = UPOF_FMT22;
eb891eaa 285 didie = 1;
008c0481 286 }
736772ef
BJ
287 /*
288 * If drive is offline, forget about positioning.
289 */
299d67ed 290 if ((upaddr->upds & (UPDS_DPR|UPDS_MOL)) != (UPDS_DPR|UPDS_MOL))
2a3b9a7f 291 goto done;
736772ef
BJ
292 /*
293 * If there is only one drive,
294 * dont bother searching.
295 */
71236e46
BJ
296 if (up_softc[um->um_ctlr].sc_ndrive == 1)
297 goto done;
736772ef
BJ
298 /*
299 * Figure out where this transfer is going to
300 * and see if we are close enough to justify not searching.
301 */
3f3a34c3 302 st = &upst[ui->ui_type];
008c0481 303 bn = dkblock(bp);
3f3a34c3
BJ
304 sn = bn%st->nspc;
305 sn = (sn + st->nsect - upSDIST) % st->nsect;
736772ef 306 if (bp->b_cylin - upaddr->updc)
7bc8d985 307 goto search; /* Not on-cylinder */
2a3b9a7f
BJ
308 else if (upseek)
309 goto done; /* Ok just to be on-cylinder */
008c0481 310 csn = (upaddr->upla>>6) - sn - 1;
7bc8d985 311 if (csn < 0)
3f3a34c3
BJ
312 csn += st->nsect;
313 if (csn > st->nsect - upRDIST)
008c0481 314 goto done;
008c0481 315search:
736772ef
BJ
316 upaddr->updc = bp->b_cylin;
317 /*
318 * Not on cylinder at correct position,
319 * seek/search.
320 */
2a3b9a7f 321 if (upseek)
2601dfbd 322 upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO;
7e00c42b 323 else {
2a3b9a7f 324 upaddr->upda = sn;
2601dfbd 325 upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO;
2a3b9a7f 326 }
eb891eaa 327 didie = 1;
736772ef
BJ
328 /*
329 * Mark unit busy for iostat.
330 */
3f3a34c3
BJ
331 if (ui->ui_dk >= 0) {
332 dk_busy |= 1<<ui->ui_dk;
333 dk_seek[ui->ui_dk]++;
008c0481 334 }
eb891eaa 335 goto out;
008c0481 336done:
736772ef
BJ
337 /*
338 * Device is ready to go.
339 * Put it on the ready queue for the controller
340 * (unless its already there.)
341 */
2601dfbd
BJ
342 if (dp->b_active != 2) {
343 dp->b_forw = NULL;
344 if (um->um_tab.b_actf == NULL)
345 um->um_tab.b_actf = dp;
346 else
347 um->um_tab.b_actl->b_forw = dp;
348 um->um_tab.b_actl = dp;
349 dp->b_active = 2;
350 }
eb891eaa
BJ
351out:
352 return (didie);
008c0481
BJ
353}
354
736772ef
BJ
355/*
356 * Start up a transfer on a drive.
357 */
3f3a34c3 358upstart(um)
89bd2f01 359 register struct uba_ctlr *um;
008c0481
BJ
360{
361 register struct buf *bp, *dp;
89bd2f01 362 register struct uba_device *ui;
2601dfbd 363 register struct updevice *upaddr;
7e00c42b 364 struct upst *st;
008c0481 365 daddr_t bn;
f88f8fdb 366 int dn, sn, tn, cmd, waitdry;
008c0481 367
008c0481 368loop:
736772ef
BJ
369 /*
370 * Pull a request off the controller queue
371 */
3f3a34c3 372 if ((dp = um->um_tab.b_actf) == NULL)
eb891eaa 373 return (0);
008c0481 374 if ((bp = dp->b_actf) == NULL) {
3f3a34c3 375 um->um_tab.b_actf = dp->b_forw;
008c0481
BJ
376 goto loop;
377 }
736772ef
BJ
378 /*
379 * Mark controller busy, and
380 * determine destination of this request.
381 */
3f3a34c3
BJ
382 um->um_tab.b_active++;
383 ui = updinfo[dkunit(bp)];
008c0481 384 bn = dkblock(bp);
3f3a34c3
BJ
385 dn = ui->ui_slave;
386 st = &upst[ui->ui_type];
387 sn = bn%st->nspc;
388 tn = sn/st->nsect;
389 sn %= st->nsect;
2601dfbd 390 upaddr = (struct updevice *)ui->ui_addr;
736772ef
BJ
391 /*
392 * Select drive if not selected already.
393 */
394 if ((upaddr->upcs2&07) != dn)
395 upaddr->upcs2 = dn;
396 /*
397 * Check that it is ready and online
398 */
f88f8fdb 399 waitdry = 0;
299d67ed 400 while ((upaddr->upds&UPDS_DRY) == 0) {
f88f8fdb
BJ
401 if (++waitdry > 512)
402 break;
403 upwaitdry++;
404 }
299d67ed 405 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
f6d201ff 406 printf("up%d: not ready", dkunit(bp));
299d67ed 407 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
71236e46 408 printf("\n");
3f3a34c3
BJ
409 um->um_tab.b_active = 0;
410 um->um_tab.b_errcnt = 0;
88253fd2
BJ
411 dp->b_actf = bp->av_forw;
412 dp->b_active = 0;
413 bp->b_flags |= B_ERROR;
414 iodone(bp);
88253fd2
BJ
415 goto loop;
416 }
736772ef
BJ
417 /*
418 * Oh, well, sometimes this
419 * happens, for reasons unknown.
420 */
2601dfbd 421 printf(" (flakey)\n");
008c0481 422 }
736772ef
BJ
423 /*
424 * Setup for the transfer, and get in the
425 * UNIBUS adaptor queue.
426 */
5aa9d5ea 427 upaddr->updc = bp->b_cylin;
008c0481 428 upaddr->upda = (tn << 8) + sn;
008c0481
BJ
429 upaddr->upwc = -bp->b_bcount / sizeof (short);
430 if (bp->b_flags & B_READ)
2601dfbd 431 cmd = UP_IE|UP_RCOM|UP_GO;
008c0481 432 else
2601dfbd 433 cmd = UP_IE|UP_WCOM|UP_GO;
b7333467 434 um->um_cmd = cmd;
a0eab615 435 (void) ubago(ui);
eb891eaa 436 return (1);
008c0481
BJ
437}
438
736772ef
BJ
439/*
440 * Now all ready to go, stuff the registers.
441 */
b7333467 442updgo(um)
89bd2f01 443 struct uba_ctlr *um;
3f3a34c3 444{
2601dfbd 445 register struct updevice *upaddr = (struct updevice *)um->um_addr;
7e00c42b 446
b7333467
BJ
447 upaddr->upba = um->um_ubinfo;
448 upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300);
3f3a34c3
BJ
449}
450
736772ef
BJ
451/*
452 * Handle a disk interrupt.
453 */
443c8066 454upintr(sc21)
3f3a34c3 455 register sc21;
008c0481
BJ
456{
457 register struct buf *bp, *dp;
89bd2f01
BJ
458 register struct uba_ctlr *um = upminfo[sc21];
459 register struct uba_device *ui;
2601dfbd 460 register struct updevice *upaddr = (struct updevice *)um->um_addr;
008c0481 461 register unit;
7e00c42b 462 struct up_softc *sc = &up_softc[um->um_ctlr];
71236e46 463 int as = (upaddr->upas & 0377) | sc->sc_softas;
f88f8fdb 464 int needie = 1, waitdry;
008c0481 465
7e00c42b 466 sc->sc_wticks = 0;
71236e46 467 sc->sc_softas = 0;
736772ef
BJ
468 /*
469 * If controller wasn't transferring, then this is an
470 * interrupt for attention status on seeking drives.
471 * Just service them.
472 */
473 if (um->um_tab.b_active == 0) {
474 if (upaddr->upcs1 & UP_TRE)
475 upaddr->upcs1 = UP_TRE;
476 goto doattn;
477 }
736772ef
BJ
478 /*
479 * Get device and block structures, and a pointer
89bd2f01 480 * to the uba_device for the drive. Select the drive.
736772ef
BJ
481 */
482 dp = um->um_tab.b_actf;
483 bp = dp->b_actf;
484 ui = updinfo[dkunit(bp)];
485 dk_busy &= ~(1 << ui->ui_dk);
486 if ((upaddr->upcs2&07) != ui->ui_slave)
3f3a34c3 487 upaddr->upcs2 = ui->ui_slave;
736772ef
BJ
488 /*
489 * Check for and process errors on
490 * either the drive or the controller.
491 */
299d67ed 492 if ((upaddr->upds&UPDS_ERR) || (upaddr->upcs1&UP_TRE)) {
f88f8fdb 493 waitdry = 0;
299d67ed 494 while ((upaddr->upds & UPDS_DRY) == 0) {
f88f8fdb
BJ
495 if (++waitdry > 512)
496 break;
497 upwaitdry++;
498 }
299d67ed 499 if (upaddr->uper1&UPER1_WLE) {
736772ef
BJ
500 /*
501 * Give up on write locked devices
502 * immediately.
503 */
f6d201ff 504 printf("up%d: write locked\n", dkunit(bp));
736772ef
BJ
505 bp->b_flags |= B_ERROR;
506 } else if (++um->um_tab.b_errcnt > 27) {
507 /*
508 * After 28 retries (16 without offset, and
509 * 12 with offset positioning) give up.
510 */
f6d201ff
BJ
511 harderr(bp, "up");
512 printf("cs2=%b er1=%b er2=%b\n",
c84ff1f9
BJ
513 upaddr->upcs2, UPCS2_BITS,
514 upaddr->uper1, UPER1_BITS,
515 upaddr->uper2, UPER2_BITS);
736772ef
BJ
516 bp->b_flags |= B_ERROR;
517 } else {
518 /*
519 * Retriable error.
520 * If a soft ecc, correct it (continuing
521 * by returning if necessary.
522 * Otherwise fall through and retry the transfer
523 */
524 um->um_tab.b_active = 0; /* force retry */
299d67ed 525 if ((upaddr->uper1&(UPER1_DCK|UPER1_ECH))==UPER1_DCK)
2601dfbd
BJ
526 if (upecc(ui))
527 return;
736772ef
BJ
528 }
529 /*
530 * Clear drive error and, every eight attempts,
531 * (starting with the fourth)
532 * recalibrate to clear the slate.
533 */
534 upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
535 needie = 0;
fc4d0a69 536 if ((um->um_tab.b_errcnt&07) == 4 && um->um_tab.b_active == 0) {
736772ef 537 upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO;
a6442a2f
BJ
538 sc->sc_recal = 0;
539 goto nextrecal;
736772ef
BJ
540 }
541 }
542 /*
a6442a2f
BJ
543 * Advance recalibration finite state machine
544 * if recalibrate in progress, through
545 * RECAL
546 * SEEK
547 * OFFSET (optional)
548 * RETRY
736772ef 549 */
a6442a2f
BJ
550 switch (sc->sc_recal) {
551
552 case 1:
553 upaddr->updc = bp->b_cylin;
554 upaddr->upcs1 = UP_SEEK|UP_IE|UP_GO;
555 goto nextrecal;
556 case 2:
557 if (um->um_tab.b_errcnt < 16 || (bp->b_flags&B_READ) == 0)
558 goto donerecal;
299d67ed 559 upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UPOF_FMT22;
a6442a2f
BJ
560 upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO;
561 goto nextrecal;
562 nextrecal:
563 sc->sc_recal++;
564 um->um_tab.b_active = 1;
565 return;
566 donerecal:
567 case 3:
736772ef 568 sc->sc_recal = 0;
a6442a2f
BJ
569 um->um_tab.b_active = 0;
570 break;
736772ef
BJ
571 }
572 /*
573 * If still ``active'', then don't need any more retries.
574 */
575 if (um->um_tab.b_active) {
576 /*
577 * If we were offset positioning,
578 * return to centerline.
579 */
580 if (um->um_tab.b_errcnt >= 16) {
299d67ed 581 upaddr->upof = UPOF_FMT22;
736772ef 582 upaddr->upcs1 = UP_RTC|UP_GO|UP_IE;
299d67ed 583 while (upaddr->upds & UPDS_PIP)
736772ef 584 DELAY(25);
eb891eaa 585 needie = 0;
008c0481 586 }
736772ef
BJ
587 um->um_tab.b_active = 0;
588 um->um_tab.b_errcnt = 0;
589 um->um_tab.b_actf = dp->b_forw;
590 dp->b_active = 0;
591 dp->b_errcnt = 0;
592 dp->b_actf = bp->av_forw;
593 bp->b_resid = (-upaddr->upwc * sizeof(short));
594 iodone(bp);
595 /*
596 * If this unit has more work to do,
597 * then start it up right away.
598 */
599 if (dp->b_actf)
600 if (upustart(ui))
eb891eaa 601 needie = 0;
008c0481 602 }
736772ef 603 as &= ~(1<<ui->ui_slave);
8c58f40c
BJ
604 /*
605 * Release unibus resources and flush data paths.
606 */
607 ubadone(um);
736772ef
BJ
608doattn:
609 /*
610 * Process other units which need attention.
611 * For each unit which needs attention, call
612 * the unit start routine to place the slave
613 * on the controller device queue.
614 */
a6442a2f
BJ
615 while (unit = ffs(as)) {
616 unit--; /* was 1 origin */
617 as &= ~(1<<unit);
618 upaddr->upas = 1<<unit;
619 if (upustart(upip[sc21][unit]))
620 needie = 0;
621 }
736772ef
BJ
622 /*
623 * If the controller is not transferring, but
624 * there are devices ready to transfer, start
625 * the controller.
626 */
3f3a34c3
BJ
627 if (um->um_tab.b_actf && um->um_tab.b_active == 0)
628 if (upstart(um))
eb891eaa 629 needie = 0;
2a3b9a7f 630 if (needie)
2601dfbd 631 upaddr->upcs1 = UP_IE;
008c0481
BJ
632}
633
634upread(dev)
0801d37f 635 dev_t dev;
008c0481 636{
0801d37f 637 register int unit = minor(dev) >> 3;
7e00c42b 638
0801d37f
BJ
639 if (unit >= NUP)
640 u.u_error = ENXIO;
641 else
642 physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys);
008c0481
BJ
643}
644
645upwrite(dev)
0801d37f 646 dev_t dev;
008c0481 647{
0801d37f 648 register int unit = minor(dev) >> 3;
7e00c42b 649
0801d37f
BJ
650 if (unit >= NUP)
651 u.u_error = ENXIO;
652 else
653 physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys);
008c0481
BJ
654}
655
7bc8d985
BJ
656/*
657 * Correct an ECC error, and restart the i/o to complete
658 * the transfer if necessary. This is quite complicated because
659 * the transfer may be going to an odd memory address base and/or
660 * across a page boundary.
661 */
3f3a34c3 662upecc(ui)
89bd2f01 663 register struct uba_device *ui;
008c0481 664{
2601dfbd 665 register struct updevice *up = (struct updevice *)ui->ui_addr;
3f3a34c3 666 register struct buf *bp = uputab[ui->ui_unit].b_actf;
89bd2f01 667 register struct uba_ctlr *um = ui->ui_mi;
3f3a34c3
BJ
668 register struct upst *st;
669 struct uba_regs *ubp = ui->ui_hd->uh_uba;
7bc8d985 670 register int i;
008c0481 671 caddr_t addr;
7bc8d985 672 int reg, bit, byte, npf, mask, o, cmd, ubaddr;
008c0481
BJ
673 int bn, cn, tn, sn;
674
008c0481 675 /*
7bc8d985
BJ
676 * Npf is the number of sectors transferred before the sector
677 * containing the ECC error, and reg is the UBA register
678 * mapping (the first part of) the transfer.
679 * O is offset within a memory page of the first byte transferred.
008c0481 680 */
7bc8d985 681 npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1;
b7333467 682 reg = btop(um->um_ubinfo&0x3ffff) + npf;
008c0481 683 o = (int)bp->b_un.b_addr & PGOFSET;
89bd2f01 684 printf("up%d%c: soft ecc sn%d\n", dkunit(bp),
0c48c799 685 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
008c0481 686 mask = up->upec2;
299d67ed 687#ifdef UPECCDEBUG
8c58f40c
BJ
688 printf("npf %d reg %x o %d mask %o pos %d\n", npf, reg, o, mask,
689 up->upec1);
299d67ed 690#endif
7bc8d985
BJ
691 /*
692 * Flush the buffered data path, and compute the
693 * byte and bit position of the error. The variable i
694 * is the byte offset in the transfer, the variable byte
695 * is the offset from a page boundary in main memory.
696 */
060afaf6 697 ubapurge(um);
7bc8d985
BJ
698 i = up->upec1 - 1; /* -1 makes 0 origin */
699 bit = i&07;
700 i = (i&~07)>>3;
008c0481 701 byte = i + o;
7bc8d985
BJ
702 /*
703 * Correct while possible bits remain of mask. Since mask
704 * contains 11 bits, we continue while the bit offset is > -11.
705 * Also watch out for end of this block and the end of the whole
706 * transfer.
707 */
708 while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
709 addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+
710 (byte & PGOFSET);
299d67ed 711#ifdef UPECCDEBUG
8c58f40c
BJ
712 printf("addr %x map reg %x\n",
713 addr, *(int *)(&ubp->uba_map[reg+btop(byte)]));
714 printf("old: %x, ", getmemc(addr));
299d67ed 715#endif
7bc8d985 716 putmemc(addr, getmemc(addr)^(mask<<bit));
299d67ed 717#ifdef UPECCDEBUG
8c58f40c 718 printf("new: %x\n", getmemc(addr));
299d67ed 719#endif
7bc8d985
BJ
720 byte++;
721 i++;
722 bit -= 8;
008c0481 723 }
3f3a34c3 724 um->um_tab.b_active++; /* Either complete or continuing... */
008c0481
BJ
725 if (up->upwc == 0)
726 return (0);
7bc8d985
BJ
727 /*
728 * Have to continue the transfer... clear the drive,
729 * and compute the position where the transfer is to continue.
730 * We have completed npf+1 sectors of the transfer already;
731 * restart at offset o of next sector (i.e. in UBA register reg+1).
732 */
2601dfbd
BJ
733#ifdef notdef
734 up->uper1 = 0;
735 up->upcs1 |= UP_GO;
736#else
737 up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
008c0481 738 bn = dkblock(bp);
3f3a34c3 739 st = &upst[ui->ui_type];
008c0481 740 cn = bp->b_cylin;
3f3a34c3
BJ
741 sn = bn%st->nspc + npf + 1;
742 tn = sn/st->nsect;
743 sn %= st->nsect;
744 cn += tn/st->ntrak;
745 tn %= st->ntrak;
008c0481 746 up->updc = cn;
7bc8d985
BJ
747 up->upda = (tn << 8) | sn;
748 ubaddr = (int)ptob(reg+1) + o;
749 up->upba = ubaddr;
750 cmd = (ubaddr >> 8) & 0x300;
2601dfbd 751 cmd |= UP_IE|UP_GO|UP_RCOM;
7bc8d985 752 up->upcs1 = cmd;
2601dfbd 753#endif
008c0481
BJ
754 return (1);
755}
977c2848
BJ
756
757/*
758 * Reset driver after UBA init.
759 * Cancel software state of all pending transfers
760 * and restart all units and the controller.
761 */
3f3a34c3 762upreset(uban)
f6d201ff 763 int uban;
977c2848 764{
89bd2f01
BJ
765 register struct uba_ctlr *um;
766 register struct uba_device *ui;
3f3a34c3
BJ
767 register sc21, unit;
768
a3cb8f60 769 for (sc21 = 0; sc21 < NSC; sc21++) {
7e00c42b
BJ
770 if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban ||
771 um->um_alive == 0)
3f3a34c3 772 continue;
f6d201ff 773 printf(" sc%d", sc21);
3f3a34c3
BJ
774 um->um_tab.b_active = 0;
775 um->um_tab.b_actf = um->um_tab.b_actl = 0;
f6d201ff 776 up_softc[sc21].sc_recal = 0;
b7333467
BJ
777 if (um->um_ubinfo) {
778 printf("<%d>", (um->um_ubinfo>>28)&0xf);
0801d37f 779 ubadone(um);
3f3a34c3 780 }
299d67ed 781 ((struct updevice *)(um->um_addr))->upcs2 = UPCS2_CLR;
3f3a34c3
BJ
782 for (unit = 0; unit < NUP; unit++) {
783 if ((ui = updinfo[unit]) == 0)
784 continue;
f6d201ff 785 if (ui->ui_alive == 0 || ui->ui_mi != um)
3f3a34c3
BJ
786 continue;
787 uputab[unit].b_active = 0;
788 (void) upustart(ui);
789 }
790 (void) upstart(um);
977c2848 791 }
977c2848 792}
6a81870e
BJ
793
794/*
795 * Wake up every second and if an interrupt is pending
796 * but nothing has happened increment a counter.
f6d201ff 797 * If nothing happens for 20 seconds, reset the UNIBUS
6a81870e
BJ
798 * and begin anew.
799 */
800upwatch()
801{
89bd2f01 802 register struct uba_ctlr *um;
3f3a34c3 803 register sc21, unit;
7e00c42b 804 register struct up_softc *sc;
6a81870e 805
7780575a 806 timeout(upwatch, (caddr_t)0, hz);
a3cb8f60 807 for (sc21 = 0; sc21 < NSC; sc21++) {
3f3a34c3 808 um = upminfo[sc21];
7e00c42b
BJ
809 if (um == 0 || um->um_alive == 0)
810 continue;
811 sc = &up_softc[sc21];
3f3a34c3
BJ
812 if (um->um_tab.b_active == 0) {
813 for (unit = 0; unit < NUP; unit++)
2601dfbd
BJ
814 if (uputab[unit].b_active &&
815 updinfo[unit]->ui_mi == um)
3f3a34c3 816 goto active;
7e00c42b 817 sc->sc_wticks = 0;
3f3a34c3
BJ
818 continue;
819 }
f6d201ff 820active:
7e00c42b
BJ
821 sc->sc_wticks++;
822 if (sc->sc_wticks >= 20) {
823 sc->sc_wticks = 0;
f6d201ff 824 printf("sc%d: lost interrupt\n", sc21);
a3cb8f60 825 ubareset(um->um_ubanum);
3f3a34c3 826 }
6a81870e
BJ
827 }
828}
0ff318b2
BJ
829
830#define DBSIZE 20
831
832updump(dev)
833 dev_t dev;
834{
2601dfbd 835 struct updevice *upaddr;
0ff318b2 836 char *start;
a0eab615 837 int num, blk, unit;
0ff318b2 838 struct size *sizes;
3f3a34c3 839 register struct uba_regs *uba;
89bd2f01 840 register struct uba_device *ui;
0ff318b2 841 register short *rp;
3f3a34c3 842 struct upst *st;
0ff318b2 843
0ff318b2 844 unit = minor(dev) >> 3;
0c48c799
BJ
845 if (unit >= NUP)
846 return (ENXIO);
7e00c42b 847#define phys(cast, addr) ((cast)((int)addr & 0x7fffffff))
89bd2f01 848 ui = phys(struct uba_device *, updinfo[unit]);
0c48c799
BJ
849 if (ui->ui_alive == 0)
850 return (ENXIO);
3f3a34c3 851 uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba;
89bd2f01 852 ubainit(uba);
2601dfbd 853 upaddr = (struct updevice *)ui->ui_physaddr;
89bd2f01 854 DELAY(2000000);
3f3a34c3
BJ
855 num = maxfree;
856 start = 0;
0ff318b2 857 upaddr->upcs2 = unit;
89bd2f01
BJ
858 DELAY(100);
859 if ((upaddr->upcs1&UP_DVA) == 0)
860 return (EFAULT);
299d67ed 861 if ((upaddr->upds & UPDS_VV) == 0) {
2601dfbd
BJ
862 upaddr->upcs1 = UP_DCLR|UP_GO;
863 upaddr->upcs1 = UP_PRESET|UP_GO;
299d67ed 864 upaddr->upof = UPOF_FMT22;
0ff318b2 865 }
299d67ed 866 if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY)
0c48c799 867 return (EFAULT);
7e00c42b 868 st = &upst[ui->ui_type];
3f3a34c3 869 sizes = phys(struct size *, st->sizes);
0c48c799
BJ
870 if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks)
871 return (EINVAL);
0ff318b2
BJ
872 while (num > 0) {
873 register struct pte *io;
874 register int i;
875 int cn, sn, tn;
876 daddr_t bn;
877
878 blk = num > DBSIZE ? DBSIZE : num;
3f3a34c3 879 io = uba->uba_map;
0ff318b2 880 for (i = 0; i < blk; i++)
89bd2f01 881 *(int *)io++ = (btop(start)+i) | (1<<21) | UBAMR_MRV;
0ff318b2
BJ
882 *(int *)io = 0;
883 bn = dumplo + btop(start);
71236e46
BJ
884 cn = bn/st->nspc + sizes[minor(dev)&07].cyloff;
885 sn = bn%st->nspc;
886 tn = sn/st->nsect;
887 sn = sn%st->nsect;
0ff318b2
BJ
888 upaddr->updc = cn;
889 rp = (short *) &upaddr->upda;
890 *rp = (tn << 8) + sn;
891 *--rp = 0;
892 *--rp = -blk*NBPG / sizeof (short);
2601dfbd 893 *--rp = UP_GO|UP_WCOM;
0ff318b2
BJ
894 do {
895 DELAY(25);
2601dfbd 896 } while ((upaddr->upcs1 & UP_RDY) == 0);
299d67ed 897 if (upaddr->upds&UPDS_ERR)
0c48c799 898 return (EIO);
0ff318b2
BJ
899 start += blk*NBPG;
900 num -= blk;
901 }
0ff318b2
BJ
902 return (0);
903}
63c35a63 904#endif