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Add diclaimer of copyright to _osname() manual page.
[unix-history] / gnu / usr.bin / cc / common / insn-output.c
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9bf86ebb
PR		 1/* Generated automatically by the program `genoutput'
2from the machine description file `md'. */
3
4#include "config.h"
5#include "rtl.h"
6#include "regs.h"
7#include "hard-reg-set.h"
8#include "real.h"
9#include "insn-config.h"
10
11#include "conditions.h"
12#include "insn-flags.h"
13#include "insn-attr.h"
14
15#include "insn-codes.h"
16
17#include "recog.h"
18
19#include <stdio.h>
20#include "output.h"
21
22static char *
23output_0 (operands, insn)
24 rtx *operands;
25 rtx insn;
26{
27
28{
29 if (REG_P (operands[0]))
30 return AS2 (test%L0,%0,%0);
31
32 operands[1] = const0_rtx;
33 return AS2 (cmp%L0,%1,%0);
34}
35}
36
37static char *
38output_2 (operands, insn)
39 rtx *operands;
40 rtx insn;
41{
42
43{
44 if (REG_P (operands[0]))
45 return AS2 (test%W0,%0,%0);
46
47 operands[1] = const0_rtx;
48 return AS2 (cmp%W0,%1,%0);
49}
50}
51
52static char *
53output_4 (operands, insn)
54 rtx *operands;
55 rtx insn;
56{
57
58{
59 if (REG_P (operands[0]))
60 return AS2 (test%B0,%0,%0);
61
62 operands[1] = const0_rtx;
63 return AS2 (cmp%B0,%1,%0);
64}
65}
66
67static char *
68output_6 (operands, insn)
69 rtx *operands;
70 rtx insn;
71{
72
73{
74 if (! STACK_TOP_P (operands[0]))
75 abort ();
76
77 output_asm_insn ("ftst", operands);
78
79 if (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
80 output_asm_insn (AS1 (fstp,%y0), operands);
81
82 return (char *) output_fp_cc0_set (insn);
83}
84}
85
86static char *
87output_8 (operands, insn)
88 rtx *operands;
89 rtx insn;
90{
91
92{
93 if (! STACK_TOP_P (operands[0]))
94 abort ();
95
96 output_asm_insn ("ftst", operands);
97
98 if (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
99 output_asm_insn (AS1 (fstp,%y0), operands);
100
101 return (char *) output_fp_cc0_set (insn);
102}
103}
104
105static char *
106output_10 (operands, insn)
107 rtx *operands;
108 rtx insn;
109{
110
111{
112 if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
113 {
114 cc_status.flags |= CC_REVERSED;
115 return AS2 (cmp%L0,%0,%1);
116 }
117 return AS2 (cmp%L0,%1,%0);
118}
119}
120
121static char *
122output_12 (operands, insn)
123 rtx *operands;
124 rtx insn;
125{
126
127{
128 if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
129 {
130 cc_status.flags |= CC_REVERSED;
131 return AS2 (cmp%W0,%0,%1);
132 }
133 return AS2 (cmp%W0,%1,%0);
134}
135}
136
137static char *
138output_14 (operands, insn)
139 rtx *operands;
140 rtx insn;
141{
142
143{
144 if (CONSTANT_P (operands[0]) || GET_CODE (operands[1]) == MEM)
145 {
146 cc_status.flags |= CC_REVERSED;
147 return AS2 (cmp%B0,%0,%1);
148 }
149 return AS2 (cmp%B0,%1,%0);
150}
151}
152
153static char *
154output_16 (operands, insn)
155 rtx *operands;
156 rtx insn;
157{
158 return (char *) output_float_compare (insn, operands);
159}
160
161static char *
162output_17 (operands, insn)
163 rtx *operands;
164 rtx insn;
165{
166 return (char *) output_float_compare (insn, operands);
167}
168
169static char *
170output_18 (operands, insn)
171 rtx *operands;
172 rtx insn;
173{
174 return (char *) output_float_compare (insn, operands);
175}
176
177static char *
178output_19 (operands, insn)
179 rtx *operands;
180 rtx insn;
181{
182 return (char *) output_float_compare (insn, operands);
183}
184
185static char *
186output_20 (operands, insn)
187 rtx *operands;
188 rtx insn;
189{
190 return (char *) output_float_compare (insn, operands);
191}
192
193static char *
194output_21 (operands, insn)
195 rtx *operands;
196 rtx insn;
197{
198 return (char *) output_float_compare (insn, operands);
199}
200
201static char *
202output_22 (operands, insn)
203 rtx *operands;
204 rtx insn;
205{
206 return (char *) output_float_compare (insn, operands);
207}
208
209static char *
210output_23 (operands, insn)
211 rtx *operands;
212 rtx insn;
213{
214 return (char *) output_float_compare (insn, operands);
215}
216
217static char *
218output_24 (operands, insn)
219 rtx *operands;
220 rtx insn;
221{
222 return (char *) output_float_compare (insn, operands);
223}
224
225static char *
226output_25 (operands, insn)
227 rtx *operands;
228 rtx insn;
229{
230 return (char *) output_float_compare (insn, operands);
231}
232
233static char *
234output_32 (operands, insn)
235 rtx *operands;
236 rtx insn;
237{
238
239{
240 /* For small integers, we may actually use testb. */
241 if (GET_CODE (operands[1]) == CONST_INT
242 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))
243 && (! REG_P (operands[0]) || QI_REG_P (operands[0])))
244 {
245 /* We may set the sign bit spuriously. */
246
247 if ((INTVAL (operands[1]) & ~0xff) == 0)
248 {
249 cc_status.flags |= CC_NOT_NEGATIVE;
250 return AS2 (test%B0,%1,%b0);
251 }
252
253 if ((INTVAL (operands[1]) & ~0xff00) == 0)
254 {
255 cc_status.flags |= CC_NOT_NEGATIVE;
256 operands[1] = GEN_INT (INTVAL (operands[1]) >> 8);
257
258 if (QI_REG_P (operands[0]))
259 return AS2 (test%B0,%1,%h0);
260 else
261 {
262 operands[0] = adj_offsettable_operand (operands[0], 1);
263 return AS2 (test%B0,%1,%b0);
264 }
265 }
266
267 if (GET_CODE (operands[0]) == MEM
268 && (INTVAL (operands[1]) & ~0xff0000) == 0)
269 {
270 cc_status.flags |= CC_NOT_NEGATIVE;
271 operands[1] = GEN_INT (INTVAL (operands[1]) >> 16);
272 operands[0] = adj_offsettable_operand (operands[0], 2);
273 return AS2 (test%B0,%1,%b0);
274 }
275
276 if (GET_CODE (operands[0]) == MEM
277 && (INTVAL (operands[1]) & ~0xff000000) == 0)
278 {
279 operands[1] = GEN_INT ((INTVAL (operands[1]) >> 24) & 0xff);
280 operands[0] = adj_offsettable_operand (operands[0], 3);
281 return AS2 (test%B0,%1,%b0);
282 }
283 }
284
285 if (CONSTANT_P (operands[1]) || GET_CODE (operands[0]) == MEM)
286 return AS2 (test%L0,%1,%0);
287
288 return AS2 (test%L1,%0,%1);
289}
290}
291
292static char *
293output_33 (operands, insn)
294 rtx *operands;
295 rtx insn;
296{
297
298{
299 if (GET_CODE (operands[1]) == CONST_INT
300 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))
301 && (! REG_P (operands[0]) || QI_REG_P (operands[0])))
302 {
303 if ((INTVAL (operands[1]) & 0xff00) == 0)
304 {
305 /* ??? This might not be necessary. */
306 if (INTVAL (operands[1]) & 0xffff0000)
307 operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff);
308
309 /* We may set the sign bit spuriously. */
310 cc_status.flags |= CC_NOT_NEGATIVE;
311 return AS2 (test%B0,%1,%b0);
312 }
313
314 if ((INTVAL (operands[1]) & 0xff) == 0)
315 {
316 operands[1] = GEN_INT ((INTVAL (operands[1]) >> 8) & 0xff);
317
318 if (QI_REG_P (operands[0]))
319 return AS2 (test%B0,%1,%h0);
320 else
321 {
322 operands[0] = adj_offsettable_operand (operands[0], 1);
323 return AS2 (test%B0,%1,%b0);
324 }
325 }
326 }
327
328 if (CONSTANT_P (operands[1]) || GET_CODE (operands[0]) == MEM)
329 return AS2 (test%W0,%1,%0);
330
331 return AS2 (test%W1,%0,%1);
332}
333}
334
335static char *
336output_34 (operands, insn)
337 rtx *operands;
338 rtx insn;
339{
340
341{
342 if (CONSTANT_P (operands[1]) || GET_CODE (operands[0]) == MEM)
343 return AS2 (test%B0,%1,%0);
344
345 return AS2 (test%B1,%0,%1);
346}
347}
348
349static char *
350output_38 (operands, insn)
351 rtx *operands;
352 rtx insn;
353{
354
355{
356 rtx link;
357 if (operands[1] == const0_rtx && REG_P (operands[0]))
358 return AS2 (xor%L0,%0,%0);
359
360 if (operands[1] == const1_rtx
361 && (link = find_reg_note (insn, REG_WAS_0, 0))
362 /* Make sure the insn that stored the 0 is still present. */
363 && ! INSN_DELETED_P (XEXP (link, 0))
364 && GET_CODE (XEXP (link, 0)) != NOTE
365 /* Make sure cross jumping didn't happen here. */
366 && no_labels_between_p (XEXP (link, 0), insn)
367 /* Make sure the reg hasn't been clobbered. */
368 && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
369 /* Fastest way to change a 0 to a 1. */
370 return AS1 (inc%L0,%0);
371
372 return AS2 (mov%L0,%1,%0);
373}
374}
375
376static char *
377output_40 (operands, insn)
378 rtx *operands;
379 rtx insn;
380{
381
382{
383 rtx link;
384 if (REG_P (operands[0]) && operands[1] == const0_rtx)
385 return AS2 (xor%L0,%k0,%k0);
386
387 if (REG_P (operands[0]) && operands[1] == const1_rtx
388 && (link = find_reg_note (insn, REG_WAS_0, 0))
389 /* Make sure the insn that stored the 0 is still present. */
390 && ! INSN_DELETED_P (XEXP (link, 0))
391 && GET_CODE (XEXP (link, 0)) != NOTE
392 /* Make sure cross jumping didn't happen here. */
393 && no_labels_between_p (XEXP (link, 0), insn)
394 /* Make sure the reg hasn't been clobbered. */
395 && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
396 /* Fastest way to change a 0 to a 1. */
397 return AS1 (inc%L0,%k0);
398
399 if (REG_P (operands[0]))
400 {
401 if (REG_P (operands[1]))
402 return AS2 (mov%L0,%k1,%k0);
403 else if (CONSTANT_P (operands[1]))
404 return AS2 (mov%L0,%1,%k0);
405 }
406
407 return AS2 (mov%W0,%1,%0);
408}
409}
410
411static char *
412output_41 (operands, insn)
413 rtx *operands;
414 rtx insn;
415{
416
417{
418 rtx link;
419 if (operands[1] == const0_rtx && REG_P (operands[0]))
420 return AS2 (xor%W0,%0,%0);
421
422 if (operands[1] == const1_rtx
423 && (link = find_reg_note (insn, REG_WAS_0, 0))
424 /* Make sure the insn that stored the 0 is still present. */
425 && ! INSN_DELETED_P (XEXP (link, 0))
426 && GET_CODE (XEXP (link, 0)) != NOTE
427 /* Make sure cross jumping didn't happen here. */
428 && no_labels_between_p (XEXP (link, 0), insn)
429 /* Make sure the reg hasn't been clobbered. */
430 && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
431 /* Fastest way to change a 0 to a 1. */
432 return AS1 (inc%W0,%0);
433
434 return AS2 (mov%W0,%1,%0);
435}
436}
437
438static char *
439output_42 (operands, insn)
440 rtx *operands;
441 rtx insn;
442{
443
444{
445 operands[1] = gen_rtx (REG, HImode, REGNO (operands[1]));
446 return AS1 (push%W0,%1);
447}
448}
449
450static char *
451output_43 (operands, insn)
452 rtx *operands;
453 rtx insn;
454{
455
456{
457 rtx link;
458 if (operands[1] == const0_rtx && REG_P (operands[0]))
459 return AS2 (xor%B0,%0,%0);
460
461 if (operands[1] == const1_rtx
462 && (link = find_reg_note (insn, REG_WAS_0, 0))
463 /* Make sure the insn that stored the 0 is still present. */
464 && ! INSN_DELETED_P (XEXP (link, 0))
465 && GET_CODE (XEXP (link, 0)) != NOTE
466 /* Make sure cross jumping didn't happen here. */
467 && no_labels_between_p (XEXP (link, 0), insn)
468 /* Make sure the reg hasn't been clobbered. */
469 && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
470 /* Fastest way to change a 0 to a 1. */
471 return AS1 (inc%B0,%0);
472
473 /* If mov%B0 isn't allowed for one of these regs, use mov%L0. */
474 if (NON_QI_REG_P (operands[0]) || NON_QI_REG_P (operands[1]))
475 return (AS2 (mov%L0,%k1,%k0));
476
477 return (AS2 (mov%B0,%1,%0));
478}
479}
480
481static char *
482output_44 (operands, insn)
483 rtx *operands;
484 rtx insn;
485{
486
487{
488 rtx link;
489 if (operands[1] == const0_rtx && REG_P (operands[0]))
490 return AS2 (xor%B0,%0,%0);
491
492 if (operands[1] == const1_rtx
493 && (link = find_reg_note (insn, REG_WAS_0, 0))
494 /* Make sure the insn that stored the 0 is still present. */
495 && ! INSN_DELETED_P (XEXP (link, 0))
496 && GET_CODE (XEXP (link, 0)) != NOTE
497 /* Make sure cross jumping didn't happen here. */
498 && no_labels_between_p (XEXP (link, 0), insn)
499 /* Make sure the reg hasn't been clobbered. */
500 && ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
501 /* Fastest way to change a 0 to a 1. */
502 return AS1 (inc%B0,%0);
503
504 /* If mov%B0 isn't allowed for one of these regs, use mov%W0. */
505 if (NON_QI_REG_P (operands[0]) || NON_QI_REG_P (operands[1]))
506 {
507 abort ();
508 return (AS2 (mov%L0,%k1,%k0));
509 }
510
511 return AS2 (mov%B0,%1,%0);
512}
513}
514
515static char *
516output_45 (operands, insn)
517 rtx *operands;
518 rtx insn;
519{
520
521{
522 if (STACK_REG_P (operands[1]))
523 {
524 rtx xops[3];
525
526 if (! STACK_TOP_P (operands[1]))
527 abort ();
528
529 xops[0] = AT_SP (SFmode);
530 xops[1] = GEN_INT (4);
531 xops[2] = stack_pointer_rtx;
532
533 output_asm_insn (AS2 (sub%L2,%1,%2), xops);
534
535 if (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
536 output_asm_insn (AS1 (fstp%S0,%0), xops);
537 else
538 output_asm_insn (AS1 (fst%S0,%0), xops);
539 RET;
540 }
541 return AS1 (push%L1,%1);
542}
543}
544
545static char *
546output_46 (operands, insn)
547 rtx *operands;
548 rtx insn;
549{
550
551{
552 int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
553
554 /* First handle a `pop' insn or a `fld %st(0)' */
555
556 if (STACK_TOP_P (operands[0]) && STACK_TOP_P (operands[1]))
557 {
558 if (stack_top_dies)
559 return AS1 (fstp,%y0);
560 else
561 return AS1 (fld,%y0);
562 }
563
564 /* Handle a transfer between the 387 and a 386 register */
565
566 if (STACK_TOP_P (operands[0]) && NON_STACK_REG_P (operands[1]))
567 {
568 output_op_from_reg (operands[1], AS1 (fld%z0,%y1));
569 RET;
570 }
571
572 if (STACK_TOP_P (operands[1]) && NON_STACK_REG_P (operands[0]))
573 {
574 output_to_reg (operands[0], stack_top_dies);
575 RET;
576 }
577
578 /* Handle other kinds of writes from the 387 */
579
580 if (STACK_TOP_P (operands[1]))
581 {
582 if (stack_top_dies)
583 return AS1 (fstp%z0,%y0);
584 else
585 return AS1 (fst%z0,%y0);
586 }
587
588 /* Handle other kinds of reads to the 387 */
589
590 if (STACK_TOP_P (operands[0]) && GET_CODE (operands[1]) == CONST_DOUBLE)
591 return (char *) output_move_const_single (operands);
592
593 if (STACK_TOP_P (operands[0]))
594 return AS1 (fld%z1,%y1);
595
596 /* Handle all SFmode moves not involving the 387 */
597
598 return (char *) singlemove_string (operands);
599}
600}
601
602static char *
603output_47 (operands, insn)
604 rtx *operands;
605 rtx insn;
606{
607
608{
609 if (STACK_REG_P (operands[1]))
610 {
611 rtx xops[3];
612
613 xops[0] = AT_SP (SFmode);
614 xops[1] = GEN_INT (8);
615 xops[2] = stack_pointer_rtx;
616
617 output_asm_insn (AS2 (sub%L2,%1,%2), xops);
618
619 if (find_regno_note (insn, REG_DEAD, FIRST_STACK_REG))
620 output_asm_insn (AS1 (fstp%Q0,%0), xops);
621 else
622 output_asm_insn (AS1 (fst%Q0,%0), xops);
623
624 RET;
625 }
626 else
627 return (char *) output_move_double (operands);
628}
629}
630
631static char *
632output_48 (operands, insn)
633 rtx *operands;
634 rtx insn;
635{
636
637{
638 if (STACK_TOP_P (operands[0]))
639 return AS1 (fxch,%1);
640 else
641 return AS1 (fxch,%0);
642}
643}
644
645static char *
646output_49 (operands, insn)
647 rtx *operands;
648 rtx insn;
649{
650
651{
652 int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
653
654 /* First handle a `pop' insn or a `fld %st(0)' */
655
656 if (STACK_TOP_P (operands[0]) && STACK_TOP_P (operands[1]))
657 {
658 if (stack_top_dies)
659 return AS1 (fstp,%y0);
660 else
661 return AS1 (fld,%y0);
662 }
663
664 /* Handle a transfer between the 387 and a 386 register */
665
666 if (STACK_TOP_P (operands[0]) && NON_STACK_REG_P (operands[1]))
667 {
668 output_op_from_reg (operands[1], AS1 (fld%z0,%y1));
669 RET;
670 }
671
672 if (STACK_TOP_P (operands[1]) && NON_STACK_REG_P (operands[0]))
673 {
674 output_to_reg (operands[0], stack_top_dies);
675 RET;
676 }
677
678 /* Handle other kinds of writes from the 387 */
679
680 if (STACK_TOP_P (operands[1]))
681 {
682 if (stack_top_dies)
683 return AS1 (fstp%z0,%y0);
684 else
685 return AS1 (fst%z0,%y0);
686 }
687
688 /* Handle other kinds of reads to the 387 */
689
690 if (STACK_TOP_P (operands[0]) && GET_CODE (operands[1]) == CONST_DOUBLE)
691 return (char *) output_move_const_single (operands);
692
693 if (STACK_TOP_P (operands[0]))
694 return AS1 (fld%z1,%y1);
695
696 /* Handle all DFmode moves not involving the 387 */
697
698 return (char *) output_move_double (operands);
699}
700}
701
702static char *
703output_50 (operands, insn)
704 rtx *operands;
705 rtx insn;
706{
707
708{
709 return (char *) output_move_double (operands);
710}
711}
712
713static char *
714output_51 (operands, insn)
715 rtx *operands;
716 rtx insn;
717{
718
719{
720 return (char *) output_move_double (operands);
721}
722}
723
724static char *
725output_52 (operands, insn)
726 rtx *operands;
727 rtx insn;
728{
729
730{
731 if ((TARGET_486 || REGNO (operands[0]) == 0)
732 && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
733 {
734 rtx xops[2];
735 xops[0] = operands[0];
736 xops[1] = GEN_INT (0xffff);
737 output_asm_insn (AS2 (and%L0,%1,%k0), xops);
738 RET;
739 }
740
741#ifdef INTEL_SYNTAX
742 return AS2 (movzx,%1,%0);
743#else
744 return AS2 (movz%W0%L0,%1,%0);
745#endif
746}
747}
748
749static char *
750output_53 (operands, insn)
751 rtx *operands;
752 rtx insn;
753{
754
755{
756 if ((TARGET_486 || REGNO (operands[0]) == 0)
757 && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
758 {
759 rtx xops[2];
760 xops[0] = operands[0];
761 xops[1] = GEN_INT (0xff);
762 output_asm_insn (AS2 (and%L0,%1,%k0), xops);
763 RET;
764 }
765
766#ifdef INTEL_SYNTAX
767 return AS2 (movzx,%1,%0);
768#else
769 return AS2 (movz%B0%W0,%1,%0);
770#endif
771}
772}
773
774static char *
775output_54 (operands, insn)
776 rtx *operands;
777 rtx insn;
778{
779
780{
781 if ((TARGET_486 || REGNO (operands[0]) == 0)
782 && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1]))
783 {
784 rtx xops[2];
785 xops[0] = operands[0];
786 xops[1] = GEN_INT (0xff);
787 output_asm_insn (AS2 (and%L0,%1,%k0), xops);
788 RET;
789 }
790
791#ifdef INTEL_SYNTAX
792 return AS2 (movzx,%1,%0);
793#else
794 return AS2 (movz%B0%L0,%1,%0);
795#endif
796}
797}
798
799static char *
800output_55 (operands, insn)
801 rtx *operands;
802 rtx insn;
803{
804
805{
806 operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
807 return AS2 (xor%L0,%0,%0);
808}
809}
810
811static char *
812output_56 (operands, insn)
813 rtx *operands;
814 rtx insn;
815{
816
817{
818 if (REGNO (operands[0]) == 0)
819 {
820 /* This used to be cwtl, but that extends HI to SI somehow. */
821#ifdef INTEL_SYNTAX
822 return "cdq";
823#else
824 return "cltd";
825#endif
826 }
827
828 operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
829 output_asm_insn (AS2 (mov%L0,%0,%1), operands);
830
831 operands[0] = GEN_INT (31);
832 return AS2 (sar%L1,%0,%1);
833}
834}
835
836static char *
837output_57 (operands, insn)
838 rtx *operands;
839 rtx insn;
840{
841
842{
843 if (REGNO (operands[0]) == 0
844 && REG_P (operands[1]) && REGNO (operands[1]) == 0)
845#ifdef INTEL_SYNTAX
846 return "cwde";
847#else
848 return "cwtl";
849#endif
850
851#ifdef INTEL_SYNTAX
852 return AS2 (movsx,%1,%0);
853#else
854 return AS2 (movs%W0%L0,%1,%0);
855#endif
856}
857}
858
859static char *
860output_58 (operands, insn)
861 rtx *operands;
862 rtx insn;
863{
864
865{
866 if (REGNO (operands[0]) == 0
867 && REG_P (operands[1]) && REGNO (operands[1]) == 0)
868 return "cbtw";
869
870#ifdef INTEL_SYNTAX
871 return AS2 (movsx,%1,%0);
872#else
873 return AS2 (movs%B0%W0,%1,%0);
874#endif
875}
876}
877
878static char *
879output_59 (operands, insn)
880 rtx *operands;
881 rtx insn;
882{
883
884{
885#ifdef INTEL_SYNTAX
886 return AS2 (movsx,%1,%0);
887#else
888 return AS2 (movs%B0%L0,%1,%0);
889#endif
890}
891}
892
893static char *
894output_60 (operands, insn)
895 rtx *operands;
896 rtx insn;
897{
898
899{
900 int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
901
902 if (NON_STACK_REG_P (operands[1]))
903 {
904 output_op_from_reg (operands[1], AS1 (fld%z0,%y1));
905 RET;
906 }
907
908 if (NON_STACK_REG_P (operands[0]))
909 {
910 output_to_reg (operands[0], stack_top_dies);
911 RET;
912 }
913
914 if (STACK_TOP_P (operands[0]))
915 return AS1 (fld%z1,%y1);
916
917 if (GET_CODE (operands[0]) == MEM)
918 {
919 if (stack_top_dies)
920 return AS1 (fstp%z0,%y0);
921 else
922 return AS1 (fst%z0,%y0);
923 }
924
925 abort ();
926}
927}
928
929static char *
930output_62 (operands, insn)
931 rtx *operands;
932 rtx insn;
933{
934
935{
936 int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0;
937
938 if (GET_CODE (operands[0]) == MEM)
939 {
940 if (stack_top_dies)
941 return AS1 (fstp%z0,%0);
942 else
943 return AS1 (fst%z0,%0);
944 }
945 else if (STACK_TOP_P (operands[0]))
946 {
947 output_asm_insn (AS1 (fstp%z2,%y2), operands);
948 return AS1 (fld%z2,%y2);
949 }
950 else
951 abort ();
952}
953}
954
955static char *
956output_67 (operands, insn)
957 rtx *operands;
958 rtx insn;
959{
960 return (char *) output_fix_trunc (insn, operands);
961}
962
963static char *
964output_68 (operands, insn)
965 rtx *operands;
966 rtx insn;
967{
968 return (char *) output_fix_trunc (insn, operands);
969}
970
971static char *
972output_71 (operands, insn)
973 rtx *operands;
974 rtx insn;
975{
976 return (char *) output_fix_trunc (insn, operands);
977}
978
979static char *
980output_72 (operands, insn)
981 rtx *operands;
982 rtx insn;
983{
984 return (char *) output_fix_trunc (insn, operands);
985}
986
987static char *
988output_77 (operands, insn)
989 rtx *operands;
990 rtx insn;
991{
992
993{
994 if (NON_STACK_REG_P (operands[1]))
995 {
996 output_op_from_reg (operands[1], AS1 (fild%z0,%1));
997 RET;
998 }
999 else if (GET_CODE (operands[1]) == MEM)
1000 return AS1 (fild%z1,%1);
1001 else
1002 abort ();
1003}
1004}
1005
1006static char *
1007output_78 (operands, insn)
1008 rtx *operands;
1009 rtx insn;
1010{
1011
1012{
1013 if (NON_STACK_REG_P (operands[1]))
1014 {
1015 output_op_from_reg (operands[1], AS1 (fild%z0,%1));
1016 RET;
1017 }
1018 else if (GET_CODE (operands[1]) == MEM)
1019 return AS1 (fild%z1,%1);
1020 else
1021 abort ();
1022}
1023}
1024
1025static char *
1026output_79 (operands, insn)
1027 rtx *operands;
1028 rtx insn;
1029{
1030
1031{
1032 if (NON_STACK_REG_P (operands[1]))
1033 {
1034 output_op_from_reg (operands[1], AS1 (fild%z0,%1));
1035 RET;
1036 }
1037 else if (GET_CODE (operands[1]) == MEM)
1038 return AS1 (fild%z1,%1);
1039 else
1040 abort ();
1041}
1042}
1043
1044static char *
1045output_80 (operands, insn)
1046 rtx *operands;
1047 rtx insn;
1048{
1049
1050{
1051 if (NON_STACK_REG_P (operands[1]))
1052 {
1053 output_op_from_reg (operands[1], AS1 (fild%z0,%1));
1054 RET;
1055 }
1056 else if (GET_CODE (operands[1]) == MEM)
1057 return AS1 (fild%z1,%1);
1058 else
1059 abort ();
1060}
1061}
1062
1063static char *
1064output_81 (operands, insn)
1065 rtx *operands;
1066 rtx insn;
1067{
1068
1069{
1070 rtx low[3], high[3];
1071
1072 CC_STATUS_INIT;
1073
1074 split_di (operands, 3, low, high);
1075
1076 if (GET_CODE (low[2]) != CONST_INT || INTVAL (low[2]) != 0)
1077 {
1078 output_asm_insn (AS2 (add%L0,%2,%0), low);
1079 output_asm_insn (AS2 (adc%L0,%2,%0), high);
1080 }
1081 else
1082 output_asm_insn (AS2 (add%L0,%2,%0), high);
1083 RET;
1084}
1085}
1086
1087static char *
1088output_82 (operands, insn)
1089 rtx *operands;
1090 rtx insn;
1091{
1092
1093{
1094 if (REG_P (operands[0]) && REGNO (operands[0]) != REGNO (operands[1]))
1095 {
1096 if (REG_P (operands[2]) && REGNO (operands[0]) == REGNO (operands[2]))
1097 return AS2 (add%L0,%1,%0);
1098
1099 if (! TARGET_486 || ! REG_P (operands[2]))
1100 {
1101 CC_STATUS_INIT;
1102
1103 if (operands[2] == stack_pointer_rtx)
1104 {
1105 rtx temp;
1106
1107 temp = operands[1];
1108 operands[1] = operands[2];
1109 operands[2] = temp;
1110 }
1111 if (operands[2] != stack_pointer_rtx)
1112 {
1113 operands[1] = SET_SRC (PATTERN (insn));
1114 return AS2 (lea%L0,%a1,%0);
1115 }
1116 }
1117
1118 output_asm_insn (AS2 (mov%L0,%1,%0), operands);
1119 }
1120
1121 if (operands[2] == const1_rtx)
1122 return AS1 (inc%L0,%0);
1123
1124 if (operands[2] == constm1_rtx)
1125 return AS1 (dec%L0,%0);
1126
1127 return AS2 (add%L0,%2,%0);
1128}
1129}
1130
1131static char *
1132output_83 (operands, insn)
1133 rtx *operands;
1134 rtx insn;
1135{
1136
1137{
1138 if (operands[2] == const1_rtx)
1139 return AS1 (inc%W0,%0);
1140
1141 if (operands[2] == constm1_rtx)
1142 return AS1 (dec%W0,%0);
1143
1144 return AS2 (add%W0,%2,%0);
1145}
1146}
1147
1148static char *
1149output_84 (operands, insn)
1150 rtx *operands;
1151 rtx insn;
1152{
1153
1154{
1155 if (operands[2] == const1_rtx)
1156 return AS1 (inc%B0,%0);
1157
1158 if (operands[2] == constm1_rtx)
1159 return AS1 (dec%B0,%0);
1160
1161 return AS2 (add%B0,%2,%0);
1162}
1163}
1164
1165static char *
1166output_85 (operands, insn)
1167 rtx *operands;
1168 rtx insn;
1169{
1170
1171{
1172 CC_STATUS_INIT;
1173 /* Adding a constant to a register is faster with an add. */
1174 /* ??? can this ever happen? */
1175 if (GET_CODE (operands[1]) == PLUS
1176 && GET_CODE (XEXP (operands[1], 1)) == CONST_INT
1177 && rtx_equal_p (operands[0], XEXP (operands[1], 0)))
1178 {
1179 operands[1] = XEXP (operands[1], 1);
1180
1181 if (operands[1] == const1_rtx)
1182 return AS1 (inc%L0,%0);
1183
1184 if (operands[1] == constm1_rtx)
1185 return AS1 (dec%L0,%0);
1186
1187 return AS2 (add%L0,%1,%0);
1188 }
1189 return AS2 (lea%L0,%a1,%0);
1190}
1191}
1192
1193static char *
1194output_88 (operands, insn)
1195 rtx *operands;
1196 rtx insn;
1197{
1198
1199{
1200 rtx low[3], high[3];
1201
1202 CC_STATUS_INIT;
1203
1204 split_di (operands, 3, low, high);
1205
1206 if (GET_CODE (low[2]) != CONST_INT || INTVAL (low[2]) != 0)
1207 {
1208 output_asm_insn (AS2 (sub%L0,%2,%0), low);
1209 output_asm_insn (AS2 (sbb%L0,%2,%0), high);
1210 }
1211 else
1212 output_asm_insn (AS2 (sub%L0,%2,%0), high);
1213
1214 RET;
1215}
1216}
1217
1218static char *
1219output_89 (operands, insn)
1220 rtx *operands;
1221 rtx insn;
1222{
1223 return AS2 (sub%L0,%2,%0);
1224}
1225
1226static char *
1227output_90 (operands, insn)
1228 rtx *operands;
1229 rtx insn;
1230{
1231 return AS2 (sub%W0,%2,%0);
1232}
1233
1234static char *
1235output_91 (operands, insn)
1236 rtx *operands;
1237 rtx insn;
1238{
1239 return AS2 (sub%B0,%2,%0);
1240}
1241
1242static char *
1243output_94 (operands, insn)
1244 rtx *operands;
1245 rtx insn;
1246{
1247 return AS2 (imul%W0,%2,%0);
1248}
1249
1250static char *
1251output_95 (operands, insn)
1252 rtx *operands;
1253 rtx insn;
1254{
1255
1256{
1257 if (GET_CODE (operands[1]) == REG
1258 && REGNO (operands[1]) == REGNO (operands[0])
1259 && (GET_CODE (operands[2]) == MEM || GET_CODE (operands[2]) == REG))
1260 /* Assembler has weird restrictions. */
1261 return AS2 (imul%W0,%2,%0);
1262 return AS3 (imul%W0,%2,%1,%0);
1263}
1264}
1265
1266static char *
1267output_96 (operands, insn)
1268 rtx *operands;
1269 rtx insn;
1270{
1271 return AS2 (imul%L0,%2,%0);
1272}
1273
1274static char *
1275output_97 (operands, insn)
1276 rtx *operands;
1277 rtx insn;
1278{
1279
1280{
1281 if (GET_CODE (operands[1]) == REG
1282 && REGNO (operands[1]) == REGNO (operands[0])
1283 && (GET_CODE (operands[2]) == MEM || GET_CODE (operands[2]) == REG))
1284 /* Assembler has weird restrictions. */
1285 return AS2 (imul%L0,%2,%0);
1286 return AS3 (imul%L0,%2,%1,%0);
1287}
1288}
1289
1290static char *
1291output_105 (operands, insn)
1292 rtx *operands;
1293 rtx insn;
1294{
1295
1296{
1297#ifdef INTEL_SYNTAX
1298 output_asm_insn ("cdq", operands);
1299#else
1300 output_asm_insn ("cltd", operands);
1301#endif
1302 return AS1 (idiv%L0,%2);
1303}
1304}
1305
1306static char *
1307output_107 (operands, insn)
1308 rtx *operands;
1309 rtx insn;
1310{
1311
1312{
1313 output_asm_insn (AS2 (xor%L3,%3,%3), operands);
1314 return AS1 (div%L0,%2);
1315}
1316}
1317
1318static char *
1319output_108 (operands, insn)
1320 rtx *operands;
1321 rtx insn;
1322{
1323
1324{
1325 output_asm_insn (AS2 (xor%W0,%3,%3), operands);
1326 return AS1 (div%W0,%2);
1327}
1328}
1329
1330static char *
1331output_109 (operands, insn)
1332 rtx *operands;
1333 rtx insn;
1334{
1335
1336{
1337 if (GET_CODE (operands[2]) == CONST_INT
1338 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1339 {
1340 if (INTVAL (operands[2]) == 0xffff && REG_P (operands[0])
1341 && (! REG_P (operands[1])
1342 || REGNO (operands[0]) != 0 || REGNO (operands[1]) != 0)
1343 && (! TARGET_486 || ! rtx_equal_p (operands[0], operands[1])))
1344 {
1345 /* ??? tege: Should forget CC_STATUS only if we clobber a
1346 remembered operand. Fix that later. */
1347 CC_STATUS_INIT;
1348#ifdef INTEL_SYNTAX
1349 return AS2 (movzx,%w1,%0);
1350#else
1351 return AS2 (movz%W0%L0,%w1,%0);
1352#endif
1353 }
1354
1355 if (INTVAL (operands[2]) == 0xff && REG_P (operands[0])
1356 && !(REG_P (operands[1]) && NON_QI_REG_P (operands[1]))
1357 && (! REG_P (operands[1])
1358 || REGNO (operands[0]) != 0 || REGNO (operands[1]) != 0)
1359 && (! TARGET_486 || ! rtx_equal_p (operands[0], operands[1])))
1360 {
1361 /* ??? tege: Should forget CC_STATUS only if we clobber a
1362 remembered operand. Fix that later. */
1363 CC_STATUS_INIT;
1364#ifdef INTEL_SYNTAX
1365 return AS2 (movzx,%b1,%0);
1366#else
1367 return AS2 (movz%B0%L0,%b1,%0);
1368#endif
1369 }
1370
1371 if (QI_REG_P (operands[0]) && ~(INTVAL (operands[2]) | 0xff) == 0)
1372 {
1373 CC_STATUS_INIT;
1374
1375 if (INTVAL (operands[2]) == 0xffffff00)
1376 {
1377 operands[2] = const0_rtx;
1378 return AS2 (mov%B0,%2,%b0);
1379 }
1380
1381 operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
1382 return AS2 (and%B0,%2,%b0);
1383 }
1384
1385 if (QI_REG_P (operands[0]) && ~(INTVAL (operands[2]) | 0xff00) == 0)
1386 {
1387 CC_STATUS_INIT;
1388
1389 if (INTVAL (operands[2]) == 0xffff00ff)
1390 {
1391 operands[2] = const0_rtx;
1392 return AS2 (mov%B0,%2,%h0);
1393 }
1394
1395 operands[2] = GEN_INT ((INTVAL (operands[2]) >> 8) & 0xff);
1396 return AS2 (and%B0,%2,%h0);
1397 }
1398
1399 if (GET_CODE (operands[0]) == MEM && INTVAL (operands[2]) == 0xffff0000)
1400 {
1401 operands[2] = const0_rtx;
1402 return AS2 (mov%W0,%2,%w0);
1403 }
1404 }
1405
1406 return AS2 (and%L0,%2,%0);
1407}
1408}
1409
1410static char *
1411output_110 (operands, insn)
1412 rtx *operands;
1413 rtx insn;
1414{
1415
1416{
1417 if (GET_CODE (operands[2]) == CONST_INT
1418 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1419 {
1420 /* Can we ignore the upper byte? */
1421 if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
1422 && (INTVAL (operands[2]) & 0xff00) == 0xff00)
1423 {
1424 CC_STATUS_INIT;
1425
1426 if ((INTVAL (operands[2]) & 0xff) == 0)
1427 {
1428 operands[2] = const0_rtx;
1429 return AS2 (mov%B0,%2,%b0);
1430 }
1431
1432 operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff);
1433 return AS2 (and%B0,%2,%b0);
1434 }
1435
1436 /* Can we ignore the lower byte? */
1437 /* ??? what about offsettable memory references? */
1438 if (QI_REG_P (operands[0]) && (INTVAL (operands[2]) & 0xff) == 0xff)
1439 {
1440 CC_STATUS_INIT;
1441
1442 if ((INTVAL (operands[2]) & 0xff00) == 0)
1443 {
1444 operands[2] = const0_rtx;
1445 return AS2 (mov%B0,%2,%h0);
1446 }
1447
1448 operands[2] = GEN_INT ((INTVAL (operands[2]) >> 8) & 0xff);
1449 return AS2 (and%B0,%2,%h0);
1450 }
1451 }
1452
1453 return AS2 (and%W0,%2,%0);
1454}
1455}
1456
1457static char *
1458output_111 (operands, insn)
1459 rtx *operands;
1460 rtx insn;
1461{
1462 return AS2 (and%B0,%2,%0);
1463}
1464
1465static char *
1466output_112 (operands, insn)
1467 rtx *operands;
1468 rtx insn;
1469{
1470
1471{
1472 if (GET_CODE (operands[2]) == CONST_INT
1473 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1474 {
1475 if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
1476 && (INTVAL (operands[2]) & ~0xff) == 0)
1477 {
1478 CC_STATUS_INIT;
1479
1480 if (INTVAL (operands[2]) == 0xff)
1481 return AS2 (mov%B0,%2,%b0);
1482
1483 return AS2 (or%B0,%2,%b0);
1484 }
1485
1486 if (QI_REG_P (operands[0]) && (INTVAL (operands[2]) & ~0xff00) == 0)
1487 {
1488 CC_STATUS_INIT;
1489 operands[2] = GEN_INT (INTVAL (operands[2]) >> 8);
1490
1491 if (INTVAL (operands[2]) == 0xff)
1492 return AS2 (mov%B0,%2,%h0);
1493
1494 return AS2 (or%B0,%2,%h0);
1495 }
1496 }
1497
1498 return AS2 (or%L0,%2,%0);
1499}
1500}
1501
1502static char *
1503output_113 (operands, insn)
1504 rtx *operands;
1505 rtx insn;
1506{
1507
1508{
1509 if (GET_CODE (operands[2]) == CONST_INT
1510 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1511 {
1512 /* Can we ignore the upper byte? */
1513 if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
1514 && (INTVAL (operands[2]) & 0xff00) == 0)
1515 {
1516 CC_STATUS_INIT;
1517 if (INTVAL (operands[2]) & 0xffff0000)
1518 operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
1519
1520 if (INTVAL (operands[2]) == 0xff)
1521 return AS2 (mov%B0,%2,%b0);
1522
1523 return AS2 (or%B0,%2,%b0);
1524 }
1525
1526 /* Can we ignore the lower byte? */
1527 /* ??? what about offsettable memory references? */
1528 if (QI_REG_P (operands[0])
1529 && (INTVAL (operands[2]) & 0xff) == 0)
1530 {
1531 CC_STATUS_INIT;
1532 operands[2] = GEN_INT ((INTVAL (operands[2]) >> 8) & 0xff);
1533
1534 if (INTVAL (operands[2]) == 0xff)
1535 return AS2 (mov%B0,%2,%h0);
1536
1537 return AS2 (or%B0,%2,%h0);
1538 }
1539 }
1540
1541 return AS2 (or%W0,%2,%0);
1542}
1543}
1544
1545static char *
1546output_114 (operands, insn)
1547 rtx *operands;
1548 rtx insn;
1549{
1550 return AS2 (or%B0,%2,%0);
1551}
1552
1553static char *
1554output_115 (operands, insn)
1555 rtx *operands;
1556 rtx insn;
1557{
1558
1559{
1560 if (GET_CODE (operands[2]) == CONST_INT
1561 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1562 {
1563 if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
1564 && (INTVAL (operands[2]) & ~0xff) == 0)
1565 {
1566 CC_STATUS_INIT;
1567
1568 if (INTVAL (operands[2]) == 0xff)
1569 return AS1 (not%B0,%b0);
1570
1571 return AS2 (xor%B0,%2,%b0);
1572 }
1573
1574 if (QI_REG_P (operands[0]) && (INTVAL (operands[2]) & ~0xff00) == 0)
1575 {
1576 CC_STATUS_INIT;
1577 operands[2] = GEN_INT (INTVAL (operands[2]) >> 8);
1578
1579 if (INTVAL (operands[2]) == 0xff)
1580 return AS1 (not%B0,%h0);
1581
1582 return AS2 (xor%B0,%2,%h0);
1583 }
1584 }
1585
1586 return AS2 (xor%L0,%2,%0);
1587}
1588}
1589
1590static char *
1591output_116 (operands, insn)
1592 rtx *operands;
1593 rtx insn;
1594{
1595
1596{
1597 if (GET_CODE (operands[2]) == CONST_INT
1598 && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))
1599 {
1600 /* Can we ignore the upper byte? */
1601 if ((! REG_P (operands[0]) || QI_REG_P (operands[0]))
1602 && (INTVAL (operands[2]) & 0xff00) == 0)
1603 {
1604 CC_STATUS_INIT;
1605 if (INTVAL (operands[2]) & 0xffff0000)
1606 operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
1607
1608 if (INTVAL (operands[2]) == 0xff)
1609 return AS1 (not%B0,%b0);
1610
1611 return AS2 (xor%B0,%2,%b0);
1612 }
1613
1614 /* Can we ignore the lower byte? */
1615 /* ??? what about offsettable memory references? */
1616 if (QI_REG_P (operands[0])
1617 && (INTVAL (operands[2]) & 0xff) == 0)
1618 {
1619 CC_STATUS_INIT;
1620 operands[2] = GEN_INT ((INTVAL (operands[2]) >> 8) & 0xff);
1621
1622 if (INTVAL (operands[2]) == 0xff)
1623 return AS1 (not%B0,%h0);
1624
1625 return AS2 (xor%B0,%2,%h0);
1626 }
1627 }
1628
1629 return AS2 (xor%W0,%2,%0);
1630}
1631}
1632
1633static char *
1634output_117 (operands, insn)
1635 rtx *operands;
1636 rtx insn;
1637{
1638 return AS2 (xor%B0,%2,%0);
1639}
1640
1641static char *
1642output_118 (operands, insn)
1643 rtx *operands;
1644 rtx insn;
1645{
1646
1647{
1648 rtx xops[2], low[1], high[1];
1649
1650 CC_STATUS_INIT;
1651
1652 split_di (operands, 1, low, high);
1653 xops[0] = const0_rtx;
1654 xops[1] = high[0];
1655
1656 output_asm_insn (AS1 (neg%L0,%0), low);
1657 output_asm_insn (AS2 (adc%L1,%0,%1), xops);
1658 output_asm_insn (AS1 (neg%L0,%0), high);
1659 RET;
1660}
1661}
1662
1663static char *
1664output_141 (operands, insn)
1665 rtx *operands;
1666 rtx insn;
1667{
1668
1669{
1670 rtx xops[4], low[1], high[1];
1671
1672 CC_STATUS_INIT;
1673
1674 split_di (operands, 1, low, high);
1675 xops[0] = operands[2];
1676 xops[1] = const1_rtx;
1677 xops[2] = low[0];
1678 xops[3] = high[0];
1679
1680 if (INTVAL (xops[0]) > 31)
1681 {
1682 output_asm_insn (AS2 (mov%L3,%2,%3), xops); /* Fast shift by 32 */
1683 output_asm_insn (AS2 (xor%L2,%2,%2), xops);
1684
1685 if (INTVAL (xops[0]) > 32)
1686 {
1687 xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
1688 output_asm_insn (AS2 (sal%L3,%0,%3), xops); /* Remaining shift */
1689 }
1690 }
1691 else
1692 {
1693 output_asm_insn (AS3 (shld%L3,%0,%2,%3), xops);
1694 output_asm_insn (AS2 (sal%L2,%0,%2), xops);
1695 }
1696 RET;
1697}
1698}
1699
1700static char *
1701output_142 (operands, insn)
1702 rtx *operands;
1703 rtx insn;
1704{
1705
1706{
1707 rtx xops[4], low[1], high[1];
1708
1709 CC_STATUS_INIT;
1710
1711 split_di (operands, 1, low, high);
1712 xops[0] = operands[2];
1713 xops[1] = const1_rtx;
1714 xops[2] = low[0];
1715 xops[3] = high[0];
1716
1717 output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */
1718
1719 output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops);
1720 output_asm_insn (AS2 (sal%L2,%0,%2), xops);
1721 output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops);
1722 output_asm_insn (AS2 (sal%L2,%0,%2), xops);
1723
1724 xops[1] = GEN_INT (7); /* shift count & 1 */
1725
1726 output_asm_insn (AS2 (shr%B0,%1,%0), xops);
1727
1728 output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops);
1729 output_asm_insn (AS2 (sal%L2,%0,%2), xops);
1730
1731 RET;
1732}
1733}
1734
1735static char *
1736output_143 (operands, insn)
1737 rtx *operands;
1738 rtx insn;
1739{
1740
1741{
1742 if (REG_P (operands[0]) && REGNO (operands[0]) != REGNO (operands[1]))
1743 {
1744 if (TARGET_486 && INTVAL (operands[2]) == 1)
1745 {
1746 output_asm_insn (AS2 (mov%L0,%1,%0), operands);
1747 return AS2 (add%L0,%1,%0);
1748 }
1749 else
1750 {
1751 CC_STATUS_INIT;
1752
1753 if (operands[1] == stack_pointer_rtx)
1754 {
1755 output_asm_insn (AS2 (mov%L0,%1,%0), operands);
1756 operands[1] = operands[0];
1757 }
1758 operands[1] = gen_rtx (MULT, SImode, operands[1],
1759 GEN_INT (1 << INTVAL (operands[2])));
1760 return AS2 (lea%L0,%a1,%0);
1761 }
1762 }
1763
1764 if (REG_P (operands[2]))
1765 return AS2 (sal%L0,%b2,%0);
1766
1767 if (REG_P (operands[0]) && operands[2] == const1_rtx)
1768 return AS2 (add%L0,%0,%0);
1769
1770 return AS2 (sal%L0,%2,%0);
1771}
1772}
1773
1774static char *
1775output_144 (operands, insn)
1776 rtx *operands;
1777 rtx insn;
1778{
1779
1780{
1781 if (REG_P (operands[2]))
1782 return AS2 (sal%W0,%b2,%0);
1783
1784 if (REG_P (operands[0]) && operands[2] == const1_rtx)
1785 return AS2 (add%W0,%0,%0);
1786
1787 return AS2 (sal%W0,%2,%0);
1788}
1789}
1790
1791static char *
1792output_145 (operands, insn)
1793 rtx *operands;
1794 rtx insn;
1795{
1796
1797{
1798 if (REG_P (operands[2]))
1799 return AS2 (sal%B0,%b2,%0);
1800
1801 if (REG_P (operands[0]) && operands[2] == const1_rtx)
1802 return AS2 (add%B0,%0,%0);
1803
1804 return AS2 (sal%B0,%2,%0);
1805}
1806}
1807
1808static char *
1809output_147 (operands, insn)
1810 rtx *operands;
1811 rtx insn;
1812{
1813
1814{
1815 rtx xops[4], low[1], high[1];
1816
1817 CC_STATUS_INIT;
1818
1819 split_di (operands, 1, low, high);
1820 xops[0] = operands[2];
1821 xops[1] = const1_rtx;
1822 xops[2] = low[0];
1823 xops[3] = high[0];
1824
1825 if (INTVAL (xops[0]) > 31)
1826 {
1827 xops[1] = GEN_INT (31);
1828 output_asm_insn (AS2 (mov%L2,%3,%2), xops);
1829 output_asm_insn (AS2 (sar%L3,%1,%3), xops); /* shift by 32 */
1830
1831 if (INTVAL (xops[0]) > 32)
1832 {
1833 xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
1834 output_asm_insn (AS2 (sar%L2,%0,%2), xops); /* Remaining shift */
1835 }
1836 }
1837 else
1838 {
1839 output_asm_insn (AS3 (shrd%L2,%0,%3,%2), xops);
1840 output_asm_insn (AS2 (sar%L3,%0,%3), xops);
1841 }
1842
1843 RET;
1844}
1845}
1846
1847static char *
1848output_148 (operands, insn)
1849 rtx *operands;
1850 rtx insn;
1851{
1852
1853{
1854 rtx xops[4], low[1], high[1];
1855
1856 CC_STATUS_INIT;
1857
1858 split_di (operands, 1, low, high);
1859 xops[0] = operands[2];
1860 xops[1] = const1_rtx;
1861 xops[2] = low[0];
1862 xops[3] = high[0];
1863
1864 output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */
1865
1866 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1867 output_asm_insn (AS2 (sar%L3,%0,%3), xops);
1868 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1869 output_asm_insn (AS2 (sar%L3,%0,%3), xops);
1870
1871 xops[1] = GEN_INT (7); /* shift count & 1 */
1872
1873 output_asm_insn (AS2 (shr%B0,%1,%0), xops);
1874
1875 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1876 output_asm_insn (AS2 (sar%L3,%0,%3), xops);
1877
1878 RET;
1879}
1880}
1881
1882static char *
1883output_149 (operands, insn)
1884 rtx *operands;
1885 rtx insn;
1886{
1887
1888{
1889 if (REG_P (operands[2]))
1890 return AS2 (sar%L0,%b2,%0);
1891 else
1892 return AS2 (sar%L0,%2,%0);
1893}
1894}
1895
1896static char *
1897output_150 (operands, insn)
1898 rtx *operands;
1899 rtx insn;
1900{
1901
1902{
1903 if (REG_P (operands[2]))
1904 return AS2 (sar%W0,%b2,%0);
1905 else
1906 return AS2 (sar%W0,%2,%0);
1907}
1908}
1909
1910static char *
1911output_151 (operands, insn)
1912 rtx *operands;
1913 rtx insn;
1914{
1915
1916{
1917 if (REG_P (operands[2]))
1918 return AS2 (sar%B0,%b2,%0);
1919 else
1920 return AS2 (sar%B0,%2,%0);
1921}
1922}
1923
1924static char *
1925output_153 (operands, insn)
1926 rtx *operands;
1927 rtx insn;
1928{
1929
1930{
1931 rtx xops[4], low[1], high[1];
1932
1933 CC_STATUS_INIT;
1934
1935 split_di (operands, 1, low, high);
1936 xops[0] = operands[2];
1937 xops[1] = const1_rtx;
1938 xops[2] = low[0];
1939 xops[3] = high[0];
1940
1941 if (INTVAL (xops[0]) > 31)
1942 {
1943 output_asm_insn (AS2 (mov%L2,%3,%2), xops); /* Fast shift by 32 */
1944 output_asm_insn (AS2 (xor%L3,%3,%3), xops);
1945
1946 if (INTVAL (xops[0]) > 32)
1947 {
1948 xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
1949 output_asm_insn (AS2 (shr%L2,%0,%2), xops); /* Remaining shift */
1950 }
1951 }
1952 else
1953 {
1954 output_asm_insn (AS3 (shrd%L2,%0,%3,%2), xops);
1955 output_asm_insn (AS2 (shr%L3,%0,%3), xops);
1956 }
1957
1958 RET;
1959}
1960}
1961
1962static char *
1963output_154 (operands, insn)
1964 rtx *operands;
1965 rtx insn;
1966{
1967
1968{
1969 rtx xops[4], low[1], high[1];
1970
1971 CC_STATUS_INIT;
1972
1973 split_di (operands, 1, low, high);
1974 xops[0] = operands[2];
1975 xops[1] = const1_rtx;
1976 xops[2] = low[0];
1977 xops[3] = high[0];
1978
1979 output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */
1980
1981 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1982 output_asm_insn (AS2 (shr%L3,%0,%3), xops);
1983 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1984 output_asm_insn (AS2 (shr%L3,%0,%3), xops);
1985
1986 xops[1] = GEN_INT (7); /* shift count & 1 */
1987
1988 output_asm_insn (AS2 (shr%B0,%1,%0), xops);
1989
1990 output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops);
1991 output_asm_insn (AS2 (shr%L3,%0,%3), xops);
1992
1993 RET;
1994}
1995}
1996
1997static char *
1998output_155 (operands, insn)
1999 rtx *operands;
2000 rtx insn;
2001{
2002
2003{
2004 if (REG_P (operands[2]))
2005 return AS2 (shr%L0,%b2,%0);
2006 else
2007 return AS2 (shr%L0,%2,%1);
2008}
2009}
2010
2011static char *
2012output_156 (operands, insn)
2013 rtx *operands;
2014 rtx insn;
2015{
2016
2017{
2018 if (REG_P (operands[2]))
2019 return AS2 (shr%W0,%b2,%0);
2020 else
2021 return AS2 (shr%W0,%2,%0);
2022}
2023}
2024
2025static char *
2026output_157 (operands, insn)
2027 rtx *operands;
2028 rtx insn;
2029{
2030
2031{
2032 if (REG_P (operands[2]))
2033 return AS2 (shr%B0,%b2,%0);
2034 else
2035 return AS2 (shr%B0,%2,%0);
2036}
2037}
2038
2039static char *
2040output_158 (operands, insn)
2041 rtx *operands;
2042 rtx insn;
2043{
2044
2045{
2046 if (REG_P (operands[2]))
2047 return AS2 (rol%L0,%b2,%0);
2048 else
2049 return AS2 (rol%L0,%2,%0);
2050}
2051}
2052
2053static char *
2054output_159 (operands, insn)
2055 rtx *operands;
2056 rtx insn;
2057{
2058
2059{
2060 if (REG_P (operands[2]))
2061 return AS2 (rol%W0,%b2,%0);
2062 else
2063 return AS2 (rol%W0,%2,%0);
2064}
2065}
2066
2067static char *
2068output_160 (operands, insn)
2069 rtx *operands;
2070 rtx insn;
2071{
2072
2073{
2074 if (REG_P (operands[2]))
2075 return AS2 (rol%B0,%b2,%0);
2076 else
2077 return AS2 (rol%B0,%2,%0);
2078}
2079}
2080
2081static char *
2082output_161 (operands, insn)
2083 rtx *operands;
2084 rtx insn;
2085{
2086
2087{
2088 if (REG_P (operands[2]))
2089 return AS2 (ror%L0,%b2,%0);
2090 else
2091 return AS2 (ror%L0,%2,%0);
2092}
2093}
2094
2095static char *
2096output_162 (operands, insn)
2097 rtx *operands;
2098 rtx insn;
2099{
2100
2101{
2102 if (REG_P (operands[2]))
2103 return AS2 (ror%W0,%b2,%0);
2104 else
2105 return AS2 (ror%W0,%2,%0);
2106}
2107}
2108
2109static char *
2110output_163 (operands, insn)
2111 rtx *operands;
2112 rtx insn;
2113{
2114
2115{
2116 if (REG_P (operands[2]))
2117 return AS2 (ror%B0,%b2,%0);
2118 else
2119 return AS2 (ror%B0,%2,%0);
2120}
2121}
2122
2123static char *
2124output_164 (operands, insn)
2125 rtx *operands;
2126 rtx insn;
2127{
2128
2129{
2130 CC_STATUS_INIT;
2131
2132 if (INTVAL (operands[3]) == 1)
2133 return AS2 (bts%L0,%2,%0);
2134 else
2135 return AS2 (btr%L0,%2,%0);
2136}
2137}
2138
2139static char *
2140output_165 (operands, insn)
2141 rtx *operands;
2142 rtx insn;
2143{
2144
2145{
2146 CC_STATUS_INIT;
2147
2148 return AS2 (btc%L0,%1,%0);
2149}
2150}
2151
2152static char *
2153output_166 (operands, insn)
2154 rtx *operands;
2155 rtx insn;
2156{
2157
2158{
2159 CC_STATUS_INIT;
2160
2161 return AS2 (btc%L0,%2,%0);
2162}
2163}
2164
2165static char *
2166output_167 (operands, insn)
2167 rtx *operands;
2168 rtx insn;
2169{
2170
2171{
2172 cc_status.flags |= CC_Z_IN_NOT_C;
2173 return AS2 (bt%L0,%1,%0);
2174}
2175}
2176
2177static char *
2178output_168 (operands, insn)
2179 rtx *operands;
2180 rtx insn;
2181{
2182
2183{
2184 unsigned int mask;
2185
2186 mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]);
2187 operands[1] = GEN_INT (mask);
2188
2189 if (QI_REG_P (operands[0]))
2190 {
2191 if ((mask & ~0xff) == 0)
2192 {
2193 cc_status.flags |= CC_NOT_NEGATIVE;
2194 return AS2 (test%B0,%1,%b0);
2195 }
2196
2197 if ((mask & ~0xff00) == 0)
2198 {
2199 cc_status.flags |= CC_NOT_NEGATIVE;
2200 operands[1] = GEN_INT (mask >> 8);
2201 return AS2 (test%B0,%1,%h0);
2202 }
2203 }
2204
2205 return AS2 (test%L0,%1,%0);
2206}
2207}
2208
2209static char *
2210output_169 (operands, insn)
2211 rtx *operands;
2212 rtx insn;
2213{
2214
2215{
2216 unsigned int mask;
2217
2218 mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]);
2219 operands[1] = GEN_INT (mask);
2220
2221 if (! REG_P (operands[0]) || QI_REG_P (operands[0]))
2222 {
2223 if ((mask & ~0xff) == 0)
2224 {
2225 cc_status.flags |= CC_NOT_NEGATIVE;
2226 return AS2 (test%B0,%1,%b0);
2227 }
2228
2229 if ((mask & ~0xff00) == 0)
2230 {
2231 cc_status.flags |= CC_NOT_NEGATIVE;
2232 operands[1] = GEN_INT (mask >> 8);
2233
2234 if (QI_REG_P (operands[0]))
2235 return AS2 (test%B0,%1,%h0);
2236 else
2237 {
2238 operands[0] = adj_offsettable_operand (operands[0], 1);
2239 return AS2 (test%B0,%1,%b0);
2240 }
2241 }
2242
2243 if (GET_CODE (operands[0]) == MEM && (mask & ~0xff0000) == 0)
2244 {
2245 cc_status.flags |= CC_NOT_NEGATIVE;
2246 operands[1] = GEN_INT (mask >> 16);
2247 operands[0] = adj_offsettable_operand (operands[0], 2);
2248 return AS2 (test%B0,%1,%b0);
2249 }
2250
2251 if (GET_CODE (operands[0]) == MEM && (mask & ~0xff000000) == 0)
2252 {
2253 cc_status.flags |= CC_NOT_NEGATIVE;
2254 operands[1] = GEN_INT (mask >> 24);
2255 operands[0] = adj_offsettable_operand (operands[0], 3);
2256 return AS2 (test%B0,%1,%b0);
2257 }
2258 }
2259
2260 if (CONSTANT_P (operands[1]) || GET_CODE (operands[0]) == MEM)
2261 return AS2 (test%L0,%1,%0);
2262
2263 return AS2 (test%L1,%0,%1);
2264}
2265}
2266
2267static char *
2268output_171 (operands, insn)
2269 rtx *operands;
2270 rtx insn;
2271{
2272
2273{
2274 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2275 return AS1 (setnb,%0);
2276 else
2277 return AS1 (sete,%0);
2278}
2279}
2280
2281static char *
2282output_173 (operands, insn)
2283 rtx *operands;
2284 rtx insn;
2285{
2286
2287{
2288 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2289 return AS1 (setb,%0);
2290 else
2291 return AS1 (setne,%0);
2292}
2293
2294}
2295
2296static char *
2297output_175 (operands, insn)
2298 rtx *operands;
2299 rtx insn;
2300{
2301
2302{
2303 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2304 return AS1 (sete,%0);
2305
2306 OUTPUT_JUMP ("setg %0", "seta %0", NULL_PTR);
2307}
2308}
2309
2310static char *
2311output_177 (operands, insn)
2312 rtx *operands;
2313 rtx insn;
2314{
2315 return "seta %0";
2316}
2317
2318static char *
2319output_179 (operands, insn)
2320 rtx *operands;
2321 rtx insn;
2322{
2323
2324{
2325 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2326 return AS1 (sete,%0);
2327
2328 OUTPUT_JUMP ("setl %0", "setb %0", "sets %0");
2329}
2330}
2331
2332static char *
2333output_181 (operands, insn)
2334 rtx *operands;
2335 rtx insn;
2336{
2337 return "setb %0";
2338}
2339
2340static char *
2341output_183 (operands, insn)
2342 rtx *operands;
2343 rtx insn;
2344{
2345
2346{
2347 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2348 return AS1 (sete,%0);
2349
2350 OUTPUT_JUMP ("setge %0", "setae %0", "setns %0");
2351}
2352}
2353
2354static char *
2355output_185 (operands, insn)
2356 rtx *operands;
2357 rtx insn;
2358{
2359 return "setae %0";
2360}
2361
2362static char *
2363output_187 (operands, insn)
2364 rtx *operands;
2365 rtx insn;
2366{
2367
2368{
2369 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2370 return AS1 (setb,%0);
2371
2372 OUTPUT_JUMP ("setle %0", "setbe %0", NULL_PTR);
2373}
2374}
2375
2376static char *
2377output_189 (operands, insn)
2378 rtx *operands;
2379 rtx insn;
2380{
2381 return "setbe %0";
2382}
2383
2384static char *
2385output_191 (operands, insn)
2386 rtx *operands;
2387 rtx insn;
2388{
2389
2390{
2391 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2392 return "jnc %l0";
2393 else
2394 return "je %l0";
2395}
2396}
2397
2398static char *
2399output_193 (operands, insn)
2400 rtx *operands;
2401 rtx insn;
2402{
2403
2404{
2405 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2406 return "jc %l0";
2407 else
2408 return "jne %l0";
2409}
2410}
2411
2412static char *
2413output_195 (operands, insn)
2414 rtx *operands;
2415 rtx insn;
2416{
2417
2418{
2419 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2420 return AS1 (je,%l0);
2421
2422 OUTPUT_JUMP ("jg %l0", "ja %l0", NULL_PTR);
2423}
2424}
2425
2426static char *
2427output_199 (operands, insn)
2428 rtx *operands;
2429 rtx insn;
2430{
2431
2432{
2433 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2434 return AS1 (je,%l0);
2435
2436 OUTPUT_JUMP ("jl %l0", "jb %l0", "js %l0");
2437}
2438}
2439
2440static char *
2441output_203 (operands, insn)
2442 rtx *operands;
2443 rtx insn;
2444{
2445
2446{
2447 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2448 return AS1 (je,%l0);
2449
2450 OUTPUT_JUMP ("jge %l0", "jae %l0", "jns %l0");
2451}
2452}
2453
2454static char *
2455output_207 (operands, insn)
2456 rtx *operands;
2457 rtx insn;
2458{
2459
2460{
2461 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2462 return AS1 (jb,%l0);
2463
2464 OUTPUT_JUMP ("jle %l0", "jbe %l0", NULL_PTR);
2465}
2466}
2467
2468static char *
2469output_210 (operands, insn)
2470 rtx *operands;
2471 rtx insn;
2472{
2473
2474{
2475 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2476 return "jc %l0";
2477 else
2478 return "jne %l0";
2479}
2480}
2481
2482static char *
2483output_211 (operands, insn)
2484 rtx *operands;
2485 rtx insn;
2486{
2487
2488{
2489 if (cc_prev_status.flags & CC_Z_IN_NOT_C)
2490 return "jnc %l0";
2491 else
2492 return "je %l0";
2493}
2494}
2495
2496static char *
2497output_212 (operands, insn)
2498 rtx *operands;
2499 rtx insn;
2500{
2501
2502{
2503 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2504 return AS1 (jne,%l0);
2505
2506 OUTPUT_JUMP ("jle %l0", "jbe %l0", NULL_PTR);
2507}
2508}
2509
2510static char *
2511output_214 (operands, insn)
2512 rtx *operands;
2513 rtx insn;
2514{
2515
2516{
2517 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2518 return AS1 (jne,%l0);
2519
2520 OUTPUT_JUMP ("jge %l0", "jae %l0", "jns %l0");
2521}
2522}
2523
2524static char *
2525output_216 (operands, insn)
2526 rtx *operands;
2527 rtx insn;
2528{
2529
2530{
2531 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2532 return AS1 (jne,%l0);
2533
2534 OUTPUT_JUMP ("jl %l0", "jb %l0", "js %l0");
2535}
2536}
2537
2538static char *
2539output_218 (operands, insn)
2540 rtx *operands;
2541 rtx insn;
2542{
2543
2544{
2545 if (TARGET_IEEE_FP && (cc_prev_status.flags & CC_IN_80387))
2546 return AS1 (jae,%l0);
2547
2548 OUTPUT_JUMP ("jg %l0", "ja %l0", NULL_PTR);
2549}
2550}
2551
2552static char *
2553output_221 (operands, insn)
2554 rtx *operands;
2555 rtx insn;
2556{
2557
2558{
2559 CC_STATUS_INIT;
2560
2561 return AS1 (jmp,%*%0);
2562}
2563}
2564
2565static char *
2566output_223 (operands, insn)
2567 rtx *operands;
2568 rtx insn;
2569{
2570
2571{
2572 rtx xops[4];
2573
2574 xops[0] = operands[0];
2575 xops[1] = operands[1];
2576 xops[2] = operands[2];
2577 xops[3] = pic_offset_table_rtx;
2578
2579 output_asm_insn (AS2 (mov%L2,%3,%2), xops);
2580 output_asm_insn ("sub%L2 %l1@GOTOFF(%3,%0,4),%2", xops);
2581 output_asm_insn (AS1 (jmp,%*%2), xops);
2582 ASM_OUTPUT_ALIGN_CODE (asm_out_file);
2583 RET;
2584}
2585}
2586
2587static char *
2588output_224 (operands, insn)
2589 rtx *operands;
2590 rtx insn;
2591{
2592
2593{
2594 CC_STATUS_INIT;
2595
2596 return AS1 (jmp,%*%0);
2597}
2598}
2599
2600static char *
2601output_226 (operands, insn)
2602 rtx *operands;
2603 rtx insn;
2604{
2605
2606{
2607 if (GET_CODE (operands[0]) == MEM
2608 && ! CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
2609 {
2610 operands[0] = XEXP (operands[0], 0);
2611 return AS1 (call,%*%0);
2612 }
2613 else
2614 return AS1 (call,%P0);
2615}
2616}
2617
2618static char *
2619output_229 (operands, insn)
2620 rtx *operands;
2621 rtx insn;
2622{
2623
2624{
2625 if (GET_CODE (operands[0]) == MEM
2626 && ! CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
2627 {
2628 operands[0] = XEXP (operands[0], 0);
2629 return AS1 (call,%*%0);
2630 }
2631 else
2632 return AS1 (call,%P0);
2633}
2634}
2635
2636static char *
2637output_232 (operands, insn)
2638 rtx *operands;
2639 rtx insn;
2640{
2641
2642{
2643 if (GET_CODE (operands[1]) == MEM
2644 && ! CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))
2645 {
2646 operands[1] = XEXP (operands[1], 0);
2647 output_asm_insn (AS1 (call,%*%1), operands);
2648 }
2649 else
2650 output_asm_insn (AS1 (call,%P1), operands);
2651
2652 RET;
2653}
2654}
2655
2656static char *
2657output_235 (operands, insn)
2658 rtx *operands;
2659 rtx insn;
2660{
2661
2662{
2663 if (GET_CODE (operands[1]) == MEM
2664 && ! CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))
2665 {
2666 operands[1] = XEXP (operands[1], 0);
2667 output_asm_insn (AS1 (call,%*%1), operands);
2668 }
2669 else
2670 output_asm_insn (AS1 (call,%P1), operands);
2671
2672 RET;
2673}
2674}
2675
2676static char *
2677output_238 (operands, insn)
2678 rtx *operands;
2679 rtx insn;
2680{
2681
2682{
2683 rtx addr = operands[1];
2684
2685 if (GET_CODE (operands[0]) == MEM
2686 && ! CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
2687 {
2688 operands[0] = XEXP (operands[0], 0);
2689 output_asm_insn (AS1 (call,%*%0), operands);
2690 }
2691 else
2692 output_asm_insn (AS1 (call,%P0), operands);
2693
2694 operands[2] = gen_rtx (REG, SImode, 0);
2695 output_asm_insn (AS2 (mov%L2,%2,%1), operands);
2696
2697 operands[2] = gen_rtx (REG, SImode, 1);
2698 operands[1] = adj_offsettable_operand (addr, 4);
2699 output_asm_insn (AS2 (mov%L2,%2,%1), operands);
2700
2701 operands[1] = adj_offsettable_operand (addr, 8);
2702 return AS1 (fnsave,%1);
2703}
2704}
2705
2706static char *
2707output_239 (operands, insn)
2708 rtx *operands;
2709 rtx insn;
2710{
2711
2712{
2713 rtx addr = operands[1];
2714
2715 output_asm_insn (AS1 (call,%P0), operands);
2716
2717 operands[2] = gen_rtx (REG, SImode, 0);
2718 output_asm_insn (AS2 (mov%L2,%2,%1), operands);
2719
2720 operands[2] = gen_rtx (REG, SImode, 1);
2721 operands[1] = adj_offsettable_operand (addr, 4);
2722 output_asm_insn (AS2 (mov%L2,%2,%1), operands);
2723
2724 operands[1] = adj_offsettable_operand (addr, 8);
2725 return AS1 (fnsave,%1);
2726}
2727}
2728
2729static char *
2730output_242 (operands, insn)
2731 rtx *operands;
2732 rtx insn;
2733{
2734
2735{
2736 function_epilogue (asm_out_file, get_frame_size ());
2737 RET;
2738}
2739}
2740
2741static char *
2742output_245 (operands, insn)
2743 rtx *operands;
2744 rtx insn;
2745{
2746
2747{
2748 rtx xops[2];
2749
2750 output_asm_insn ("cld", operands);
2751 if (GET_CODE (operands[2]) == CONST_INT)
2752 {
2753 if (INTVAL (operands[2]) & ~0x03)
2754 {
2755 xops[0] = GEN_INT ((INTVAL (operands[2]) >> 2) & 0x3fffffff);
2756 xops[1] = operands[4];
2757
2758 output_asm_insn (AS2 (mov%L1,%0,%1), xops);
2759#ifdef INTEL_SYNTAX
2760 output_asm_insn ("rep movsd", xops);
2761#else
2762 output_asm_insn ("rep\n\tmovsl", xops);
2763#endif
2764 }
2765 if (INTVAL (operands[2]) & 0x02)
2766 output_asm_insn ("movsw", operands);
2767 if (INTVAL (operands[2]) & 0x01)
2768 output_asm_insn ("movsb", operands);
2769 }
2770 else
2771 abort ();
2772 RET;
2773}
2774}
2775
2776static char *
2777output_247 (operands, insn)
2778 rtx *operands;
2779 rtx insn;
2780{
2781
2782{
2783 rtx xops[4], label;
2784
2785 label = gen_label_rtx ();
2786
2787 output_asm_insn ("cld", operands);
2788 output_asm_insn (AS2 (xor%L0,%0,%0), operands);
2789 output_asm_insn ("repz\n\tcmps%B2", operands);
2790 output_asm_insn ("je %l0", &label);
2791
2792 xops[0] = operands[0];
2793 xops[1] = gen_rtx (MEM, QImode,
2794 gen_rtx (PLUS, SImode, operands[1], constm1_rtx));
2795 xops[2] = gen_rtx (MEM, QImode,
2796 gen_rtx (PLUS, SImode, operands[2], constm1_rtx));
2797 xops[3] = operands[3];
2798
2799 output_asm_insn (AS2 (movz%B1%L0,%1,%0), xops);
2800 output_asm_insn (AS2 (movz%B2%L3,%2,%3), xops);
2801
2802 output_asm_insn (AS2 (sub%L0,%3,%0), xops);
2803 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (label));
2804 RET;
2805}
2806}
2807
2808static char *
2809output_248 (operands, insn)
2810 rtx *operands;
2811 rtx insn;
2812{
2813
2814{
2815 rtx xops[2];
2816
2817 cc_status.flags |= CC_NOT_SIGNED;
2818
2819 xops[0] = gen_rtx (REG, QImode, 0);
2820 xops[1] = CONST0_RTX (QImode);
2821
2822 output_asm_insn ("cld", operands);
2823 output_asm_insn (AS2 (test%B0,%1,%0), xops);
2824 return "repz\n\tcmps%B2";
2825}
2826}
2827
2828static char *
2829output_250 (operands, insn)
2830 rtx *operands;
2831 rtx insn;
2832{
2833
2834{
2835 rtx xops[2];
2836
83e20160
PR		 2837 xops[0] = const1_rtx;
2838 xops[1] = operands[1];
2839 output_asm_insn (AS2 (bsf%L1,%1,%0), operands);
2840 output_asm_insn (AS2 (cmp%L1,%0,%1), xops);
2841 output_asm_insn (AS2 (sbb%L0,%2,%2), operands);
2842 output_asm_insn (AS2 (or%L0,%2,%0), operands);
2843 return "";
9bf86ebb
PR		 2844}
2845}
2846
2847static char *
2848output_252 (operands, insn)
2849 rtx *operands;
2850 rtx insn;
2851{
2852
2853{
2854 rtx xops[2];
2855
83e20160
PR		 2856 xops[0] = const1_rtx;
2857 xops[1] = operands[1];
2858 output_asm_insn (AS2 (bsf%W1,%1,%0), operands);
2859 output_asm_insn (AS2 (cmp%W1,%0,%1), xops);
2860 output_asm_insn (AS2 (sbb%W0,%2,%2), operands);
2861 output_asm_insn (AS2 (or%W0,%2,%0), operands);
2862 return "";
9bf86ebb
PR		 2863}
2864}
2865
2866static char *
2867output_253 (operands, insn)
2868 rtx *operands;
2869 rtx insn;
2870{
2871 return (char *) output_387_binary_op (insn, operands);
2872}
2873
2874static char *
2875output_254 (operands, insn)
2876 rtx *operands;
2877 rtx insn;
2878{
2879 return (char *) output_387_binary_op (insn, operands);
2880}
2881
2882static char *
2883output_255 (operands, insn)
2884 rtx *operands;
2885 rtx insn;
2886{
2887 return (char *) output_387_binary_op (insn, operands);
2888}
2889
2890static char *
2891output_256 (operands, insn)
2892 rtx *operands;
2893 rtx insn;
2894{
2895 return (char *) output_387_binary_op (insn, operands);
2896}
2897
2898static char *
2899output_257 (operands, insn)
2900 rtx *operands;
2901 rtx insn;
2902{
2903 return (char *) output_387_binary_op (insn, operands);
2904}
2905
2906static char *
2907output_258 (operands, insn)
2908 rtx *operands;
2909 rtx insn;
2910{
2911 return (char *) output_387_binary_op (insn, operands);
2912}
2913
2914static char *
2915output_259 (operands, insn)
2916 rtx *operands;
2917 rtx insn;
2918{
2919 return (char *) output_387_binary_op (insn, operands);
2920}
2921
2922static char *
2923output_260 (operands, insn)
2924 rtx *operands;
2925 rtx insn;
2926{
2927 return (char *) output_387_binary_op (insn, operands);
2928}
2929
2930static char *
2931output_262 (operands, insn)
2932 rtx *operands;
2933 rtx insn;
2934{
2935
2936{
2937 rtx xops[2];
2938
2939 xops[0] = operands[0];
2940 xops[1] = constm1_rtx;
2941 output_asm_insn ("cld", operands);
2942 output_asm_insn (AS2 (mov%L0,%1,%0), xops);
2943 return "repnz\n\tscas%B2";
2944}
2945}
2946
2947char * const insn_template[] =
2948 {
2949 0,
2950 0,
2951 0,
2952 0,
2953 0,
2954 0,
2955 0,
2956 0,
2957 0,
2958 0,
2959 0,
2960 0,
2961 0,
2962 0,
2963 0,
2964 0,
2965 0,
2966 0,
2967 0,
2968 0,
2969 0,
2970 0,
2971 0,
2972 0,
2973 0,
2974 0,
2975 0,
2976 0,
2977 0,
2978 0,
2979 0,
2980 0,
2981 0,
2982 0,
2983 0,
2984 "push%L0 %1",
2985 "push%L0 %1",
2986 0,
2987 0,
2988 "push%W0 %1",
2989 0,
2990 0,
2991 0,
2992 0,
2993 0,
2994 0,
2995 0,
2996 0,
2997 0,
2998 0,
2999 0,
3000 0,
3001 0,
3002 0,
3003 0,
3004 0,
3005 0,
3006 0,
3007 0,
3008 0,
3009 0,
3010 0,
3011 0,
3012 0,
3013 0,
3014 0,
3015 0,
3016 0,
3017 0,
3018 0,
3019 0,
3020 0,
3021 0,
3022 0,
3023 0,
3024 0,
3025 0,
3026 0,
3027 0,
3028 0,
3029 0,
3030 0,
3031 0,
3032 0,
3033 0,
3034 0,
3035 0,
3036 0,
3037 0,
3038 0,
3039 0,
3040 0,
3041 0,
3042 0,
3043 0,
3044 0,
3045 0,
3046 0,
3047 "mul%B0 %2",
3048 0,
3049 0,
3050 "idiv%B0 %2",
3051 "div%B0 %2",
3052 0,
3053 0,
3054 0,
3055 "cwtd\n\tidiv%W0 %2",
3056 0,
3057 0,
3058 0,
3059 0,
3060 0,
3061 0,
3062 0,
3063 0,
3064 0,
3065 0,
3066 0,
3067 0,
3068 "neg%L0 %0",
3069 "neg%W0 %0",
3070 "neg%B0 %0",
3071 "fchs",
3072 "fchs",
3073 "fchs",
3074 "fabs",
3075 "fabs",
3076 "fabs",
3077 "fsqrt",
3078 "fsqrt",
3079 "fsqrt",
3080 "fsin",
3081 "fsin",
3082 "fsin",
3083 "fcos",
3084 "fcos",
3085 "fcos",
3086 "not%L0 %0",
3087 "not%W0 %0",
3088 "not%B0 %0",
3089 0,
3090 0,
3091 0,
3092 0,
3093 0,
3094 0,
3095 0,
3096 0,
3097 0,
3098 0,
3099 0,
3100 0,
3101 0,
3102 0,
3103 0,
3104 0,
3105 0,
3106 0,
3107 0,
3108 0,
3109 0,
3110 0,
3111 0,
3112 0,
3113 0,
3114 0,
3115 0,
3116 0,
3117 0,
3118 0,
3119 0,
3120 0,
3121 0,
3122 0,
3123 0,
3124 0,
3125 0,
3126 0,
3127 0,
3128 0,
3129 0,
3130 0,
3131 0,
3132 0,
3133 0,
3134 0,
3135 0,
3136 0,
3137 0,
3138 0,
3139 0,
3140 0,
3141 0,
3142 0,
3143 0,
3144 0,
3145 0,
3146 "ja %l0",
3147 0,
3148 0,
3149 0,
3150 "jb %l0",
3151 0,
3152 0,
3153 0,
3154 "jae %l0",
3155 0,
3156 0,
3157 0,
3158 "jbe %l0",
3159 0,
3160 0,
3161 0,
3162 "jbe %l0",
3163 0,
3164 "jae %l0",
3165 0,
3166 "jb %l0",
3167 0,
3168 "ja %l0",
3169 "jmp %l0",
3170 0,
3171 0,
3172 0,
3173 0,
3174 0,
3175 0,
3176 "call %P0",
3177 0,
3178 0,
3179 "call %P0",
3180 0,
3181 0,
3182 "call %P1",
3183 0,
3184 0,
3185 "call %P1",
3186 0,
3187 0,
3188 0,
3189 0,
3190 "frstor %0",
3191 0,
3192 "nop",
3193 0,
3194 0,
3195 0,
3196 0,
3197 0,
3198 0,
3199 0,
3200 0,
3201 0,
3202 0,
3203 0,
3204 0,
3205 0,
3206 0,
3207 0,
3208 0,
3209 0,
3210 0,
3211 0,
3212 };
3213
3214char *(*const insn_outfun[])() =
3215 {
3216 output_0,
3217 0,
3218 output_2,
3219 0,
3220 output_4,
3221 0,
3222 output_6,
3223 0,
3224 output_8,
3225 0,
3226 output_10,
3227 0,
3228 output_12,
3229 0,
3230 output_14,
3231 0,
3232 output_16,
3233 output_17,
3234 output_18,
3235 output_19,
3236 output_20,
3237 output_21,
3238 output_22,
3239 output_23,
3240 output_24,
3241 output_25,
3242 0,
3243 0,
3244 0,
3245 0,
3246 0,
3247 0,
3248 output_32,
3249 output_33,
3250 output_34,
3251 0,
3252 0,
3253 0,
3254 output_38,
3255 0,
3256 output_40,
3257 output_41,
3258 output_42,
3259 output_43,
3260 output_44,
3261 output_45,
3262 output_46,
3263 output_47,
3264 output_48,
3265 output_49,
3266 output_50,
3267 output_51,
3268 output_52,
3269 output_53,
3270 output_54,
3271 output_55,
3272 output_56,
3273 output_57,
3274 output_58,
3275 output_59,
3276 output_60,
3277 0,
3278 output_62,
3279 0,
3280 0,
3281 0,
3282 0,
3283 output_67,
3284 output_68,
3285 0,
3286 0,
3287 output_71,
3288 output_72,
3289 0,
3290 0,
3291 0,
3292 0,
3293 output_77,
3294 output_78,
3295 output_79,
3296 output_80,
3297 output_81,
3298 output_82,
3299 output_83,
3300 output_84,
3301 output_85,
3302 0,
3303 0,
3304 output_88,
3305 output_89,
3306 output_90,
3307 output_91,
3308 0,
3309 0,
3310 output_94,
3311 output_95,
3312 output_96,
3313 output_97,
3314 0,
3315 0,
3316 0,
3317 0,
3318 0,
3319 0,
3320 0,
3321 output_105,
3322 0,
3323 output_107,
3324 output_108,
3325 output_109,
3326 output_110,
3327 output_111,
3328 output_112,
3329 output_113,
3330 output_114,
3331 output_115,
3332 output_116,
3333 output_117,
3334 output_118,
3335 0,
3336 0,
3337 0,
3338 0,
3339 0,
3340 0,
3341 0,
3342 0,
3343 0,
3344 0,
3345 0,
3346 0,
3347 0,
3348 0,
3349 0,
3350 0,
3351 0,
3352 0,
3353 0,
3354 0,
3355 0,
3356 0,
3357 output_141,
3358 output_142,
3359 output_143,
3360 output_144,
3361 output_145,
3362 0,
3363 output_147,
3364 output_148,
3365 output_149,
3366 output_150,
3367 output_151,
3368 0,
3369 output_153,
3370 output_154,
3371 output_155,
3372 output_156,
3373 output_157,
3374 output_158,
3375 output_159,
3376 output_160,
3377 output_161,
3378 output_162,
3379 output_163,
3380 output_164,
3381 output_165,
3382 output_166,
3383 output_167,
3384 output_168,
3385 output_169,
3386 0,
3387 output_171,
3388 0,
3389 output_173,
3390 0,
3391 output_175,
3392 0,
3393 output_177,
3394 0,
3395 output_179,
3396 0,
3397 output_181,
3398 0,
3399 output_183,
3400 0,
3401 output_185,
3402 0,
3403 output_187,
3404 0,
3405 output_189,
3406 0,
3407 output_191,
3408 0,
3409 output_193,
3410 0,
3411 output_195,
3412 0,
3413 0,
3414 0,
3415 output_199,
3416 0,
3417 0,
3418 0,
3419 output_203,
3420 0,
3421 0,
3422 0,
3423 output_207,
3424 0,
3425 0,
3426 output_210,
3427 output_211,
3428 output_212,
3429 0,
3430 output_214,
3431 0,
3432 output_216,
3433 0,
3434 output_218,
3435 0,
3436 0,
3437 output_221,
3438 0,
3439 output_223,
3440 output_224,
3441 0,
3442 output_226,
3443 0,
3444 0,
3445 output_229,
3446 0,
3447 0,
3448 output_232,
3449 0,
3450 0,
3451 output_235,
3452 0,
3453 0,
3454 output_238,
3455 output_239,
3456 0,
3457 0,
3458 output_242,
3459 0,
3460 0,
3461 output_245,
3462 0,
3463 output_247,
3464 output_248,
3465 0,
3466 output_250,
3467 0,
3468 output_252,
3469 output_253,
3470 output_254,
3471 output_255,
3472 output_256,
3473 output_257,
3474 output_258,
3475 output_259,
3476 output_260,
3477 0,
3478 output_262,
3479 };
3480
3481rtx (*const insn_gen_function[]) () =
3482 {
3483 gen_tstsi_1,
3484 gen_tstsi,
3485 gen_tsthi_1,
3486 gen_tsthi,
3487 gen_tstqi_1,
3488 gen_tstqi,
3489 gen_tstsf_cc,
3490 gen_tstsf,
3491 gen_tstdf_cc,
3492 gen_tstdf,
3493 gen_cmpsi_1,
3494 gen_cmpsi,
3495 gen_cmphi_1,
3496 gen_cmphi,
3497 gen_cmpqi_1,
3498 gen_cmpqi,
3499 0,
3500 0,
3501 0,
3502 0,
3503 0,
3504 0,
3505 gen_cmpsf_cc_1,
3506 0,
3507 0,
3508 0,
3509 gen_cmpdf,
3510 gen_cmpsf,
3511 gen_cmpdf_cc,
3512 gen_cmpdf_ccfpeq,
3513 gen_cmpsf_cc,
3514 gen_cmpsf_ccfpeq,
3515 0,
3516 0,
3517 0,
3518 0,
3519 0,
3520 gen_movsi,
3521 0,
3522 0,
3523 gen_movhi,
3524 gen_movstricthi,
3525 0,
3526 gen_movqi,
3527 gen_movstrictqi,
3528 0,
3529 gen_movsf,
3530 0,
3531 gen_swapdf,
3532 gen_movdf,
3533 0,
3534 gen_movdi,
3535 gen_zero_extendhisi2,
3536 gen_zero_extendqihi2,
3537 gen_zero_extendqisi2,
3538 gen_zero_extendsidi2,
3539 gen_extendsidi2,
3540 gen_extendhisi2,
3541 gen_extendqihi2,
3542 gen_extendqisi2,
3543 gen_extendsfdf2,
3544 gen_truncdfsf2,
3545 0,
3546 gen_fixuns_truncdfsi2,
3547 gen_fixuns_truncsfsi2,
3548 gen_fix_truncdfdi2,
3549 gen_fix_truncsfdi2,
3550 0,
3551 0,
3552 gen_fix_truncdfsi2,
3553 gen_fix_truncsfsi2,
3554 0,
3555 0,
3556 gen_floatsisf2,
3557 gen_floatdisf2,
3558 gen_floatsidf2,
3559 gen_floatdidf2,
3560 0,
3561 0,
3562 0,
3563 0,
3564 gen_adddi3,
3565 gen_addsi3,
3566 gen_addhi3,
3567 gen_addqi3,
3568 0,
3569 gen_adddf3,
3570 gen_addsf3,
3571 gen_subdi3,
3572 gen_subsi3,
3573 gen_subhi3,
3574 gen_subqi3,
3575 gen_subdf3,
3576 gen_subsf3,
3577 0,
3578 gen_mulhi3,
3579 0,
3580 gen_mulsi3,
3581 0,
3582 gen_muldf3,
3583 gen_mulsf3,
3584 gen_divqi3,
3585 gen_udivqi3,
3586 gen_divdf3,
3587 gen_divsf3,
3588 gen_divmodsi4,
3589 gen_divmodhi4,
3590 gen_udivmodsi4,
3591 gen_udivmodhi4,
3592 gen_andsi3,
3593 gen_andhi3,
3594 gen_andqi3,
3595 gen_iorsi3,
3596 gen_iorhi3,
3597 gen_iorqi3,
3598 gen_xorsi3,
3599 gen_xorhi3,
3600 gen_xorqi3,
3601 gen_negdi2,
3602 gen_negsi2,
3603 gen_neghi2,
3604 gen_negqi2,
3605 gen_negsf2,
3606 gen_negdf2,
3607 0,
3608 gen_abssf2,
3609 gen_absdf2,
3610 0,
3611 gen_sqrtsf2,
3612 gen_sqrtdf2,
3613 0,
3614 gen_sindf2,
3615 gen_sinsf2,
3616 0,
3617 gen_cosdf2,
3618 gen_cossf2,
3619 0,
3620 gen_one_cmplsi2,
3621 gen_one_cmplhi2,
3622 gen_one_cmplqi2,
3623 gen_ashldi3,
3624 gen_ashldi3_const_int,
3625 gen_ashldi3_non_const_int,
3626 gen_ashlsi3,
3627 gen_ashlhi3,
3628 gen_ashlqi3,
3629 gen_ashrdi3,
3630 gen_ashrdi3_const_int,
3631 gen_ashrdi3_non_const_int,
3632 gen_ashrsi3,
3633 gen_ashrhi3,
3634 gen_ashrqi3,
3635 gen_lshrdi3,
3636 gen_lshrdi3_const_int,
3637 gen_lshrdi3_non_const_int,
3638 gen_lshrsi3,
3639 gen_lshrhi3,
3640 gen_lshrqi3,
3641 gen_rotlsi3,
3642 gen_rotlhi3,
3643 gen_rotlqi3,
3644 gen_rotrsi3,
3645 gen_rotrhi3,
3646 gen_rotrqi3,
3647 0,
3648 0,
3649 0,
3650 0,
3651 0,
3652 0,
3653 gen_seq,
3654 0,
3655 gen_sne,
3656 0,
3657 gen_sgt,
3658 0,
3659 gen_sgtu,
3660 0,
3661 gen_slt,
3662 0,
3663 gen_sltu,
3664 0,
3665 gen_sge,
3666 0,
3667 gen_sgeu,
3668 0,
3669 gen_sle,
3670 0,
3671 gen_sleu,
3672 0,
3673 gen_beq,
3674 0,
3675 gen_bne,
3676 0,
3677 gen_bgt,
3678 0,
3679 gen_bgtu,
3680 0,
3681 gen_blt,
3682 0,
3683 gen_bltu,
3684 0,
3685 gen_bge,
3686 0,
3687 gen_bgeu,
3688 0,
3689 gen_ble,
3690 0,
3691 gen_bleu,
3692 0,
3693 0,
3694 0,
3695 0,
3696 0,
3697 0,
3698 0,
3699 0,
3700 0,
3701 0,
3702 0,
3703 gen_jump,
3704 gen_indirect_jump,
3705 gen_casesi,
3706 0,
3707 gen_tablejump,
3708 gen_call_pop,
3709 0,
3710 0,
3711 gen_call,
3712 0,
3713 0,
3714 gen_call_value_pop,
3715 0,
3716 0,
3717 gen_call_value,
3718 0,
3719 0,
3720 gen_untyped_call,
3721 0,
3722 0,
3723 gen_untyped_return,
3724 gen_update_return,
3725 gen_return,
3726 gen_nop,
3727 gen_movstrsi,
3728 0,
3729 gen_cmpstrsi,
3730 0,
3731 0,
3732 gen_ffssi2,
3733 0,
3734 gen_ffshi2,
3735 0,
3736 0,
3737 0,
3738 0,
3739 0,
3740 0,
3741 0,
3742 0,
3743 0,
3744 gen_strlensi,
3745 0,
3746 };
3747
3748char *insn_name[] =
3749 {
3750 "tstsi_1",
3751 "tstsi",
3752 "tsthi_1",
3753 "tsthi",
3754 "tstqi_1",
3755 "tstqi",
3756 "tstsf_cc",
3757 "tstsf",
3758 "tstdf_cc",
3759 "tstdf",
3760 "cmpsi_1",
3761 "cmpsi",
3762 "cmphi_1",
3763 "cmphi",
3764 "cmpqi_1",
3765 "cmpqi",
3766 "cmpqi+1",
3767 "cmpqi+2",
3768 "cmpqi+3",
3769 "cmpsf_cc_1-3",
3770 "cmpsf_cc_1-2",
3771 "cmpsf_cc_1-1",
3772 "cmpsf_cc_1",
3773 "cmpsf_cc_1+1",
3774 "cmpsf_cc_1+2",
3775 "cmpdf-1",
3776 "cmpdf",
3777 "cmpsf",
3778 "cmpdf_cc",
3779 "cmpdf_ccfpeq",
3780 "cmpsf_cc",
3781 "cmpsf_ccfpeq",
3782 "cmpsf_ccfpeq+1",
3783 "cmpsf_ccfpeq+2",
3784 "cmpsf_ccfpeq+3",
3785 "movsi-2",
3786 "movsi-1",
3787 "movsi",
3788 "movsi+1",
3789 "movhi-1",
3790 "movhi",
3791 "movstricthi",
3792 "movstricthi+1",
3793 "movqi",
3794 "movstrictqi",
3795 "movstrictqi+1",
3796 "movsf",
3797 "movsf+1",
3798 "swapdf",
3799 "movdf",
3800 "movdf+1",
3801 "movdi",
3802 "zero_extendhisi2",
3803 "zero_extendqihi2",
3804 "zero_extendqisi2",
3805 "zero_extendsidi2",
3806 "extendsidi2",
3807 "extendhisi2",
3808 "extendqihi2",
3809 "extendqisi2",
3810 "extendsfdf2",
3811 "truncdfsf2",
3812 "truncdfsf2+1",
3813 "fixuns_truncdfsi2",
3814 "fixuns_truncsfsi2",
3815 "fix_truncdfdi2",
3816 "fix_truncsfdi2",
3817 "fix_truncsfdi2+1",
3818 "fix_truncdfsi2-1",
3819 "fix_truncdfsi2",
3820 "fix_truncsfsi2",
3821 "fix_truncsfsi2+1",
3822 "floatsisf2-1",
3823 "floatsisf2",
3824 "floatdisf2",
3825 "floatsidf2",
3826 "floatdidf2",
3827 "floatdidf2+1",
3828 "floatdidf2+2",
3829 "adddi3-2",
3830 "adddi3-1",
3831 "adddi3",
3832 "addsi3",
3833 "addhi3",
3834 "addqi3",
3835 "addqi3+1",
3836 "adddf3",
3837 "addsf3",
3838 "subdi3",
3839 "subsi3",
3840 "subhi3",
3841 "subqi3",
3842 "subdf3",
3843 "subsf3",
3844 "subsf3+1",
3845 "mulhi3",
3846 "mulhi3+1",
3847 "mulsi3",
3848 "mulsi3+1",
3849 "muldf3",
3850 "mulsf3",
3851 "divqi3",
3852 "udivqi3",
3853 "divdf3",
3854 "divsf3",
3855 "divmodsi4",
3856 "divmodhi4",
3857 "udivmodsi4",
3858 "udivmodhi4",
3859 "andsi3",
3860 "andhi3",
3861 "andqi3",
3862 "iorsi3",
3863 "iorhi3",
3864 "iorqi3",
3865 "xorsi3",
3866 "xorhi3",
3867 "xorqi3",
3868 "negdi2",
3869 "negsi2",
3870 "neghi2",
3871 "negqi2",
3872 "negsf2",
3873 "negdf2",
3874 "negdf2+1",
3875 "abssf2",
3876 "absdf2",
3877 "absdf2+1",
3878 "sqrtsf2",
3879 "sqrtdf2",
3880 "sqrtdf2+1",
3881 "sindf2",
3882 "sinsf2",
3883 "sinsf2+1",
3884 "cosdf2",
3885 "cossf2",
3886 "cossf2+1",
3887 "one_cmplsi2",
3888 "one_cmplhi2",
3889 "one_cmplqi2",
3890 "ashldi3",
3891 "ashldi3_const_int",
3892 "ashldi3_non_const_int",
3893 "ashlsi3",
3894 "ashlhi3",
3895 "ashlqi3",
3896 "ashrdi3",
3897 "ashrdi3_const_int",
3898 "ashrdi3_non_const_int",
3899 "ashrsi3",
3900 "ashrhi3",
3901 "ashrqi3",
3902 "lshrdi3",
3903 "lshrdi3_const_int",
3904 "lshrdi3_non_const_int",
3905 "lshrsi3",
3906 "lshrhi3",
3907 "lshrqi3",
3908 "rotlsi3",
3909 "rotlhi3",
3910 "rotlqi3",
3911 "rotrsi3",
3912 "rotrhi3",
3913 "rotrqi3",
3914 "rotrqi3+1",
3915 "rotrqi3+2",
3916 "rotrqi3+3",
3917 "seq-3",
3918 "seq-2",
3919 "seq-1",
3920 "seq",
3921 "seq+1",
3922 "sne",
3923 "sne+1",
3924 "sgt",
3925 "sgt+1",
3926 "sgtu",
3927 "sgtu+1",
3928 "slt",
3929 "slt+1",
3930 "sltu",
3931 "sltu+1",
3932 "sge",
3933 "sge+1",
3934 "sgeu",
3935 "sgeu+1",
3936 "sle",
3937 "sle+1",
3938 "sleu",
3939 "sleu+1",
3940 "beq",
3941 "beq+1",
3942 "bne",
3943 "bne+1",
3944 "bgt",
3945 "bgt+1",
3946 "bgtu",
3947 "bgtu+1",
3948 "blt",
3949 "blt+1",
3950 "bltu",
3951 "bltu+1",
3952 "bge",
3953 "bge+1",
3954 "bgeu",
3955 "bgeu+1",
3956 "ble",
3957 "ble+1",
3958 "bleu",
3959 "bleu+1",
3960 "bleu+2",
3961 "bleu+3",
3962 "bleu+4",
3963 "bleu+5",
3964 "bleu+6",
3965 "jump-5",
3966 "jump-4",
3967 "jump-3",
3968 "jump-2",
3969 "jump-1",
3970 "jump",
3971 "indirect_jump",
3972 "casesi",
3973 "casesi+1",
3974 "tablejump",
3975 "call_pop",
3976 "call_pop+1",
3977 "call-1",
3978 "call",
3979 "call+1",
3980 "call_value_pop-1",
3981 "call_value_pop",
3982 "call_value_pop+1",
3983 "call_value-1",
3984 "call_value",
3985 "call_value+1",
3986 "untyped_call-1",
3987 "untyped_call",
3988 "untyped_call+1",
3989 "untyped_return-1",
3990 "untyped_return",
3991 "update_return",
3992 "return",
3993 "nop",
3994 "movstrsi",
3995 "movstrsi+1",
3996 "cmpstrsi",
3997 "cmpstrsi+1",
3998 "ffssi2-1",
3999 "ffssi2",
4000 "ffssi2+1",
4001 "ffshi2",
4002 "ffshi2+1",
4003 "ffshi2+2",
4004 "ffshi2+3",
4005 "ffshi2+4",
4006 "ffshi2+5",
4007 "strlensi-4",
4008 "strlensi-3",
4009 "strlensi-2",
4010 "strlensi-1",
4011 "strlensi",
4012 "strlensi+1",
4013 };
4014char **insn_name_ptr = insn_name;
4015
4016const int insn_n_operands[] =
4017 {
4018 1,
4019 1,
4020 1,
4021 1,
4022 1,
4023 1,
4024 2,
4025 2,
4026 2,
4027 2,
4028 2,
4029 2,
4030 2,
4031 2,
4032 2,
4033 2,
4034 4,
4035 4,
4036 4,
4037 4,
4038 4,
4039 3,
4040 4,
4041 4,
4042 4,
4043 3,
4044 2,
4045 2,
4046 3,
4047 3,
4048 3,
4049 3,
4050 2,
4051 2,
4052 2,
4053 2,
4054 2,
4055 2,
4056 2,
4057 2,
4058 2,
4059 2,
4060 2,
4061 2,
4062 2,
4063 2,
4064 2,
4065 2,
4066 2,
4067 2,
4068 2,
4069 2,
4070 2,
4071 2,
4072 2,
4073 2,
4074 2,
4075 2,
4076 2,
4077 2,
4078 2,
4079 2,
4080 3,
4081 8,
4082 8,
4083 6,
4084 6,
4085 5,
4086 5,
4087 5,
4088 5,
4089 5,
4090 5,
4091 2,
4092 2,
4093 2,
4094 2,
4095 2,
4096 2,
4097 2,
4098 2,
4099 3,
4100 3,
4101 3,
4102 3,
4103 2,
4104 3,
4105 3,
4106 3,
4107 3,
4108 3,
4109 3,
4110 3,
4111 3,
4112 3,
4113 3,
4114 3,
4115 3,
4116 3,
4117 3,
4118 3,
4119 3,
4120 3,
4121 3,
4122 3,
4123 4,
4124 4,
4125 4,
4126 4,
4127 3,
4128 3,
4129 3,
4130 3,
4131 3,
4132 3,
4133 3,
4134 3,
4135 3,
4136 2,
4137 2,
4138 2,
4139 2,
4140 2,
4141 2,
4142 2,
4143 2,
4144 2,
4145 2,
4146 2,
4147 2,
4148 2,
4149 2,
4150 2,
4151 2,
4152 2,
4153 2,
4154 2,
4155 2,
4156 2,
4157 2,
4158 3,
4159 3,
4160 3,
4161 3,
4162 3,
4163 3,
4164 3,
4165 3,
4166 3,
4167 3,
4168 3,
4169 3,
4170 3,
4171 3,
4172 3,
4173 3,
4174 3,
4175 3,
4176 3,
4177 3,
4178 3,
4179 3,
4180 3,
4181 3,
4182 4,
4183 3,
4184 3,
4185 2,
4186 3,
4187 3,
4188 1,
4189 1,
4190 1,
4191 1,
4192 1,
4193 1,
4194 1,
4195 1,
4196 1,
4197 1,
4198 1,
4199 1,
4200 1,
4201 1,
4202 1,
4203 1,
4204 1,
4205 1,
4206 1,
4207 1,
4208 0,
4209 0,
4210 0,
4211 0,
4212 0,
4213 0,
4214 0,
4215 0,
4216 0,
4217 0,
4218 0,
4219 0,
4220 0,
4221 0,
4222 0,
4223 0,
4224 0,
4225 0,
4226 0,
4227 0,
4228 0,
4229 0,
4230 0,
4231 0,
4232 0,
4233 0,
4234 0,
4235 0,
4236 0,
4237 0,
4238 0,
4239 1,
4240 7,
4241 3,
4242 1,
4243 4,
4244 4,
4245 4,
4246 2,
4247 2,
4248 2,
4249 5,
4250 5,
4251 5,
4252 3,
4253 3,
4254 3,
4255 3,
4256 3,
4257 3,
4258 2,
4259 1,
4260 0,
4261 0,
4262 5,
4263 5,
4264 5,
4265 5,
4266 4,
83e20160
PR		 4267 3,
4268 3,
4269 3,
4270 3,
9bf86ebb
PR		 4271 4,
4272 4,
4273 4,
4274 4,
4275 4,
4276 4,
4277 4,
4278 4,
4279 4,
4280 4,
4281 };
4282
4283const int insn_n_dups[] =
4284 {
4285 0,
4286 0,
4287 0,
4288 0,
4289 0,
4290 0,
4291 0,
4292 0,
4293 0,
4294 0,
4295 0,
4296 0,
4297 0,
4298 0,
4299 0,
4300 0,
4301 0,
4302 0,
4303 0,
4304 0,
4305 0,
4306 0,
4307 0,
4308 0,
4309 0,
4310 0,
4311 0,
4312 0,
4313 0,
4314 0,
4315 0,
4316 0,
4317 0,
4318 0,
4319 0,
4320 0,
4321 0,
4322 0,
4323 0,
4324 0,
4325 0,
4326 0,
4327 0,
4328 0,
4329 0,
4330 0,
4331 0,
4332 0,
4333 2,
4334 0,
4335 0,
4336 0,
4337 0,
4338 0,
4339 0,
4340 0,
4341 0,
4342 0,
4343 0,
4344 0,
4345 0,
4346 1,
4347 0,
4348 7,
4349 7,
4350 5,
4351 5,
4352 1,
4353 1,
4354 2,
4355 2,
4356 0,
4357 0,
4358 0,
4359 0,
4360 0,
4361 0,
4362 0,
4363 0,
4364 0,
4365 0,
4366 0,
4367 0,
4368 0,
4369 0,
4370 0,
4371 0,
4372 0,
4373 0,
4374 0,
4375 0,
4376 0,
4377 0,
4378 0,
4379 0,
4380 0,
4381 0,
4382 0,
4383 0,
4384 0,
4385 0,
4386 0,
4387 0,
4388 0,
4389 0,
4390 2,
4391 2,
4392 2,
4393 2,
4394 0,
4395 0,
4396 0,
4397 0,
4398 0,
4399 0,
4400 0,
4401 0,
4402 0,
4403 0,
4404 0,
4405 0,
4406 0,
4407 0,
4408 0,
4409 0,
4410 0,
4411 0,
4412 0,
4413 0,
4414 0,
4415 0,
4416 0,
4417 0,
4418 0,
4419 0,
4420 0,
4421 0,
4422 0,
4423 0,
4424 0,
4425 0,
4426 0,
4427 1,
4428 0,
4429 0,
4430 0,
4431 0,
4432 0,
4433 1,
4434 0,
4435 0,
4436 0,
4437 0,
4438 0,
4439 1,
4440 0,
4441 0,
4442 0,
4443 0,
4444 0,
4445 0,
4446 0,
4447 0,
4448 0,
4449 0,
4450 0,
4451 0,
4452 0,
4453 0,
4454 0,
4455 1,
4456 0,
4457 1,
4458 0,
4459 1,
4460 0,
4461 1,
4462 0,
4463 1,
4464 0,
4465 1,
4466 0,
4467 1,
4468 0,
4469 1,
4470 0,
4471 1,
4472 0,
4473 1,
4474 0,
4475 1,
4476 0,
4477 1,
4478 0,
4479 1,
4480 0,
4481 1,
4482 0,
4483 1,
4484 0,
4485 1,
4486 0,
4487 1,
4488 0,
4489 1,
4490 0,
4491 1,
4492 0,
4493 1,
4494 0,
4495 0,
4496 0,
4497 0,
4498 0,
4499 0,
4500 0,
4501 0,
4502 0,
4503 0,
4504 0,
4505 0,
4506 0,
4507 3,
4508 0,
4509 0,
4510 0,
4511 0,
4512 0,
4513 0,
4514 0,
4515 0,
4516 0,
4517 0,
4518 0,
4519 0,
4520 0,
4521 0,
4522 0,
4523 0,
4524 0,
4525 0,
4526 0,
4527 0,
4528 0,
4529 2,
4530 2,
4531 3,
4532 3,
4533 3,
4534 2,
4535 0,
4536 2,
4537 0,
4538 0,
4539 0,
4540 0,
4541 0,
4542 0,
4543 0,
4544 0,
4545 0,
4546 5,
4547 1,
4548 };
4549
4550char *const insn_operand_constraint[][MAX_RECOG_OPERANDS] =
4551 {
4552 { "rm", },
4553 { "", },
4554 { "rm", },
4555 { "", },
4556 { "qm", },
4557 { "", },
4558 { "f", "=a", },
4559 { "", "", },
4560 { "f", "=a", },
4561 { "", "", },
4562 { "mr,r", "ri,mr", },
4563 { "", "", },
4564 { "mr,r", "ri,mr", },
4565 { "", "", },
4566 { "q,mq", "qm,nq", },
4567 { "", "", },
4568 { "f,fm", "fm,f", "", "=a,a", },
4569 { "f", "rm", "", "=a", },
4570 { "rm", "f", "", "=a", },
4571 { "f", "fm", "", "=a", },
4572 { "fm", "f", "", "=a", },
4573 { "f", "f", "=a", },
4574 { "f,fm", "fm,f", "", "=a,a", },
4575 { "f", "rm", "", "=a", },
4576 { "rm", "f", "", "=a", },
4577 { "f", "f", "=a", },
4578 { "", "", },
4579 { "", "", },
4580 { "", "", "", },
4581 { "", "", "", },
4582 { "", "", "", },
4583 { "", "", "", },
4584 { "%ro", "ri", },
4585 { "%ro", "ri", },
4586 { "%qm", "qi", },
4587 { "=<", "g", },
4588 { "=<", "ri", },
4589 { "", "", },
4590 { "=g,r", "ri,m", },
4591 { "=<", "g", },
4592 { "=g,r", "ri,m", },
4593 { "+g,r", "ri,m", },
4594 { "=<", "q", },
4595 { "=q,*r,qm", "*g,q,qn", },
4596 { "+q,qm", "*g,qn", },
4597 { "=<,<", "gF,f", },
4598 { "=*rfm,*rf,f,!*rm", "*rf,*rfm,fG,fF", },
4599 { "=<,<", "gF,f", },
4600 { "f", "f", },
4601 { "=*rfm,*rf,f,!*rm", "*rf,*rfm,fG,fF", },
4602 { "=<", "roiF", },
4603 { "=r,rm", "m,riF", },
4604 { "=r", "rm", },
4605 { "=r", "qm", },
4606 { "=r", "qm", },
4607 { "=r", "0", },
4608 { "=r", "0", },
4609 { "=r", "rm", },
4610 { "=r", "qm", },
4611 { "=r", "qm", },
4612 { "=fm,f", "f,fm", },
4613 { "", "", },
4614 { "=f,m", "0,f", "m,m", },
4615 { "", "", "", "", "", "", "", "", },
4616 { "", "", "", "", "", "", "", "", },
4617 { "", "", "", "", "", "", },
4618 { "", "", "", "", "", "", },
4619 { "=rm", "f", "m", "m", "=&q", },
4620 { "=rm", "f", "m", "m", "=&q", },
4621 { "", "", "", "", "", },
4622 { "", "", "", "", "", },
4623 { "=rm", "f", "m", "m", "=&q", },
4624 { "=rm", "f", "m", "m", "=&q", },
4625 { "", "", },
4626 { "", "", },
4627 { "", "", },
4628 { "", "", },
4629 { "=f", "rm", },
4630 { "=f", "rm", },
4631 { "=f", "rm", },
4632 { "=f", "rm", },
4633 { "=&r,ro", "%0,0", "o,riF", },
4634 { "=?r,rm,r", "%r,0,0", "ri,ri,rm", },
4635 { "=rm,r", "%0,0", "ri,rm", },
4636 { "=qm,q", "%0,0", "qn,qmn", },
4637 { "=r", "p", },
4638 { "", "", "", },
4639 { "", "", "", },
4640 { "=&r,ro", "0,0", "o,riF", },
4641 { "=rm,r", "0,0", "ri,rm", },
4642 { "=rm,r", "0,0", "ri,rm", },
4643 { "=qm,q", "0,0", "qn,qmn", },
4644 { "", "", "", },
4645 { "", "", "", },
4646 { "=r", "%0", "r", },
4647 { "=r,r", "%0,rm", "g,i", },
4648 { "=r", "%0", "r", },
4649 { "=r,r", "%0,rm", "g,i", },
4650 { "=a", "%0", "qm", },
4651 { "", "", "", },
4652 { "", "", "", },
4653 { "=a", "0", "qm", },
4654 { "=a", "0", "qm", },
4655 { "", "", "", },
4656 { "", "", "", },
4657 { "=a", "0", "rm", "=&d", },
4658 { "=a", "0", "rm", "=&d", },
4659 { "=a", "0", "rm", "=&d", },
4660 { "=a", "0", "rm", "=&d", },
4661 { "=r,r,rm,r", "%rm,qm,0,0", "L,K,ri,rm", },
4662 { "=rm,r", "%0,0", "ri,rm", },
4663 { "=qm,q", "%0,0", "qn,qmn", },
4664 { "=rm,r", "%0,0", "ri,rm", },
4665 { "=rm,r", "%0,0", "ri,rm", },
4666 { "=qm,q", "%0,0", "qn,qmn", },
4667 { "=rm,r", "%0,0", "ri,rm", },
4668 { "=rm,r", "%0,0", "ri,rm", },
4669 { "=qm,q", "%0,0", "qn,qm", },
4670 { "=&ro", "0", },
4671 { "=rm", "0", },
4672 { "=rm", "0", },
4673 { "=qm", "0", },
4674 { "=f", "0", },
4675 { "=f", "0", },
4676 { "=f", "0", },
4677 { "=f", "0", },
4678 { "=f", "0", },
4679 { "=f", "0", },
4680 { "=f", "0", },
4681 { "=f", "0", },
4682 { "=f", "0", },
4683 { "=f", "0", },
4684 { "=f", "0", },
4685 { "=f", "0", },
4686 { "=f", "0", },
4687 { "=f", "0", },
4688 { "=f", "0", },
4689 { "=rm", "0", },
4690 { "=rm", "0", },
4691 { "=qm", "0", },
4692 { "", "", "", },
4693 { "=&r", "0", "J", },
4694 { "=&r", "0", "c", },
4695 { "=r,rm", "r,0", "M,cI", },
4696 { "=rm", "0", "cI", },
4697 { "=qm", "0", "cI", },
4698 { "", "", "", },
4699 { "=&r", "0", "J", },
4700 { "=&r", "0", "c", },
4701 { "=rm", "0", "cI", },
4702 { "=rm", "0", "cI", },
4703 { "=qm", "0", "cI", },
4704 { "", "", "", },
4705 { "=&r", "0", "J", },
4706 { "=&r", "0", "c", },
4707 { "=rm", "0", "cI", },
4708 { "=rm", "0", "cI", },
4709 { "=qm", "0", "cI", },
4710 { "=rm", "0", "cI", },
4711 { "=rm", "0", "cI", },
4712 { "=qm", "0", "cI", },
4713 { "=rm", "0", "cI", },
4714 { "=rm", "0", "cI", },
4715 { "=qm", "0", "cI", },
4716 { "+rm", "", "r", "n", },
4717 { "=rm", "r", "0", },
4718 { "=rm", "0", "r", },
4719 { "r", "r", },
4720 { "r", "n", "n", },
4721 { "rm", "n", "n", },
4722 { "", },
4723 { "=q", },
4724 { "", },
4725 { "=q", },
4726 { "", },
4727 { "=q", },
4728 { "", },
4729 { "=q", },
4730 { "", },
4731 { "=q", },
4732 { "", },
4733 { "=q", },
4734 { "", },
4735 { "=q", },
4736 { "", },
4737 { "=q", },
4738 { "", },
4739 { "=q", },
4740 { "", },
4741 { "=q", },
4742 { 0 },
4743 { 0 },
4744 { 0 },
4745 { 0 },
4746 { 0 },
4747 { 0 },
4748 { 0 },
4749 { 0 },
4750 { 0 },
4751 { 0 },
4752 { 0 },
4753 { 0 },
4754 { 0 },
4755 { 0 },
4756 { 0 },
4757 { 0 },
4758 { 0 },
4759 { 0 },
4760 { 0 },
4761 { 0 },
4762 { 0 },
4763 { 0 },
4764 { 0 },
4765 { 0 },
4766 { 0 },
4767 { 0 },
4768 { 0 },
4769 { 0 },
4770 { 0 },
4771 { 0 },
4772 { 0 },
4773 { "rm", },
4774 { "", "", "", "", "", "", "", },
4775 { "r", "", "=&r", },
4776 { "rm", },
4777 { "", "", "", "", },
4778 { "m", "g", "", "i", },
4779 { "", "g", "", "i", },
4780 { "", "", },
4781 { "m", "g", },
4782 { "", "g", },
4783 { "", "", "", "", "", },
4784 { "=rf", "m", "g", "", "i", },
4785 { "=rf", "", "g", "", "i", },
4786 { "", "", "", },
4787 { "=rf", "m", "g", },
4788 { "=rf", "", "g", },
4789 { "", "", "", },
4790 { "m", "o", "", },
4791 { "", "o", "", },
4792 { "", "", },
4793 { "m", },
4794 { 0 },
4795 { 0 },
4796 { "", "", "", "", "", },
4797 { "D", "S", "n", "i", "=&c", },
4798 { "", "", "", "", "", },
4799 { "=&r", "S", "D", "c", "i", },
4800 { "S", "D", "c", "i", },
83e20160
PR		 4801 { "", "", "", },
4802 { "=&r", "rm", "=r", },
4803 { "", "", "", },
4804 { "=&r", "rm", "=r", },
9bf86ebb
PR		 4805 { "=f,f", "0,fm", "fm,0", "", },
4806 { "=f", "rm", "0", "", },
4807 { "=f,f", "fm,0", "0,f", "", },
4808 { "=f", "0", "rm", "", },
4809 { "=f,f", "0,f", "fm,0", "", },
4810 { "=f,f", "0,fm", "fm,0", "", },
4811 { "=f", "rm", "0", "", },
4812 { "=f", "0", "rm", "", },
4813 { "", "", "", "", },
4814 { "=&c", "D", "a", "i", },
4815 };
4816
4817const enum machine_mode insn_operand_mode[][MAX_RECOG_OPERANDS] =
4818 {
4819 { SImode, },
4820 { SImode, },
4821 { HImode, },
4822 { HImode, },
4823 { QImode, },
4824 { QImode, },
4825 { SFmode, HImode, },
4826 { SFmode, HImode, },
4827 { DFmode, HImode, },
4828 { DFmode, HImode, },
4829 { SImode, SImode, },
4830 { SImode, SImode, },
4831 { HImode, HImode, },
4832 { HImode, HImode, },
4833 { QImode, QImode, },
4834 { QImode, QImode, },
4835 { DFmode, DFmode, VOIDmode, HImode, },
4836 { DFmode, SImode, VOIDmode, HImode, },
4837 { SImode, DFmode, VOIDmode, HImode, },
4838 { DFmode, SFmode, VOIDmode, HImode, },
4839 { SFmode, DFmode, VOIDmode, HImode, },
4840 { DFmode, DFmode, HImode, },
4841 { SFmode, SFmode, VOIDmode, HImode, },
4842 { SFmode, SImode, VOIDmode, HImode, },
4843 { SImode, SFmode, VOIDmode, HImode, },
4844 { SFmode, SFmode, HImode, },
4845 { DFmode, DFmode, },
4846 { SFmode, SFmode, },
4847 { DFmode, DFmode, HImode, },
4848 { DFmode, DFmode, HImode, },
4849 { SFmode, SFmode, HImode, },
4850 { SFmode, SFmode, HImode, },
4851 { SImode, SImode, },
4852 { HImode, HImode, },
4853 { QImode, QImode, },
4854 { SImode, SImode, },
4855 { SImode, SImode, },
4856 { SImode, SImode, },
4857 { SImode, SImode, },
4858 { HImode, HImode, },
4859 { HImode, HImode, },
4860 { HImode, HImode, },
4861 { QImode, QImode, },
4862 { QImode, QImode, },
4863 { QImode, QImode, },
4864 { SFmode, SFmode, },
4865 { SFmode, SFmode, },
4866 { DFmode, DFmode, },
4867 { DFmode, DFmode, },
4868 { DFmode, DFmode, },
4869 { DImode, DImode, },
4870 { DImode, DImode, },
4871 { SImode, HImode, },
4872 { HImode, QImode, },
4873 { SImode, QImode, },
4874 { DImode, SImode, },
4875 { DImode, SImode, },
4876 { SImode, HImode, },
4877 { HImode, QImode, },
4878 { SImode, QImode, },
4879 { DFmode, SFmode, },
4880 { SFmode, DFmode, },
4881 { SFmode, DFmode, SFmode, },
4882 { SImode, DFmode, VOIDmode, VOIDmode, VOIDmode, VOIDmode, VOIDmode, SImode, },
4883 { SImode, SFmode, VOIDmode, VOIDmode, VOIDmode, VOIDmode, VOIDmode, SImode, },
4884 { DImode, DFmode, VOIDmode, VOIDmode, VOIDmode, SImode, },
4885 { DImode, SFmode, VOIDmode, VOIDmode, VOIDmode, SImode, },
4886 { DImode, DFmode, SImode, SImode, SImode, },
4887 { DImode, SFmode, SImode, SImode, SImode, },
4888 { SImode, DFmode, VOIDmode, VOIDmode, SImode, },
4889 { SImode, SFmode, VOIDmode, VOIDmode, SImode, },
4890 { SImode, DFmode, SImode, SImode, SImode, },
4891 { SImode, SFmode, SImode, SImode, SImode, },
4892 { SFmode, SImode, },
4893 { SFmode, DImode, },
4894 { DFmode, SImode, },
4895 { DFmode, DImode, },
4896 { DFmode, DImode, },
4897 { SFmode, DImode, },
4898 { DFmode, SImode, },
4899 { SFmode, SImode, },
4900 { DImode, DImode, DImode, },
4901 { SImode, SImode, SImode, },
4902 { HImode, HImode, HImode, },
4903 { QImode, QImode, QImode, },
4904 { SImode, QImode, },
4905 { DFmode, DFmode, DFmode, },
4906 { SFmode, SFmode, SFmode, },
4907 { DImode, DImode, DImode, },
4908 { SImode, SImode, SImode, },
4909 { HImode, HImode, HImode, },
4910 { QImode, QImode, QImode, },
4911 { DFmode, DFmode, DFmode, },
4912 { SFmode, SFmode, SFmode, },
4913 { HImode, HImode, HImode, },
4914 { HImode, HImode, HImode, },
4915 { SImode, SImode, SImode, },
4916 { SImode, SImode, SImode, },
4917 { HImode, QImode, QImode, },
4918 { DFmode, DFmode, DFmode, },
4919 { SFmode, SFmode, SFmode, },
4920 { QImode, HImode, QImode, },
4921 { QImode, HImode, QImode, },
4922 { DFmode, DFmode, DFmode, },
4923 { SFmode, SFmode, SFmode, },
4924 { SImode, SImode, SImode, SImode, },
4925 { HImode, HImode, HImode, HImode, },
4926 { SImode, SImode, SImode, SImode, },
4927 { HImode, HImode, HImode, HImode, },
4928 { SImode, SImode, SImode, },
4929 { HImode, HImode, HImode, },
4930 { QImode, QImode, QImode, },
4931 { SImode, SImode, SImode, },
4932 { HImode, HImode, HImode, },
4933 { QImode, QImode, QImode, },
4934 { SImode, SImode, SImode, },
4935 { HImode, HImode, HImode, },
4936 { QImode, QImode, QImode, },
4937 { DImode, DImode, },
4938 { SImode, SImode, },
4939 { HImode, HImode, },
4940 { QImode, QImode, },
4941 { SFmode, SFmode, },
4942 { DFmode, DFmode, },
4943 { DFmode, SFmode, },
4944 { SFmode, SFmode, },
4945 { DFmode, DFmode, },
4946 { DFmode, SFmode, },
4947 { SFmode, SFmode, },
4948 { DFmode, DFmode, },
4949 { DFmode, SFmode, },
4950 { DFmode, DFmode, },
4951 { SFmode, SFmode, },
4952 { DFmode, SFmode, },
4953 { DFmode, DFmode, },
4954 { SFmode, SFmode, },
4955 { DFmode, SFmode, },
4956 { SImode, SImode, },
4957 { HImode, HImode, },
4958 { QImode, QImode, },
4959 { DImode, DImode, QImode, },
4960 { DImode, DImode, QImode, },
4961 { DImode, DImode, QImode, },
4962 { SImode, SImode, SImode, },
4963 { HImode, HImode, HImode, },
4964 { QImode, QImode, QImode, },
4965 { DImode, DImode, QImode, },
4966 { DImode, DImode, QImode, },
4967 { DImode, DImode, QImode, },
4968 { SImode, SImode, SImode, },
4969 { HImode, HImode, HImode, },
4970 { QImode, QImode, QImode, },
4971 { DImode, DImode, QImode, },
4972 { DImode, DImode, QImode, },
4973 { DImode, DImode, QImode, },
4974 { SImode, SImode, SImode, },
4975 { HImode, HImode, HImode, },
4976 { QImode, QImode, QImode, },
4977 { SImode, SImode, SImode, },
4978 { HImode, HImode, HImode, },
4979 { QImode, QImode, QImode, },
4980 { SImode, SImode, SImode, },
4981 { HImode, HImode, HImode, },
4982 { QImode, QImode, QImode, },
4983 { SImode, VOIDmode, SImode, SImode, },
4984 { SImode, SImode, SImode, },
4985 { SImode, SImode, SImode, },
4986 { SImode, SImode, },
4987 { SImode, SImode, SImode, },
4988 { QImode, SImode, SImode, },
4989 { QImode, },
4990 { QImode, },
4991 { QImode, },
4992 { QImode, },
4993 { QImode, },
4994 { QImode, },
4995 { QImode, },
4996 { QImode, },
4997 { QImode, },
4998 { QImode, },
4999 { QImode, },
5000 { QImode, },
5001 { QImode, },
5002 { QImode, },
5003 { QImode, },
5004 { QImode, },
5005 { QImode, },
5006 { QImode, },
5007 { QImode, },
5008 { QImode, },
5009 { VOIDmode },
5010 { VOIDmode },
5011 { VOIDmode },
5012 { VOIDmode },
5013 { VOIDmode },
5014 { VOIDmode },
5015 { VOIDmode },
5016 { VOIDmode },
5017 { VOIDmode },
5018 { VOIDmode },
5019 { VOIDmode },
5020 { VOIDmode },
5021 { VOIDmode },
5022 { VOIDmode },
5023 { VOIDmode },
5024 { VOIDmode },
5025 { VOIDmode },
5026 { VOIDmode },
5027 { VOIDmode },
5028 { VOIDmode },
5029 { VOIDmode },
5030 { VOIDmode },
5031 { VOIDmode },
5032 { VOIDmode },
5033 { VOIDmode },
5034 { VOIDmode },
5035 { VOIDmode },
5036 { VOIDmode },
5037 { VOIDmode },
5038 { VOIDmode },
5039 { VOIDmode },
5040 { SImode, },
5041 { SImode, SImode, SImode, VOIDmode, VOIDmode, VOIDmode, SImode, },
5042 { SImode, VOIDmode, SImode, },
5043 { SImode, },
5044 { QImode, SImode, VOIDmode, SImode, },
5045 { QImode, SImode, VOIDmode, SImode, },
5046 { SImode, SImode, VOIDmode, SImode, },
5047 { QImode, SImode, },
5048 { QImode, SImode, },
5049 { SImode, SImode, },
5050 { VOIDmode, QImode, SImode, VOIDmode, SImode, },
5051 { VOIDmode, QImode, SImode, VOIDmode, SImode, },
5052 { VOIDmode, SImode, SImode, VOIDmode, SImode, },
5053 { VOIDmode, QImode, SImode, },
5054 { VOIDmode, QImode, SImode, },
5055 { VOIDmode, SImode, SImode, },
5056 { QImode, BLKmode, VOIDmode, },
5057 { QImode, DImode, VOIDmode, },
5058 { SImode, DImode, VOIDmode, },
5059 { BLKmode, VOIDmode, },
5060 { SImode, },
5061 { VOIDmode },
5062 { VOIDmode },
5063 { BLKmode, BLKmode, SImode, SImode, SImode, },
5064 { SImode, SImode, SImode, SImode, SImode, },
5065 { SImode, BLKmode, BLKmode, SImode, SImode, },
5066 { SImode, SImode, SImode, SImode, SImode, },
5067 { SImode, SImode, SImode, SImode, },
83e20160
PR		 5068 { SImode, SImode, SImode, },
5069 { SImode, SImode, SImode, },
5070 { HImode, HImode, HImode, },
5071 { HImode, HImode, HImode, },
9bf86ebb
PR		 5072 { DFmode, DFmode, DFmode, DFmode, },
5073 { DFmode, SImode, DFmode, DFmode, },
5074 { DFmode, SFmode, DFmode, DFmode, },
5075 { DFmode, DFmode, SImode, DFmode, },
5076 { DFmode, DFmode, SFmode, DFmode, },
5077 { SFmode, SFmode, SFmode, SFmode, },
5078 { SFmode, SImode, SFmode, SFmode, },
5079 { SFmode, SFmode, SImode, SFmode, },
5080 { SImode, BLKmode, QImode, SImode, },
5081 { SImode, SImode, QImode, SImode, },
5082 };
5083
5084const char insn_operand_strict_low[][MAX_RECOG_OPERANDS] =
5085 {
5086 { 0, },
5087 { 0, },
5088 { 0, },
5089 { 0, },
5090 { 0, },
5091 { 0, },
5092 { 0, 0, },
5093 { 0, 0, },
5094 { 0, 0, },
5095 { 0, 0, },
5096 { 0, 0, },
5097 { 0, 0, },
5098 { 0, 0, },
5099 { 0, 0, },
5100 { 0, 0, },
5101 { 0, 0, },
5102 { 0, 0, 0, 0, },
5103 { 0, 0, 0, 0, },
5104 { 0, 0, 0, 0, },
5105 { 0, 0, 0, 0, },
5106 { 0, 0, 0, 0, },
5107 { 0, 0, 0, },
5108 { 0, 0, 0, 0, },
5109 { 0, 0, 0, 0, },
5110 { 0, 0, 0, 0, },
5111 { 0, 0, 0, },
5112 { 0, 0, },
5113 { 0, 0, },
5114 { 0, 0, 0, },
5115 { 0, 0, 0, },
5116 { 0, 0, 0, },
5117 { 0, 0, 0, },
5118 { 0, 0, },
5119 { 0, 0, },
5120 { 0, 0, },
5121 { 0, 0, },
5122 { 0, 0, },
5123 { 0, 0, },
5124 { 0, 0, },
5125 { 0, 0, },
5126 { 0, 0, },
5127 { 1, 0, },
5128 { 0, 0, },
5129 { 0, 0, },
5130 { 1, 0, },
5131 { 0, 0, },
5132 { 0, 0, },
5133 { 0, 0, },
5134 { 0, 0, },
5135 { 0, 0, },
5136 { 0, 0, },
5137 { 0, 0, },
5138 { 0, 0, },
5139 { 0, 0, },
5140 { 0, 0, },
5141 { 0, 0, },
5142 { 0, 0, },
5143 { 0, 0, },
5144 { 0, 0, },
5145 { 0, 0, },
5146 { 0, 0, },
5147 { 0, 0, },
5148 { 0, 0, 0, },
5149 { 0, 0, 0, 0, 0, 0, 0, 0, },
5150 { 0, 0, 0, 0, 0, 0, 0, 0, },
5151 { 0, 0, 0, 0, 0, 0, },
5152 { 0, 0, 0, 0, 0, 0, },
5153 { 0, 0, 0, 0, 0, },
5154 { 0, 0, 0, 0, 0, },
5155 { 0, 0, 0, 0, 0, },
5156 { 0, 0, 0, 0, 0, },
5157 { 0, 0, 0, 0, 0, },
5158 { 0, 0, 0, 0, 0, },
5159 { 0, 0, },
5160 { 0, 0, },
5161 { 0, 0, },
5162 { 0, 0, },
5163 { 0, 0, },
5164 { 0, 0, },
5165 { 0, 0, },
5166 { 0, 0, },
5167 { 0, 0, 0, },
5168 { 0, 0, 0, },
5169 { 0, 0, 0, },
5170 { 0, 0, 0, },
5171 { 0, 0, },
5172 { 0, 0, 0, },
5173 { 0, 0, 0, },
5174 { 0, 0, 0, },
5175 { 0, 0, 0, },
5176 { 0, 0, 0, },
5177 { 0, 0, 0, },
5178 { 0, 0, 0, },
5179 { 0, 0, 0, },
5180 { 0, 0, 0, },
5181 { 0, 0, 0, },
5182 { 0, 0, 0, },
5183 { 0, 0, 0, },
5184 { 0, 0, 0, },
5185 { 0, 0, 0, },
5186 { 0, 0, 0, },
5187 { 0, 0, 0, },
5188 { 0, 0, 0, },
5189 { 0, 0, 0, },
5190 { 0, 0, 0, },
5191 { 0, 0, 0, 0, },
5192 { 0, 0, 0, 0, },
5193 { 0, 0, 0, 0, },
5194 { 0, 0, 0, 0, },
5195 { 0, 0, 0, },
5196 { 0, 0, 0, },
5197 { 0, 0, 0, },
5198 { 0, 0, 0, },
5199 { 0, 0, 0, },
5200 { 0, 0, 0, },
5201 { 0, 0, 0, },
5202 { 0, 0, 0, },
5203 { 0, 0, 0, },
5204 { 0, 0, },
5205 { 0, 0, },
5206 { 0, 0, },
5207 { 0, 0, },
5208 { 0, 0, },
5209 { 0, 0, },
5210 { 0, 0, },
5211 { 0, 0, },
5212 { 0, 0, },
5213 { 0, 0, },
5214 { 0, 0, },
5215 { 0, 0, },
5216 { 0, 0, },
5217 { 0, 0, },
5218 { 0, 0, },
5219 { 0, 0, },
5220 { 0, 0, },
5221 { 0, 0, },
5222 { 0, 0, },
5223 { 0, 0, },
5224 { 0, 0, },
5225 { 0, 0, },
5226 { 0, 0, 0, },
5227 { 0, 0, 0, },
5228 { 0, 0, 0, },
5229 { 0, 0, 0, },
5230 { 0, 0, 0, },
5231 { 0, 0, 0, },
5232 { 0, 0, 0, },
5233 { 0, 0, 0, },
5234 { 0, 0, 0, },
5235 { 0, 0, 0, },
5236 { 0, 0, 0, },
5237 { 0, 0, 0, },
5238 { 0, 0, 0, },
5239 { 0, 0, 0, },
5240 { 0, 0, 0, },
5241 { 0, 0, 0, },
5242 { 0, 0, 0, },
5243 { 0, 0, 0, },
5244 { 0, 0, 0, },
5245 { 0, 0, 0, },
5246 { 0, 0, 0, },
5247 { 0, 0, 0, },
5248 { 0, 0, 0, },
5249 { 0, 0, 0, },
5250 { 0, 0, 0, 0, },
5251 { 0, 0, 0, },
5252 { 0, 0, 0, },
5253 { 0, 0, },
5254 { 0, 0, 0, },
5255 { 0, 0, 0, },
5256 { 0, },
5257 { 0, },
5258 { 0, },
5259 { 0, },
5260 { 0, },
5261 { 0, },
5262 { 0, },
5263 { 0, },
5264 { 0, },
5265 { 0, },
5266 { 0, },
5267 { 0, },
5268 { 0, },
5269 { 0, },
5270 { 0, },
5271 { 0, },
5272 { 0, },
5273 { 0, },
5274 { 0, },
5275 { 0, },
5276 { 0 },
5277 { 0 },
5278 { 0 },
5279 { 0 },
5280 { 0 },
5281 { 0 },
5282 { 0 },
5283 { 0 },
5284 { 0 },
5285 { 0 },
5286 { 0 },
5287 { 0 },
5288 { 0 },
5289 { 0 },
5290 { 0 },
5291 { 0 },
5292 { 0 },
5293 { 0 },
5294 { 0 },
5295 { 0 },
5296 { 0 },
5297 { 0 },
5298 { 0 },
5299 { 0 },
5300 { 0 },
5301 { 0 },
5302 { 0 },
5303 { 0 },
5304 { 0 },
5305 { 0 },
5306 { 0 },
5307 { 0, },
5308 { 0, 0, 0, 0, 0, 0, 0, },
5309 { 0, 0, 0, },
5310 { 0, },
5311 { 0, 0, 0, 0, },
5312 { 0, 0, 0, 0, },
5313 { 0, 0, 0, 0, },
5314 { 0, 0, },
5315 { 0, 0, },
5316 { 0, 0, },
5317 { 0, 0, 0, 0, 0, },
5318 { 0, 0, 0, 0, 0, },
5319 { 0, 0, 0, 0, 0, },
5320 { 0, 0, 0, },
5321 { 0, 0, 0, },
5322 { 0, 0, 0, },
5323 { 0, 0, 0, },
5324 { 0, 0, 0, },
5325 { 0, 0, 0, },
5326 { 0, 0, },
5327 { 0, },
5328 { 0 },
5329 { 0 },
5330 { 0, 0, 0, 0, 0, },
5331 { 0, 0, 0, 0, 0, },
5332 { 0, 0, 0, 0, 0, },
5333 { 0, 0, 0, 0, 0, },
5334 { 0, 0, 0, 0, },
83e20160
PR		 5335 { 0, 0, 0, },
5336 { 0, 0, 0, },
5337 { 0, 0, 0, },
5338 { 0, 0, 0, },
9bf86ebb
PR		 5339 { 0, 0, 0, 0, },
5340 { 0, 0, 0, 0, },
5341 { 0, 0, 0, 0, },
5342 { 0, 0, 0, 0, },
5343 { 0, 0, 0, 0, },
5344 { 0, 0, 0, 0, },
5345 { 0, 0, 0, 0, },
5346 { 0, 0, 0, 0, },
5347 { 0, 0, 0, 0, },
5348 { 0, 0, 0, 0, },
5349 };
5350
5351extern int nonimmediate_operand ();
5352extern int register_operand ();
5353extern int scratch_operand ();
5354extern int general_operand ();
5355extern int VOIDmode_compare_op ();
5356extern int push_operand ();
5357extern int memory_operand ();
5358extern int address_operand ();
5359extern int nonmemory_operand ();
5360extern int const_int_operand ();
5361extern int indirect_operand ();
5362extern int immediate_operand ();
5363extern int call_insn_operand ();
5364extern int symbolic_operand ();
5365extern int binary_387_op ();
5366
5367int (*const insn_operand_predicate[][MAX_RECOG_OPERANDS])() =
5368 {
5369 { nonimmediate_operand, },
5370 { nonimmediate_operand, },
5371 { nonimmediate_operand, },
5372 { nonimmediate_operand, },
5373 { nonimmediate_operand, },
5374 { nonimmediate_operand, },
5375 { register_operand, scratch_operand, },
5376 { register_operand, scratch_operand, },
5377 { register_operand, scratch_operand, },
5378 { register_operand, scratch_operand, },
5379 { nonimmediate_operand, general_operand, },
5380 { nonimmediate_operand, general_operand, },
5381 { nonimmediate_operand, general_operand, },
5382 { nonimmediate_operand, general_operand, },
5383 { nonimmediate_operand, general_operand, },
5384 { nonimmediate_operand, general_operand, },
5385 { nonimmediate_operand, nonimmediate_operand, VOIDmode_compare_op, scratch_operand, },
5386 { register_operand, nonimmediate_operand, VOIDmode_compare_op, scratch_operand, },
5387 { nonimmediate_operand, register_operand, VOIDmode_compare_op, scratch_operand, },
5388 { register_operand, nonimmediate_operand, VOIDmode_compare_op, scratch_operand, },
5389 { nonimmediate_operand, register_operand, VOIDmode_compare_op, scratch_operand, },
5390 { register_operand, register_operand, scratch_operand, },
5391 { nonimmediate_operand, nonimmediate_operand, VOIDmode_compare_op, scratch_operand, },
5392 { register_operand, nonimmediate_operand, VOIDmode_compare_op, scratch_operand, },
5393 { nonimmediate_operand, register_operand, VOIDmode_compare_op, scratch_operand, },
5394 { register_operand, register_operand, scratch_operand, },
5395 { register_operand, nonimmediate_operand, },
5396 { register_operand, nonimmediate_operand, },
5397 { register_operand, register_operand, scratch_operand, },
5398 { register_operand, register_operand, scratch_operand, },
5399 { register_operand, register_operand, scratch_operand, },
5400 { register_operand, register_operand, scratch_operand, },
5401 { general_operand, general_operand, },
5402 { general_operand, general_operand, },
5403 { general_operand, general_operand, },
5404 { push_operand, general_operand, },
5405 { push_operand, general_operand, },
5406 { general_operand, general_operand, },
5407 { general_operand, general_operand, },
5408 { push_operand, general_operand, },
5409 { general_operand, general_operand, },
5410 { general_operand, general_operand, },
5411 { push_operand, general_operand, },
5412 { general_operand, general_operand, },
5413 { general_operand, general_operand, },
5414 { push_operand, general_operand, },
5415 { general_operand, general_operand, },
5416 { push_operand, general_operand, },
5417 { register_operand, register_operand, },
5418 { general_operand, general_operand, },
5419 { push_operand, general_operand, },
5420 { general_operand, general_operand, },
5421 { general_operand, nonimmediate_operand, },
5422 { general_operand, nonimmediate_operand, },
5423 { general_operand, nonimmediate_operand, },
5424 { register_operand, register_operand, },
5425 { register_operand, register_operand, },
5426 { general_operand, nonimmediate_operand, },
5427 { general_operand, nonimmediate_operand, },
5428 { general_operand, nonimmediate_operand, },
5429 { general_operand, general_operand, },
5430 { nonimmediate_operand, register_operand, },
5431 { nonimmediate_operand, register_operand, memory_operand, },
5432 { general_operand, register_operand, 0, 0, 0, 0, 0, scratch_operand, },
5433 { general_operand, register_operand, 0, 0, 0, 0, 0, scratch_operand, },
5434 { general_operand, register_operand, 0, 0, 0, scratch_operand, },
5435 { general_operand, register_operand, 0, 0, 0, scratch_operand, },
5436 { general_operand, register_operand, memory_operand, memory_operand, scratch_operand, },
5437 { general_operand, register_operand, memory_operand, memory_operand, scratch_operand, },
5438 { general_operand, register_operand, 0, 0, scratch_operand, },
5439 { general_operand, register_operand, 0, 0, scratch_operand, },
5440 { general_operand, register_operand, memory_operand, memory_operand, scratch_operand, },
5441 { general_operand, register_operand, memory_operand, memory_operand, scratch_operand, },
5442 { register_operand, nonimmediate_operand, },
5443 { register_operand, nonimmediate_operand, },
5444 { register_operand, nonimmediate_operand, },
5445 { register_operand, nonimmediate_operand, },
5446 { register_operand, nonimmediate_operand, },
5447 { register_operand, nonimmediate_operand, },
5448 { register_operand, nonimmediate_operand, },
5449 { register_operand, nonimmediate_operand, },
5450 { general_operand, general_operand, general_operand, },
5451 { general_operand, general_operand, general_operand, },
5452 { general_operand, general_operand, general_operand, },
5453 { general_operand, general_operand, general_operand, },
5454 { register_operand, address_operand, },
5455 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5456 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5457 { general_operand, general_operand, general_operand, },
5458 { general_operand, general_operand, general_operand, },
5459 { general_operand, general_operand, general_operand, },
5460 { general_operand, general_operand, general_operand, },
5461 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5462 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5463 { general_operand, general_operand, general_operand, },
5464 { general_operand, general_operand, general_operand, },
5465 { general_operand, general_operand, general_operand, },
5466 { general_operand, general_operand, general_operand, },
5467 { general_operand, nonimmediate_operand, nonimmediate_operand, },
5468 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5469 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5470 { general_operand, general_operand, general_operand, },
5471 { general_operand, general_operand, general_operand, },
5472 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5473 { register_operand, nonimmediate_operand, nonimmediate_operand, },
5474 { register_operand, register_operand, general_operand, register_operand, },
5475 { register_operand, register_operand, general_operand, register_operand, },
5476 { register_operand, register_operand, general_operand, register_operand, },
5477 { register_operand, register_operand, general_operand, register_operand, },
5478 { general_operand, general_operand, general_operand, },
5479 { general_operand, general_operand, general_operand, },
5480 { general_operand, general_operand, general_operand, },
5481 { general_operand, general_operand, general_operand, },
5482 { general_operand, general_operand, general_operand, },
5483 { general_operand, general_operand, general_operand, },
5484 { general_operand, general_operand, general_operand, },
5485 { general_operand, general_operand, general_operand, },
5486 { general_operand, general_operand, general_operand, },
5487 { general_operand, general_operand, },
5488 { general_operand, general_operand, },
5489 { general_operand, general_operand, },
5490 { general_operand, general_operand, },
5491 { register_operand, general_operand, },
5492 { register_operand, general_operand, },
5493 { register_operand, general_operand, },
5494 { register_operand, general_operand, },
5495 { register_operand, general_operand, },
5496 { register_operand, general_operand, },
5497 { register_operand, general_operand, },
5498 { register_operand, general_operand, },
5499 { register_operand, general_operand, },
5500 { register_operand, register_operand, },
5501 { register_operand, register_operand, },
5502 { register_operand, register_operand, },
5503 { register_operand, register_operand, },
5504 { register_operand, register_operand, },
5505 { register_operand, register_operand, },
5506 { general_operand, general_operand, },
5507 { general_operand, general_operand, },
5508 { general_operand, general_operand, },
5509 { register_operand, register_operand, nonmemory_operand, },
5510 { register_operand, register_operand, const_int_operand, },
5511 { register_operand, register_operand, register_operand, },
5512 { general_operand, general_operand, nonmemory_operand, },
5513 { general_operand, general_operand, nonmemory_operand, },
5514 { general_operand, general_operand, nonmemory_operand, },
5515 { register_operand, register_operand, nonmemory_operand, },
5516 { register_operand, register_operand, const_int_operand, },
5517 { register_operand, register_operand, register_operand, },
5518 { general_operand, general_operand, nonmemory_operand, },
5519 { general_operand, general_operand, nonmemory_operand, },
5520 { general_operand, general_operand, nonmemory_operand, },
5521 { register_operand, register_operand, nonmemory_operand, },
5522 { register_operand, register_operand, const_int_operand, },
5523 { register_operand, register_operand, register_operand, },
5524 { general_operand, general_operand, nonmemory_operand, },
5525 { general_operand, general_operand, nonmemory_operand, },
5526 { general_operand, general_operand, nonmemory_operand, },
5527 { general_operand, general_operand, nonmemory_operand, },
5528 { general_operand, general_operand, nonmemory_operand, },
5529 { general_operand, general_operand, nonmemory_operand, },
5530 { general_operand, general_operand, nonmemory_operand, },
5531 { general_operand, general_operand, nonmemory_operand, },
5532 { general_operand, general_operand, nonmemory_operand, },
5533 { general_operand, 0, general_operand, const_int_operand, },
5534 { general_operand, general_operand, general_operand, },
5535 { general_operand, general_operand, general_operand, },
5536 { register_operand, general_operand, },
5537 { register_operand, const_int_operand, const_int_operand, },
5538 { general_operand, const_int_operand, const_int_operand, },
5539 { register_operand, },
5540 { register_operand, },
5541 { register_operand, },
5542 { register_operand, },
5543 { register_operand, },
5544 { register_operand, },
5545 { register_operand, },
5546 { register_operand, },
5547 { register_operand, },
5548 { register_operand, },
5549 { register_operand, },
5550 { register_operand, },
5551 { register_operand, },
5552 { register_operand, },
5553 { register_operand, },
5554 { register_operand, },
5555 { register_operand, },
5556 { register_operand, },
5557 { register_operand, },
5558 { register_operand, },
5559 { 0 },
5560 { 0 },
5561 { 0 },
5562 { 0 },
5563 { 0 },
5564 { 0 },
5565 { 0 },
5566 { 0 },
5567 { 0 },
5568 { 0 },
5569 { 0 },
5570 { 0 },
5571 { 0 },
5572 { 0 },
5573 { 0 },
5574 { 0 },
5575 { 0 },
5576 { 0 },
5577 { 0 },
5578 { 0 },
5579 { 0 },
5580 { 0 },
5581 { 0 },
5582 { 0 },
5583 { 0 },
5584 { 0 },
5585 { 0 },
5586 { 0 },
5587 { 0 },
5588 { 0 },
5589 { 0 },
5590 { general_operand, },
5591 { general_operand, general_operand, general_operand, 0, 0, 0, scratch_operand, },
5592 { register_operand, 0, scratch_operand, },
5593 { general_operand, },
5594 { indirect_operand, general_operand, 0, immediate_operand, },
5595 { call_insn_operand, general_operand, 0, immediate_operand, },
5596 { symbolic_operand, general_operand, 0, immediate_operand, },
5597 { indirect_operand, general_operand, },
5598 { call_insn_operand, general_operand, },
5599 { symbolic_operand, general_operand, },
5600 { 0, indirect_operand, general_operand, 0, immediate_operand, },
5601 { 0, call_insn_operand, general_operand, 0, immediate_operand, },
5602 { 0, symbolic_operand, general_operand, 0, immediate_operand, },
5603 { 0, indirect_operand, general_operand, },
5604 { 0, call_insn_operand, general_operand, },
5605 { 0, symbolic_operand, general_operand, },
5606 { indirect_operand, memory_operand, 0, },
5607 { call_insn_operand, memory_operand, 0, },
5608 { symbolic_operand, memory_operand, 0, },
5609 { memory_operand, 0, },
5610 { memory_operand, },
5611 { 0 },
5612 { 0 },
5613 { memory_operand, memory_operand, const_int_operand, const_int_operand, scratch_operand, },
5614 { address_operand, address_operand, const_int_operand, immediate_operand, scratch_operand, },
5615 { general_operand, general_operand, general_operand, general_operand, immediate_operand, },
5616 { general_operand, address_operand, address_operand, register_operand, immediate_operand, },
5617 { address_operand, address_operand, register_operand, immediate_operand, },
83e20160
PR		 5618 { general_operand, general_operand, scratch_operand, },
5619 { register_operand, general_operand, scratch_operand, },
5620 { general_operand, general_operand, scratch_operand, },
5621 { register_operand, general_operand, scratch_operand, },
9bf86ebb
PR		 5622 { register_operand, nonimmediate_operand, nonimmediate_operand, binary_387_op, },
5623 { register_operand, general_operand, general_operand, binary_387_op, },
5624 { register_operand, general_operand, general_operand, binary_387_op, },
5625 { register_operand, general_operand, general_operand, binary_387_op, },
5626 { register_operand, general_operand, general_operand, binary_387_op, },
5627 { register_operand, nonimmediate_operand, nonimmediate_operand, binary_387_op, },
5628 { register_operand, general_operand, general_operand, binary_387_op, },
5629 { register_operand, general_operand, general_operand, binary_387_op, },
5630 { register_operand, general_operand, register_operand, immediate_operand, },
5631 { register_operand, address_operand, register_operand, immediate_operand, },
5632 };
5633
5634const int insn_n_alternatives[] =
5635 {
5636 1,
5637 0,
5638 1,
5639 0,
5640 1,
5641 0,
5642 1,
5643 0,
5644 1,
5645 0,
5646 2,
5647 0,
5648 2,
5649 0,
5650 2,
5651 0,
5652 2,
5653 1,
5654 1,
5655 1,
5656 1,
5657 1,
5658 2,
5659 1,
5660 1,
5661 1,
5662 0,
5663 0,
5664 0,
5665 0,
5666 0,
5667 0,
5668 1,
5669 1,
5670 1,
5671 1,
5672 1,
5673 0,
5674 2,
5675 1,
5676 2,
5677 2,
5678 1,
5679 3,
5680 2,
5681 2,
5682 4,
5683 2,
5684 1,
5685 4,
5686 1,
5687 2,
5688 1,
5689 1,
5690 1,
5691 1,
5692 1,
5693 1,
5694 1,
5695 1,
5696 2,
5697 0,
5698 2,
5699 0,
5700 0,
5701 0,
5702 0,
5703 1,
5704 1,
5705 0,
5706 0,
5707 1,
5708 1,
5709 0,
5710 0,
5711 0,
5712 0,
5713 1,
5714 1,
5715 1,
5716 1,
5717 2,
5718 3,
5719 2,
5720 2,
5721 1,
5722 0,
5723 0,
5724 2,
5725 2,
5726 2,
5727 2,
5728 0,
5729 0,
5730 1,
5731 2,
5732 1,
5733 2,
5734 1,
5735 0,
5736 0,
5737 1,
5738 1,
5739 0,
5740 0,
5741 1,
5742 1,
5743 1,
5744 1,
5745 4,
5746 2,
5747 2,
5748 2,
5749 2,
5750 2,
5751 2,
5752 2,
5753 2,
5754 1,
5755 1,
5756 1,
5757 1,
5758 1,
5759 1,
5760 1,
5761 1,
5762 1,
5763 1,
5764 1,
5765 1,
5766 1,
5767 1,
5768 1,
5769 1,
5770 1,
5771 1,
5772 1,
5773 1,
5774 1,
5775 1,
5776 0,
5777 1,
5778 1,
5779 2,
5780 1,
5781 1,
5782 0,
5783 1,
5784 1,
5785 1,
5786 1,
5787 1,
5788 0,
5789 1,
5790 1,
5791 1,
5792 1,
5793 1,
5794 1,
5795 1,
5796 1,
5797 1,
5798 1,
5799 1,
5800 1,
5801 1,
5802 1,
5803 1,
5804 1,
5805 1,
5806 0,
5807 1,
5808 0,
5809 1,
5810 0,
5811 1,
5812 0,
5813 1,
5814 0,
5815 1,
5816 0,
5817 1,
5818 0,
5819 1,
5820 0,
5821 1,
5822 0,
5823 1,
5824 0,
5825 1,
5826 0,
5827 0,
5828 0,
5829 0,
5830 0,
5831 0,
5832 0,
5833 0,
5834 0,
5835 0,
5836 0,
5837 0,
5838 0,
5839 0,
5840 0,
5841 0,
5842 0,
5843 0,
5844 0,
5845 0,
5846 0,
5847 0,
5848 0,
5849 0,
5850 0,
5851 0,
5852 0,
5853 0,
5854 0,
5855 0,
5856 0,
5857 1,
5858 0,
5859 1,
5860 1,
5861 0,
5862 1,
5863 1,
5864 0,
5865 1,
5866 1,
5867 0,
5868 1,
5869 1,
5870 0,
5871 1,
5872 1,
5873 0,
5874 1,
5875 1,
5876 0,
5877 1,
5878 0,
5879 0,
5880 0,
5881 1,
5882 0,
5883 1,
5884 1,
5885 0,
5886 1,
5887 0,
5888 1,
5889 2,
5890 1,
5891 2,
5892 1,
5893 2,
5894 2,
5895 1,
5896 1,
5897 0,
5898 1,
5899 };
Continuous source code history from original PDP-7 UNIX to FreeBSD 2, the first fully unencumbered FreeBSD release.