Commit | Line | Data |
---|---|---|
1f0241d9 DR |
1 | # |
2 | /* | |
3 | */ | |
4 | ||
5 | /* | |
6 | * RS03/04 disk driver | |
7 | */ | |
8 | ||
9 | #include "../param.h" | |
10 | #include "../buf.h" | |
11 | #include "../conf.h" | |
12 | #include "../user.h" | |
13 | ||
14 | ||
15 | struct { | |
16 | int hscs1; /* Control and Status register 1 */ | |
17 | int hswc; /* Word count register */ | |
18 | int hsba; /* UNIBUS address register */ | |
19 | int hsda; /* Desired address register */ | |
20 | int hscs2; /* Control and Status register 2 */ | |
21 | int hsds; /* Drive Status */ | |
22 | int hser; /* Error register */ | |
23 | int hsas; /* not used */ | |
24 | int hsla; /* not used */ | |
25 | int hsdb; /* not used */ | |
26 | int hsmr; /* not used */ | |
27 | int hsdt; /* not used */ | |
28 | int hsbae; /* 11/70 bus extension */ | |
29 | }; | |
30 | ||
31 | struct devtab hstab; | |
32 | struct buf rhsbuf; | |
33 | ||
34 | #define HSADDR 0172040 | |
35 | ||
36 | #define ERR 040000 /* hscs1 - composite error */ | |
37 | ||
38 | #define GO 01 | |
39 | #define RCLR 010 | |
40 | #define DRY 0200 /* hsds - Drive Ready */ | |
41 | ||
42 | hsstrategy(abp) | |
43 | struct buf *abp; | |
44 | { | |
45 | register struct buf *bp; | |
46 | register mblks; | |
47 | ||
48 | bp = abp; | |
49 | mblks = 1024; /* RJS03 */ | |
50 | if(bp->b_dev.d_minor >= 8) | |
51 | mblks = 2048; /* RJS04 */ | |
52 | if(bp->b_blkno >= mblks) { | |
53 | bp->b_flags =| B_ERROR; | |
54 | iodone(bp); | |
55 | return; | |
56 | } | |
57 | bp->av_forw = 0; | |
58 | spl5(); | |
59 | if (hstab.d_actf==0) | |
60 | hstab.d_actf = bp; else | |
61 | hstab.d_actl->av_forw = bp; | |
62 | hstab.d_actl = bp; | |
63 | if (hstab.d_active==0) | |
64 | hsstart(); | |
65 | spl0(); | |
66 | } | |
67 | ||
68 | hsstart() | |
69 | { | |
70 | register struct buf *bp; | |
71 | register addr; | |
72 | ||
73 | if ((bp = hstab.d_actf) == 0) | |
74 | return; | |
75 | hstab.d_active++; | |
76 | addr = bp->b_blkno; | |
77 | if(bp->b_dev.d_minor < 8) | |
78 | addr =<< 1; /* RJS03 */ | |
79 | HSADDR->hscs2 = bp->b_dev.d_minor & 07; | |
80 | rhstart(bp, &HSADDR->hsda, addr<<1, &HSADDR->hsbae); | |
81 | } | |
82 | ||
83 | hsintr() | |
84 | { | |
85 | register struct buf *bp; | |
86 | ||
87 | if (hstab.d_active == 0) | |
88 | return; | |
89 | bp = hstab.d_actf; | |
90 | hstab.d_active = 0; | |
91 | if(HSADDR->hscs1 & ERR){ /* error bit */ | |
92 | deverror(bp, HSADDR->hscs2, 0); | |
93 | HSADDR->hscs1 = RCLR|GO; | |
94 | if (++hstab.d_errcnt <= 10) { | |
95 | hsstart(); | |
96 | return; | |
97 | } | |
98 | bp->b_flags =| B_ERROR; | |
99 | } | |
100 | hstab.d_errcnt = 0; | |
101 | hstab.d_actf = bp->av_forw; | |
102 | iodone(bp); | |
103 | hsstart(); | |
104 | } | |
105 | ||
106 | hsread(dev) | |
107 | { | |
108 | ||
109 | physio(hsstrategy, &rhsbuf, dev, B_READ); | |
110 | } | |
111 | ||
112 | hswrite(dev) | |
113 | { | |
114 | ||
115 | physio(hsstrategy, &rhsbuf, dev, B_WRITE); | |
116 | } |