fixed ifdef botch
[unix-history] / usr / src / sys / vax / mba / hp.c
CommitLineData
21d26e19 1/* hp.c 4.79 83/06/19 */
b70e4030
BJ
2
3#ifdef HPDEBUG
6ac24ecd 4int hpdebug;
b70e4030
BJ
5#endif
6#ifdef HPBDEBUG
7int hpbdebug;
8#endif
04b9d53d 9
66b4fb09 10#include "hp.h"
a5cc519e 11#if NHP > 0
04b9d53d 12/*
b19f1d3a 13 * HP disk driver for RP0x+RMxx+ML11
1b81ee79
BJ
14 *
15 * TODO:
b70e4030 16 * check RM80 skip sector handling when ECC's occur later
d565635a 17 * check offset recovery handling
b70e4030
BJ
18 * see if DCLR and/or RELEASE set attention status
19 * print bits of mr && mr2 symbolically
04b9d53d 20 */
961945a8 21#include "../machine/pte.h"
04b9d53d
BJ
22
23#include "../h/param.h"
24#include "../h/systm.h"
41888f16 25#include "../h/dk.h"
04b9d53d
BJ
26#include "../h/buf.h"
27#include "../h/conf.h"
28#include "../h/dir.h"
29#include "../h/user.h"
30#include "../h/map.h"
c895c266 31#include "../vax/mtpr.h"
80e7c811 32#include "../h/vm.h"
e3b4b145 33#include "../h/cmap.h"
b70e4030 34#include "../h/dkbad.h"
942f05a9 35#include "../h/ioctl.h"
deb8980a 36#include "../h/uio.h"
04b9d53d 37
f13af4da 38#include "../vax/dkio.h"
c895c266
BJ
39#include "../vaxmba/mbareg.h"
40#include "../vaxmba/mbavar.h"
41#include "../vaxmba/hpreg.h"
04b9d53d 42
b81fd3e8
BJ
43/* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
44struct size {
04b9d53d
BJ
45 daddr_t nblocks;
46 int cyloff;
d07ce937 47} rp06_sizes[8] = {
5c777efe
BJ
48 15884, 0, /* A=cyl 0 thru 37 */
49 33440, 38, /* B=cyl 38 thru 117 */
50 340670, 0, /* C=cyl 0 thru 814 */
d07ce937
SL
51 15884, 118, /* D=cyl 118 thru 155 */
52 55936, 156, /* E=cyl 156 thru 289 */
53 219384, 290, /* F=cyl 290 thru 814 */
e897671e 54 291280, 118, /* G=cyl 118 thru 814 */
04b9d53d 55 0, 0,
d07ce937
SL
56}, rp05_sizes[8] = {
57 15884, 0, /* A=cyl 0 thru 37 */
58 33440, 38, /* B=cyl 38 thru 117 */
59 171798, 0, /* C=cyl 0 thru 410 */
60 15884, 118, /* D=cyl 118 thru 155 */
61 55936, 156, /* E=cyl 156 thru 289 */
62 50512, 290, /* F=cyl 290 thru 410 */
63 122408, 118, /* G=cyl 118 thru 410 */
64 0, 0,
65}, rm03_sizes[8] = {
5c777efe 66 15884, 0, /* A=cyl 0 thru 99 */
d07ce937 67 33440, 100, /* B=cyl 100 thru 308 */
5c777efe 68 131680, 0, /* C=cyl 0 thru 822 */
d07ce937
SL
69 15884, 309, /* D=cyl 309 thru 408 */
70 55936, 409, /* E=cyl 409 thru 758 */
71 10144, 759, /* F=cyl 759 thru 822 */
d07ce937 72 82144, 309, /* G=cyl 309 thru 822 */
04b9d53d 73 0, 0,
d07ce937 74}, rm05_sizes[8] = {
5c777efe
BJ
75 15884, 0, /* A=cyl 0 thru 26 */
76 33440, 27, /* B=cyl 27 thru 81 */
e83ccfd7 77 500384, 0, /* C=cyl 0 thru 822 */
5c777efe
BJ
78 15884, 562, /* D=cyl 562 thru 588 */
79 55936, 589, /* E=cyl 589 thru 680 */
e897671e
BJ
80 86240, 681, /* F=cyl 681 thru 822 */
81 158592, 562, /* G=cyl 562 thru 822 */
5c777efe 82 291346, 82, /* H=cyl 82 thru 561 */
b81fd3e8
BJ
83}, rm80_sizes[8] = {
84 15884, 0, /* A=cyl 0 thru 36 */
85 33440, 37, /* B=cyl 37 thru 114 */
86 242606, 0, /* C=cyl 0 thru 558 */
d07ce937
SL
87 15884, 115, /* D=cyl 115 thru 151 */
88 55936, 152, /* E=cyl 152 thru 280 */
89 120559, 281, /* F=cyl 281 thru 558 */
90 192603, 115, /* G=cyl 115 thru 558 */
b81fd3e8 91 0, 0,
d07ce937 92}, rp07_sizes[8] = {
822a683f 93 15884, 0, /* A=cyl 0 thru 9 */
d07ce937
SL
94 66880, 10, /* B=cyl 10 thru 51 */
95 1008000, 0, /* C=cyl 0 thru 629 */
96 15884, 235, /* D=cyl 235 thru 244 */
97 307200, 245, /* E=cyl 245 thru 436 */
98 308650, 437, /* F=cyl 437 thru 629 */
99 631850, 235, /* G=cyl 235 thru 629 */
100 291346, 52, /* H=cyl 52 thru 234 */
101}, cdc9775_sizes[8] = {
102 15884, 0, /* A=cyl 0 thru 12 */
103 66880, 13, /* B=cyl 13 thru 65 */
104 1079040, 0, /* C=cyl 0 thru 842 */
105 15884, 294, /* D=cyl 294 thru 306 */
106 307200, 307, /* E=cyl 307 thru 546 */
107 378784, 547, /* F=cyl 547 thru 842 */
108 702624, 294, /* G=cyl 294 thru 842 */
109 291346, 66, /* H=cyl 66 thru 293 */
110}, cdc9730_sizes[8] = {
822a683f
SL
111 15884, 0, /* A=cyl 0 thru 49 */
112 33440, 50, /* B=cyl 50 thru 154 */
113 263360, 0, /* C=cyl 0 thru 822 */
d07ce937
SL
114 15884, 155, /* D=cyl 155 thru 204 */
115 55936, 205, /* E=cyl 205 thru 379 */
116 141664, 380, /* F=cyl 380 thru 822 */
117 213664, 155, /* G=cyl 155 thru 822 */
822a683f 118 0, 0,
d07ce937 119}, capricorn_sizes[8] = {
822a683f
SL
120 15884, 0, /* A=cyl 0 thru 31 */
121 33440, 32, /* B=cyl 32 thru 97 */
122 524288, 0, /* C=cyl 0 thru 1023 */
d07ce937
SL
123 15884, 668, /* D=cyl 668 thru 699 */
124 55936, 700, /* E=cyl 700 thru 809 */
125 109472, 810, /* F=cyl 810 thru 1023 */
126 182176, 668, /* G=cyl 668 thru 1023 */
822a683f 127 291346, 98, /* H=cyl 98 thru 667 */
d07ce937 128}, eagle_sizes[8] = {
d07ce937
SL
129 15884, 0, /* A=cyl 0 thru 16 */
130 66880, 17, /* B=cyl 17 thru 86 */
abf739bc 131 808320, 0, /* C=cyl 0 thru 841 */
d07ce937
SL
132 15884, 391, /* D=cyl 391 thru 407 */
133 307200, 408, /* E=cyl 408 thru 727 */
abf739bc
SL
134 109296, 728, /* F=cyl 728 thru 841 */
135 432816, 391, /* G=cyl 391 thru 841 */
d07ce937 136 291346, 87, /* H=cyl 87 thru 390 */
21d26e19 137}, ampex_sizes[8] = {
f68569f0
SL
138 15884, 0, /* A=cyl 0 thru 26 */
139 33440, 27, /* B=cyl 27 thru 81 */
16639614 140 495520, 0, /* C=cyl 0 thru 814 */
f68569f0
SL
141 15884, 562, /* D=cyl 562 thru 588 */
142 55936, 589, /* E=cyl 589 thru 680 */
16639614
HS
143 81312, 681, /* F=cyl 681 thru 814 */
144 153664, 562, /* G=cyl 562 thru 814 */
f68569f0 145 291346, 82, /* H=cyl 82 thru 561 */
04b9d53d 146};
b81fd3e8 147/* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
04b9d53d 148
822a683f
SL
149/*
150 * Table for converting Massbus drive types into
151 * indices into the partition tables. Slots are
152 * left for those drives devined from other means
153 * (e.g. SI, AMPEX, etc.).
154 */
155short hptypes[] = {
156#define HPDT_RM03 0
157 MBDT_RM03,
158#define HPDT_RM05 1
159 MBDT_RM05,
160#define HPDT_RP06 2
161 MBDT_RP06,
162#define HPDT_RM80 3
163 MBDT_RM80,
28b0477e
SL
164#define HPDT_RP04 4
165 MBDT_RP04,
166#define HPDT_RP05 5
822a683f 167 MBDT_RP05,
28b0477e 168#define HPDT_RP07 6
822a683f 169 MBDT_RP07,
28b0477e 170#define HPDT_ML11A 7
822a683f 171 MBDT_ML11A,
28b0477e 172#define HPDT_ML11B 8
822a683f 173 MBDT_ML11B,
28b0477e 174#define HPDT_9775 9
822a683f 175 -1,
28b0477e 176#define HPDT_9730 10
822a683f 177 -1,
28b0477e 178#define HPDT_CAPRICORN 11
822a683f 179 -1,
28b0477e 180#define HPDT_EAGLE 12
e74d4c15 181 -1,
28b0477e 182#define HPDT_9300 13
f68569f0 183 -1,
28b0477e 184#define HPDT_RM02 14
e74d4c15 185 MBDT_RM02, /* beware, actually capricorn or eagle */
822a683f
SL
186 0
187};
4a4e3072
BJ
188struct mba_device *hpinfo[NHP];
189int hpattach(),hpustart(),hpstart(),hpdtint();
b81fd3e8 190struct mba_driver hpdriver =
4a4e3072
BJ
191 { hpattach, 0, hpustart, hpstart, hpdtint, 0,
192 hptypes, "hp", 0, hpinfo };
b81fd3e8 193
fb93d0ee
SL
194/*
195 * Beware, sdist and rdist are not well tuned
196 * for many of the drives listed in this table.
197 * Try patching things with something i/o intensive
198 * running and watch iostat.
199 */
b81fd3e8 200struct hpst {
fb93d0ee
SL
201 short nsect; /* # sectors/track */
202 short ntrak; /* # tracks/cylinder */
203 short nspc; /* # sector/cylinders */
204 short ncyl; /* # cylinders */
205 struct size *sizes; /* partition tables */
206 short sdist; /* seek distance metric */
207 short rdist; /* rotational distance metric */
b81fd3e8 208} hpst[] = {
fb93d0ee
SL
209 { 32, 5, 32*5, 823, rm03_sizes, 3, 4 }, /* RM03 */
210 { 32, 19, 32*19, 823, rm05_sizes, 3, 4 }, /* RM05 */
211 { 22, 19, 22*19, 815, rp06_sizes, 3, 4 }, /* RP06 */
212 { 31, 14, 31*14, 559, rm80_sizes, 3, 4 }, /* RM80 */
28b0477e 213 { 22, 19, 22*19, 411, rp05_sizes, 3, 4 }, /* RP04 */
fb93d0ee
SL
214 { 22, 19, 22*19, 411, rp05_sizes, 3, 4 }, /* RP05 */
215 { 50, 32, 50*32, 630, rp07_sizes, 7, 8 }, /* RP07 */
216 { 1, 1, 1, 1, 0, 0, 0 }, /* ML11A */
217 { 1, 1, 1, 1, 0, 0, 0 }, /* ML11B */
218 { 32, 40, 32*40, 843, cdc9775_sizes, 3, 4 }, /* 9775 */
219 { 32, 10, 32*10, 823, cdc9730_sizes, 3, 4 }, /* 9730 */
220 { 32, 16, 32*16, 1024, capricorn_sizes,7, 8 }, /* Capricorn */
221 { 48, 20, 48*20, 842, eagle_sizes, 7, 8 }, /* EAGLE */
21d26e19 222 { 32, 19, 32*19, 815, ampex_sizes, 3, 4 }, /* 9300 */
b81fd3e8
BJ
223};
224
804f6eab 225u_char hp_offset[16] = {
d565635a
BJ
226 HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400,
227 HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800,
228 HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200,
229 0, 0, 0, 0,
04b9d53d
BJ
230};
231
804f6eab 232struct buf rhpbuf[NHP];
b70e4030
BJ
233struct buf bhpbuf[NHP];
234struct dkbad hpbad[NHP];
c983ca83
SL
235
236struct hpsoftc {
237 u_char sc_hpinit; /* drive initialized */
238 u_char sc_recal; /* recalibrate state */
239 u_char sc_hdr; /* next i/o includes header */
240 u_char sc_doseeks; /* perform explicit seeks */
241 daddr_t sc_mlsize; /* ML11 size */
242} hpsoftc[NHP];
04b9d53d
BJ
243
244#define b_cylin b_resid
245
b19f1d3a
BJ
246/* #define ML11 0 to remove ML11 support */
247#define ML11 (hptypes[mi->mi_type] == MBDT_ML11A)
248#define RP06 (hptypes[mi->mi_type] <= MBDT_RP06)
249#define RM80 (hptypes[mi->mi_type] == MBDT_RM80)
250
0be277a1
SL
251#define MASKREG(reg) ((reg)&0xffff)
252
04b9d53d
BJ
253#ifdef INTRLVE
254daddr_t dkblock();
255#endif
71236e46 256
4a4e3072
BJ
257/*ARGSUSED*/
258hpattach(mi, slave)
2be84ab1 259 register struct mba_device *mi;
71236e46 260{
822a683f 261
2be84ab1
SL
262 mi->mi_type = hpmaptype(mi);
263 if (!ML11 && mi->mi_dk >= 0) {
264 struct hpst *st = &hpst[mi->mi_type];
265
266 dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256);
267 }
268}
269
270/*
271 * Map apparent MASSBUS drive type into manufacturer
272 * specific configuration. For SI controllers this is done
273 * based on codes in the serial number register. For
274 * EMULEX controllers, the track and sector attributes are
275 * used when the drive type is an RM02 (not supported by DEC).
276 */
277hpmaptype(mi)
278 register struct mba_device *mi;
279{
280 register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
281 register int type = mi->mi_type;
822a683f
SL
282
283 /*
f68569f0 284 * Model-byte processing for SI controllers.
822a683f
SL
285 * NB: Only deals with RM03 and RM05 emulations.
286 */
2be84ab1
SL
287 if (type == HPDT_RM03 || type == HPDT_RM05) {
288 int hpsn = hpaddr->hpsn;
822a683f 289
822a683f 290 if ((hpsn & SIMB_LU) != mi->mi_drive)
2be84ab1 291 return (type);
822a683f
SL
292 switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) {
293
294 case SI9775D:
f68569f0 295 printf("hp%d: 9775 (direct)\n", mi->mi_unit);
2be84ab1 296 type = HPDT_9775;
822a683f
SL
297 break;
298
299 case SI9730D:
f68569f0 300 printf("hp%d: 9730 (direct)\n", mi->mi_unit);
2be84ab1 301 type = HPDT_9730;
822a683f
SL
302 break;
303
dae6f30b 304 /*
f68569f0
SL
305 * Beware, since the only SI controller we
306 * have has a 9300 instead of a 9766, we map the
307 * drive type into the 9300. This means that
308 * on a 9766 you lose the last 8 cylinders (argh).
dae6f30b 309 */
822a683f 310 case SI9766:
f68569f0
SL
311 printf("hp%d: 9300\n", mi->mi_unit);
312 type = HPDT_9300;
822a683f
SL
313 break;
314
315 case SI9762:
316 printf("hp%d: 9762\n", mi->mi_unit);
2be84ab1 317 type = HPDT_RM03;
822a683f 318 break;
f68569f0
SL
319
320 case SICAPD:
321 printf("hp%d: capricorn\n", mi->mi_unit);
322 type = HPDT_CAPRICORN;
323 break;
324
325 case SI9751D:
326 printf("hp%d: eagle\n", mi->mi_unit);
327 type = HPDT_EAGLE;
328 break;
822a683f 329 }
2be84ab1
SL
330 return (type);
331 }
822a683f
SL
332
333 /*
2be84ab1 334 * EMULEX SC750 or SC780. Poke the holding register.
822a683f 335 */
2be84ab1
SL
336 if (type == HPDT_RM02) {
337 int ntracks, nsectors;
338
a02e9248
SL
339 hpaddr->hpof = HPOF_FMT22;
340 mbclrattn(mi);
822a683f
SL
341 hpaddr->hpcs1 = HP_NOP;
342 hpaddr->hphr = HPHR_MAXTRAK;
0be277a1 343 ntracks = MASKREG(hpaddr->hphr) + 1;
7ca1a4fe 344 if (ntracks == 16) {
822a683f 345 printf("hp%d: capricorn\n", mi->mi_unit);
2be84ab1
SL
346 type = HPDT_CAPRICORN;
347 goto done;
348 }
28b0477e
SL
349 if (ntracks == 19) {
350 printf("hp%d: 9300\n", mi->mi_unit);
351 type = HPDT_9300;
352 goto done;
353 }
2be84ab1
SL
354 hpaddr->hpcs1 = HP_NOP;
355 hpaddr->hphr = HPHR_MAXSECT;
0be277a1 356 nsectors = MASKREG(hpaddr->hphr) + 1;
a02e9248 357 if (ntracks == 20 && nsectors == 48) {
2be84ab1 358 type = HPDT_EAGLE;
d07ce937 359 printf("hp%d: eagle\n", mi->mi_unit);
a02e9248 360 goto done;
2be84ab1 361 }
a02e9248 362 printf("hp%d: ntracks %d, nsectors %d: unknown device\n",
28b0477e 363 mi->mi_unit, ntracks, nsectors);
2be84ab1 364done:
822a683f 365 hpaddr->hpcs1 = HP_DCLR|HP_GO;
a02e9248 366 mbclrattn(mi); /* conservative */
2be84ab1
SL
367 return (type);
368 }
822a683f 369
2be84ab1
SL
370 /*
371 * Map all ML11's to the same type. Also calculate
372 * transfer rates based on device characteristics.
373 */
374 if (type == HPDT_ML11A || type == HPDT_ML11B) {
c983ca83
SL
375 register struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
376 register int trt;
b19f1d3a 377
c983ca83 378 sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ;
b19f1d3a 379 if ((hpaddr->hpmr & HPMR_ARRTYP) == 0)
c983ca83 380 sc->sc_mlsize >>= 2;
b19f1d3a
BJ
381 if (mi->mi_dk >= 0) {
382 trt = (hpaddr->hpmr & HPMR_TRT) >> 8;
383 dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt));
384 }
2be84ab1 385 type = HPDT_ML11A;
b19f1d3a 386 }
2be84ab1 387 return (type);
71236e46
BJ
388}
389
473a2e47
BJ
390hpopen(dev)
391 dev_t dev;
392{
393 register int unit = minor(dev) >> 3;
394 register struct mba_device *mi;
395
396 if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0)
397 return (ENXIO);
398 return (0);
399}
400
04b9d53d 401hpstrategy(bp)
b81fd3e8 402 register struct buf *bp;
04b9d53d 403{
4a4e3072 404 register struct mba_device *mi;
b81fd3e8
BJ
405 register struct hpst *st;
406 register int unit;
04b9d53d 407 long sz, bn;
b81fd3e8 408 int xunit = minor(bp->b_dev) & 07;
530d0032 409 int s;
04b9d53d 410
04b9d53d
BJ
411 sz = bp->b_bcount;
412 sz = (sz+511) >> 9;
413 unit = dkunit(bp);
b81fd3e8
BJ
414 if (unit >= NHP)
415 goto bad;
416 mi = hpinfo[unit];
3f3a34c3 417 if (mi == 0 || mi->mi_alive == 0)
b81fd3e8
BJ
418 goto bad;
419 st = &hpst[mi->mi_type];
b19f1d3a 420 if (ML11) {
c983ca83
SL
421 struct hpsoftc *sc = &hpsoftc[unit];
422
b19f1d3a 423 if (bp->b_blkno < 0 ||
c983ca83 424 dkblock(bp)+sz > sc->sc_mlsize)
b19f1d3a
BJ
425 goto bad;
426 bp->b_cylin = 0;
427 } else {
428 if (bp->b_blkno < 0 ||
429 (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
430 goto bad;
431 bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
432 }
530d0032 433 s = spl5();
b81fd3e8
BJ
434 disksort(&mi->mi_tab, bp);
435 if (mi->mi_tab.b_active == 0)
436 mbustart(mi);
530d0032 437 splx(s);
b81fd3e8
BJ
438 return;
439
440bad:
441 bp->b_flags |= B_ERROR;
442 iodone(bp);
443 return;
04b9d53d
BJ
444}
445
b81fd3e8 446hpustart(mi)
4a4e3072 447 register struct mba_device *mi;
04b9d53d 448{
804f6eab 449 register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
b81fd3e8 450 register struct buf *bp = mi->mi_tab.b_actf;
a02e9248 451 register struct hpst *st;
c983ca83 452 struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
04b9d53d 453 daddr_t bn;
a0eab615 454 int sn, dist;
04b9d53d 455
a02e9248 456 st = &hpst[mi->mi_type];
b70e4030 457 hpaddr->hpcs1 = 0;
804f6eab 458 if ((hpaddr->hpcs1&HP_DVA) == 0)
b81fd3e8 459 return (MBU_BUSY);
c983ca83 460 if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) {
b70e4030 461 struct buf *bbp = &bhpbuf[mi->mi_unit];
b70e4030 462
c983ca83 463 sc->sc_hpinit = 1;
804f6eab 464 hpaddr->hpcs1 = HP_DCLR|HP_GO;
27a897a2
BJ
465 if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive))
466 printf("DCLR attn\n");
804f6eab 467 hpaddr->hpcs1 = HP_PRESET|HP_GO;
b19f1d3a
BJ
468 if (!ML11)
469 hpaddr->hpof = HPOF_FMT22;
27a897a2 470 mbclrattn(mi);
b19f1d3a
BJ
471 if (!ML11) {
472 bbp->b_flags = B_READ|B_BUSY;
473 bbp->b_dev = bp->b_dev;
474 bbp->b_bcount = 512;
475 bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit];
476 bbp->b_blkno = st->ncyl*st->nspc - st->nsect;
477 bbp->b_cylin = st->ncyl - 1;
478 mi->mi_tab.b_actf = bbp;
479 bbp->av_forw = bp;
480 bp = bbp;
481 }
04b9d53d 482 }
71236e46 483 if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1)
b81fd3e8 484 return (MBU_DODATA);
b19f1d3a
BJ
485 if (ML11)
486 return (MBU_DODATA);
d565635a 487 if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY)
b81fd3e8 488 return (MBU_DODATA);
3f3a34c3
BJ
489 bn = dkblock(bp);
490 sn = bn%st->nspc;
fb93d0ee 491 sn = (sn + st->nsect - st->sdist) % st->nsect;
0be277a1 492 if (bp->b_cylin == MASKREG(hpaddr->hpdc)) {
5d3fd70b 493 if (sc->sc_doseeks)
b81fd3e8 494 return (MBU_DODATA);
0be277a1 495 dist = (MASKREG(hpaddr->hpla) >> 6) - st->nsect + 1;
b81fd3e8
BJ
496 if (dist < 0)
497 dist += st->nsect;
fb93d0ee 498 if (dist > st->nsect - st->rdist)
b81fd3e8 499 return (MBU_DODATA);
0801d37f
BJ
500 } else
501 hpaddr->hpdc = bp->b_cylin;
5d3fd70b 502 if (sc->sc_doseeks)
804f6eab 503 hpaddr->hpcs1 = HP_SEEK|HP_GO;
41888f16
BJ
504 else {
505 hpaddr->hpda = sn;
804f6eab 506 hpaddr->hpcs1 = HP_SEARCH|HP_GO;
41888f16 507 }
b81fd3e8 508 return (MBU_STARTED);
04b9d53d
BJ
509}
510
b81fd3e8 511hpstart(mi)
4a4e3072 512 register struct mba_device *mi;
04b9d53d 513{
804f6eab 514 register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
b81fd3e8
BJ
515 register struct buf *bp = mi->mi_tab.b_actf;
516 register struct hpst *st = &hpst[mi->mi_type];
c983ca83 517 struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
04b9d53d 518 daddr_t bn;
b81fd3e8 519 int sn, tn;
04b9d53d 520
04b9d53d 521 bn = dkblock(bp);
b19f1d3a
BJ
522 if (ML11)
523 hpaddr->hpda = bn;
524 else {
525 sn = bn%st->nspc;
526 tn = sn/st->nsect;
527 sn %= st->nsect;
528 hpaddr->hpdc = bp->b_cylin;
529 hpaddr->hpda = (tn << 8) + sn;
530 }
c983ca83 531 if (sc->sc_hdr) {
b19f1d3a
BJ
532 if (bp->b_flags & B_READ)
533 return (HP_RHDR|HP_GO);
534 else
535 return (HP_WHDR|HP_GO);
536 }
537 return (0);
04b9d53d
BJ
538}
539
a0eab615 540hpdtint(mi, mbsr)
4a4e3072 541 register struct mba_device *mi;
a0eab615 542 int mbsr;
04b9d53d 543{
804f6eab 544 register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv;
b81fd3e8 545 register struct buf *bp = mi->mi_tab.b_actf;
a02e9248 546 register struct hpst *st;
705c30ac 547 register int er1, er2;
c983ca83 548 struct hpsoftc *sc = &hpsoftc[mi->mi_unit];
e34bc1ef 549 int retry = 0;
b81fd3e8 550
a02e9248
SL
551 st = &hpst[mi->mi_type];
552 if (bp->b_flags&B_BAD && hpecc(mi, CONT))
553 return (MBD_RESTARTED);
a0eab615 554 if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) {
b70e4030 555#ifdef HPDEBUG
6ac24ecd 556 if (hpdebug) {
b70e4030
BJ
557 int dc = hpaddr->hpdc, da = hpaddr->hpda;
558
559 printf("hperr: bp %x cyl %d blk %d as %o ",
560 bp, bp->b_cylin, bp->b_blkno,
561 hpaddr->hpas&0xff);
0be277a1 562 printf("dc %x da %x\n",MASKREG(dc), MASKREG(da));
6ac24ecd
BJ
563 printf("errcnt %d ", mi->mi_tab.b_errcnt);
564 printf("mbsr=%b ", mbsr, mbsr_bits);
565 printf("er1=%b er2=%b\n",
566 hpaddr->hper1, HPER1_BITS,
567 hpaddr->hper2, HPER2_BITS);
568 DELAY(1000000);
569 }
b70e4030 570#endif
6cee54a8 571 er1 = hpaddr->hper1;
705c30ac
BJ
572 er2 = hpaddr->hper2;
573 if (er1 & HPER1_HCRC) {
6cee54a8 574 er1 &= ~(HPER1_HCE|HPER1_FER);
705c30ac
BJ
575 er2 &= ~HPER2_BSE;
576 }
6cee54a8 577 if (er1&HPER1_WLE) {
fd2cb420 578 printf("hp%d: write locked\n", dkunit(bp));
e34bc1ef 579 bp->b_flags |= B_ERROR;
0be277a1 580 } else if (MASKREG(er1) == HPER1_FER && RP06 && !sc->sc_hdr) {
b19f1d3a 581 if (hpecc(mi, BSE))
0be277a1
SL
582 return (MBD_RESTARTED);
583 goto hard;
e34bc1ef 584 } else if (++mi->mi_tab.b_errcnt > 27 ||
a0eab615 585 mbsr & MBSR_HARD ||
6cee54a8 586 er1 & HPER1_HARD ||
c983ca83 587 sc->sc_hdr ||
705c30ac 588 (!ML11 && (er2 & HPER2_HARD))) {
8fa6acee
HS
589 /*
590 * If HCRC the header is screwed up and the sector
0be277a1
SL
591 * might be in the bad sector table, better check..
592 *
8fa6acee
HS
593 * Note: If the header is screwed up on a skip sector
594 * track, then the appropriate replacement sector
0be277a1 595 * cannot be found.
8fa6acee 596 */
0be277a1
SL
597 if (er1&HPER1_HCRC && !ML11 && hpecc(mi, BSE))
598 return (MBD_RESTARTED);
b70e4030 599hard:
49d28f6f 600 if (ML11)
0be277a1 601 bp->b_blkno = MASKREG(hpaddr->hpda);
49d28f6f 602 else
0be277a1
SL
603 bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc +
604 (MASKREG(hpaddr->hpda) >> 8) * st->nsect +
605 (hpaddr->hpda&0x1f);
fd2cb420 606 harderr(bp, "hp");
e83ccfd7
BJ
607 if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC)))
608 printf("mbsr=%b ", mbsr, mbsr_bits);
b70e4030 609 printf("er1=%b er2=%b",
e34bc1ef
BJ
610 hpaddr->hper1, HPER1_BITS,
611 hpaddr->hper2, HPER2_BITS);
b70e4030 612 if (hpaddr->hpmr)
0be277a1 613 printf(" mr=%o", MASKREG(hpaddr->hpmr));
b70e4030 614 if (hpaddr->hpmr2)
0be277a1 615 printf(" mr2=%o", MASKREG(hpaddr->hpmr2));
b70e4030 616 printf("\n");
b81fd3e8 617 bp->b_flags |= B_ERROR;
49d28f6f 618 retry = 0;
c983ca83 619 sc->sc_recal = 0;
705c30ac 620 } else if ((er2 & HPER2_BSE) && !ML11) {
b70e4030 621 if (hpecc(mi, BSE))
0be277a1 622 return (MBD_RESTARTED);
a02e9248 623 goto hard;
705c30ac 624 } else if (RM80 && er2&HPER2_SSE) {
b620b354 625 (void) hpecc(mi, SSE);
c9e9b65b 626 return (MBD_RESTARTED);
6cee54a8 627 } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) {
b70e4030 628 if (hpecc(mi, ECC))
e34bc1ef
BJ
629 return (MBD_RESTARTED);
630 /* else done */
631 } else
632 retry = 1;
633 hpaddr->hpcs1 = HP_DCLR|HP_GO;
b19f1d3a
BJ
634 if (ML11) {
635 if (mi->mi_tab.b_errcnt >= 16)
636 goto hard;
637 } else if ((mi->mi_tab.b_errcnt&07) == 4) {
e34bc1ef 638 hpaddr->hpcs1 = HP_RECAL|HP_GO;
c983ca83 639 sc->sc_recal = 1;
0be277a1 640 return (MBD_RESTARTED);
04b9d53d 641 }
e34bc1ef
BJ
642 if (retry)
643 return (MBD_RETRY);
644 }
b70e4030 645#ifdef HPDEBUG
6ac24ecd 646 else
c983ca83
SL
647 if (hpdebug && sc->sc_recal) {
648 printf("recal %d ", sc->sc_recal);
6ac24ecd
BJ
649 printf("errcnt %d\n", mi->mi_tab.b_errcnt);
650 printf("mbsr=%b ", mbsr, mbsr_bits);
651 printf("er1=%b er2=%b\n",
652 hpaddr->hper1, HPER1_BITS,
653 hpaddr->hper2, HPER2_BITS);
654 }
b70e4030 655#endif
c983ca83 656 switch (sc->sc_recal) {
d565635a
BJ
657
658 case 1:
659 hpaddr->hpdc = bp->b_cylin;
660 hpaddr->hpcs1 = HP_SEEK|HP_GO;
c983ca83 661 sc->sc_recal++;
b70e4030 662 return (MBD_RESTARTED);
d565635a
BJ
663 case 2:
664 if (mi->mi_tab.b_errcnt < 16 ||
6ac24ecd 665 (bp->b_flags & B_READ) == 0)
d565635a
BJ
666 goto donerecal;
667 hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22;
668 hpaddr->hpcs1 = HP_OFFSET|HP_GO;
c983ca83 669 sc->sc_recal++;
d565635a
BJ
670 return (MBD_RESTARTED);
671 donerecal:
a6442a2f 672 case 3:
c983ca83 673 sc->sc_recal = 0;
3dbaa9da
BJ
674 return (MBD_RETRY);
675 }
c983ca83 676 sc->sc_hdr = 0;
0be277a1 677 bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr);
aeecd470 678 if (mi->mi_tab.b_errcnt >= 16) {
d565635a
BJ
679 /*
680 * This is fast and occurs rarely; we don't
681 * bother with interrupts.
682 */
804f6eab 683 hpaddr->hpcs1 = HP_RTC|HP_GO;
d565635a 684 while (hpaddr->hpds & HPDS_PIP)
b81fd3e8
BJ
685 ;
686 mbclrattn(mi);
04b9d53d 687 }
b19f1d3a
BJ
688 if (!ML11) {
689 hpaddr->hpof = HPOF_FMT22;
690 hpaddr->hpcs1 = HP_RELEASE|HP_GO;
691 }
b81fd3e8 692 return (MBD_DONE);
04b9d53d
BJ
693}
694
deb8980a 695hpread(dev, uio)
804f6eab 696 dev_t dev;
deb8980a 697 struct uio *uio;
04b9d53d 698{
804f6eab 699 register int unit = minor(dev) >> 3;
04b9d53d 700
804f6eab 701 if (unit >= NHP)
23458a62
BJ
702 return (ENXIO);
703 return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio));
04b9d53d
BJ
704}
705
406ddcbe 706hpwrite(dev, uio)
804f6eab 707 dev_t dev;
406ddcbe 708 struct uio *uio;
04b9d53d 709{
804f6eab 710 register int unit = minor(dev) >> 3;
04b9d53d 711
804f6eab 712 if (unit >= NHP)
23458a62
BJ
713 return (ENXIO);
714 return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio));
04b9d53d
BJ
715}
716
b19f1d3a 717/*ARGSUSED*/
942f05a9 718hpioctl(dev, cmd, data, flag)
b19f1d3a
BJ
719 dev_t dev;
720 int cmd;
942f05a9 721 caddr_t data;
b19f1d3a
BJ
722 int flag;
723{
724
725 switch (cmd) {
942f05a9 726
b19f1d3a 727 case DKIOCHDR: /* do header read/write */
c983ca83 728 hpsoftc[minor(dev) >> 3].sc_hdr = 1;
473a2e47 729 return (0);
b19f1d3a
BJ
730
731 default:
473a2e47 732 return (ENXIO);
b19f1d3a
BJ
733 }
734}
735
b70e4030 736hpecc(mi, flag)
4a4e3072 737 register struct mba_device *mi;
b70e4030 738 int flag;
04b9d53d 739{
b81fd3e8 740 register struct mba_regs *mbp = mi->mi_mba;
804f6eab 741 register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv;
b81fd3e8 742 register struct buf *bp = mi->mi_tab.b_actf;
b70e4030
BJ
743 register struct hpst *st = &hpst[mi->mi_type];
744 int npf, o;
b81fd3e8 745 int bn, cn, tn, sn;
fa1d69d6 746 int bcr;
80e7c811 747
0be277a1 748 bcr = MASKREG(mbp->mba_bcr);
fa1d69d6
BJ
749 if (bcr)
750 bcr |= 0xffff0000; /* sxt */
b70e4030
BJ
751 if (flag == CONT)
752 npf = bp->b_error;
753 else
b70e4030 754 npf = btop(bcr + bp->b_bcount);
80e7c811 755 o = (int)bp->b_un.b_addr & PGOFSET;
80e7c811 756 bn = dkblock(bp);
80e7c811 757 cn = bp->b_cylin;
b70e4030 758 sn = bn%(st->nspc) + npf;
b81fd3e8
BJ
759 tn = sn/st->nsect;
760 sn %= st->nsect;
761 cn += tn/st->ntrak;
762 tn %= st->ntrak;
b70e4030 763 switch (flag) {
ba783028 764 case ECC: {
b70e4030
BJ
765 register int i;
766 caddr_t addr;
767 struct pte mpte;
768 int bit, byte, mask;
769
770 npf--; /* because block in error is previous block */
771 printf("hp%d%c: soft ecc sn%d\n", dkunit(bp),
772 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
0be277a1
SL
773 mask = MASKREG(rp->hpec2);
774 i = MASKREG(rp->hpec1) - 1; /* -1 makes 0 origin */
b70e4030
BJ
775 bit = i&07;
776 i = (i&~07)>>3;
777 byte = i + o;
778 while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
779 mpte = mbp->mba_map[npf+btop(byte)];
780 addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET);
781 putmemc(addr, getmemc(addr)^(mask<<bit));
782 byte++;
783 i++;
784 bit -= 8;
785 }
786 if (bcr == 0)
787 return (0);
089adc9d 788 npf++;
b70e4030
BJ
789 break;
790 }
791
792 case SSE:
793 rp->hpof |= HPOF_SSEI;
794 mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
795 break;
796
b70e4030
BJ
797 case BSE:
798#ifdef HPBDEBUG
799 if (hpbdebug)
800 printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn);
801#endif
0be277a1
SL
802 if (rp->hpof&HPOF_SSEI)
803 sn++;
b70e4030 804 if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0)
0be277a1 805 return (0);
b70e4030
BJ
806 bp->b_flags |= B_BAD;
807 bp->b_error = npf + 1;
808 bn = st->ncyl*st->nspc - st->nsect - 1 - bn;
809 cn = bn/st->nspc;
810 sn = bn%st->nspc;
811 tn = sn/st->nsect;
812 sn %= st->nsect;
813 mbp->mba_bcr = -512;
8fa6acee 814 rp->hpof &= ~HPOF_SSEI;
b70e4030
BJ
815#ifdef HPBDEBUG
816 if (hpbdebug)
817 printf("revector to cn %d tn %d sn %d\n", cn, tn, sn);
818#endif
819 break;
820
821 case CONT:
822#ifdef HPBDEBUG
823 if (hpbdebug)
824 printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn);
825#endif
826 npf = bp->b_error;
827 bp->b_flags &= ~B_BAD;
828 mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf));
0be277a1
SL
829 if (MASKREG(mbp->mba_bcr) == 0)
830 return (0);
b70e4030 831 break;
b70e4030
BJ
832 }
833 rp->hpcs1 = HP_DCLR|HP_GO;
8eb99b75 834 if (rp->hpof&HPOF_SSEI)
c9e9b65b 835 sn++;
80e7c811
BJ
836 rp->hpdc = cn;
837 rp->hpda = (tn<<8) + sn;
838 mbp->mba_sr = -1;
b70e4030
BJ
839 mbp->mba_var = (int)ptob(npf) + o;
840 rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO;
841 mi->mi_tab.b_errcnt = 0; /* error has been corrected */
80e7c811 842 return (1);
04b9d53d 843}
e3b4b145
BJ
844
845#define DBSIZE 20
846
847hpdump(dev)
848 dev_t dev;
849{
4a4e3072 850 register struct mba_device *mi;
b81fd3e8 851 register struct mba_regs *mba;
804f6eab 852 struct hpdevice *hpaddr;
e3b4b145 853 char *start;
b81fd3e8
BJ
854 int num, unit;
855 register struct hpst *st;
e3b4b145
BJ
856
857 num = maxfree;
858 start = 0;
859 unit = minor(dev) >> 3;
1b81ee79
BJ
860 if (unit >= NHP)
861 return (ENXIO);
b81fd3e8 862#define phys(a,b) ((b)((int)(a)&0x7fffffff))
4a4e3072 863 mi = phys(hpinfo[unit],struct mba_device *);
1b81ee79
BJ
864 if (mi == 0 || mi->mi_alive == 0)
865 return (ENXIO);
b81fd3e8 866 mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
a0eab615 867 mba->mba_cr = MBCR_INIT;
804f6eab 868 hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive];
d565635a 869 if ((hpaddr->hpds & HPDS_VV) == 0) {
804f6eab
BJ
870 hpaddr->hpcs1 = HP_DCLR|HP_GO;
871 hpaddr->hpcs1 = HP_PRESET|HP_GO;
d565635a 872 hpaddr->hpof = HPOF_FMT22;
e3b4b145 873 }
b81fd3e8 874 st = &hpst[mi->mi_type];
1b81ee79
BJ
875 if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks)
876 return (EINVAL);
e3b4b145 877 while (num > 0) {
b81fd3e8 878 register struct pte *hpte = mba->mba_map;
e3b4b145 879 register int i;
b81fd3e8 880 int blk, cn, sn, tn;
e3b4b145
BJ
881 daddr_t bn;
882
883 blk = num > DBSIZE ? DBSIZE : num;
884 bn = dumplo + btop(start);
b81fd3e8
BJ
885 cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff;
886 sn = bn%st->nspc;
887 tn = sn/st->nsect;
888 sn = sn%st->nsect;
e3b4b145
BJ
889 hpaddr->hpdc = cn;
890 hpaddr->hpda = (tn << 8) + sn;
891 for (i = 0; i < blk; i++)
892 *(int *)hpte++ = (btop(start)+i) | PG_V;
b81fd3e8
BJ
893 mba->mba_sr = -1;
894 mba->mba_bcr = -(blk*NBPG);
895 mba->mba_var = 0;
804f6eab 896 hpaddr->hpcs1 = HP_WCOM | HP_GO;
d565635a 897 while ((hpaddr->hpds & HPDS_DRY) == 0)
e3b4b145 898 ;
d565635a 899 if (hpaddr->hpds&HPDS_ERR)
1b81ee79 900 return (EIO);
e3b4b145
BJ
901 start += blk*NBPG;
902 num -= blk;
903 }
904 return (0);
905}
cf83ab8e
SL
906
907hpsize(dev)
908 dev_t dev;
909{
910 int unit = minor(dev) >> 3;
911 struct mba_device *mi;
912 struct hpst *st;
913
914 if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0)
915 return (-1);
916 st = &hpst[mi->mi_type];
917 return ((int)st->sizes[minor(dev) & 07].nblocks);
918}
a5cc519e 919#endif