projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| da7c5cc6 KM |
1 | /* |
| 2 | * Copyright (c) 1982 Regents of the University of California. | |
| 3 | * All rights reserved. The Berkeley software License Agreement | |
| 4 | * specifies the terms and conditions for redistribution. | |
| 5 | * | |
| 6 | * @(#)nexus.h 6.2 (Berkeley) %G% | |
| 7 | */ | |
| 9c319e96 BJ |
8 | |
| 9 | /* | |
| 10 | * Information about nexus's. | |
| 53e0a350 BJ |
11 | * |
| 12 | * Each machine has an address of backplane slots (nexi). | |
| 13 | * Each nexus is some type of adapter, whose code is the low | |
| 14 | * byte of the first word of the adapter address space. | |
| 15 | * At boot time the system looks through the array of available | |
| 16 | * slots and finds the interconnects for the machine. | |
| 9c319e96 BJ |
17 | */ |
| 18 | #if VAX780 | |
| 19 | #define NNEX780 16 | |
| 20 | #define NEX780 ((struct nexus *)0x20000000) | |
| 21 | #endif | |
| 22 | #if VAX750 | |
| 53e0a350 BJ |
23 | #define NNEX750 16 |
| 24 | #define NEX750 ((struct nexus *)0xf20000) | |
| 9c319e96 | 25 | #endif |
| 10f66600 SL |
26 | #if VAX730 |
| 27 | #define NNEX730 16 | |
| 28 | #define NEX730 ((struct nexus *)0xf20000) | |
| ea4d5e21 | 29 | #endif |
| 9c319e96 BJ |
30 | #define NEXSIZE 0x2000 |
| 31 | ||
| 53e0a350 | 32 | #define MAXNNEXUS 16 |
| b6e137a6 BJ |
33 | |
| 34 | #ifndef LOCORE | |
| 9c319e96 BJ |
35 | struct nexus { |
| 36 | union nexcsr { | |
| 37 | long nex_csr; | |
| 38 | u_char nex_type; | |
| 39 | } nexcsr; | |
| 40 | long nex_pad[NEXSIZE / sizeof (long) - 1]; | |
| 41 | }; | |
| 42 | #ifdef KERNEL | |
| 53e0a350 | 43 | struct nexus nexus[MAXNNEXUS]; |
| 9c319e96 | 44 | #endif |
| b5fa1937 | 45 | #endif |
| 9c319e96 BJ |
46 | |
| 47 | /* | |
| 48 | * Bits in high word of nexus's. | |
| 49 | */ | |
| 50 | #define SBI_PARFLT (1<<31) /* sbi parity fault */ | |
| 51 | #define SBI_WSQFLT (1<<30) /* write sequence fault */ | |
| f7c4179b | 52 | #define SBI_URDFLT (1<<29) /* unexpected read data fault */ |
| 9c319e96 BJ |
53 | #define SBI_ISQFLT (1<<28) /* interlock sequence fault */ |
| 54 | #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */ | |
| 55 | #define SBI_XMTFLT (1<<26) /* transmit fault */ | |
| 56 | ||
| 57 | #define NEX_CFGFLT (0xfc000000) | |
| 58 | ||
| f7c4179b BJ |
59 | #ifndef LOCORE |
| 60 | #if VAX780 | |
| 61 | #define NEXFLT_BITS \ | |
| 62 | "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT" | |
| f7c4179b BJ |
63 | #endif |
| 64 | #endif | |
| 65 | ||
| 9c319e96 BJ |
66 | #define NEX_APD (1<<23) /* adaptor power down */ |
| 67 | #define NEX_APU (1<<22) /* adaptor power up */ | |
| 68 | ||
| 69 | #define MBA_OT (1<<21) /* overtemperature */ | |
| 70 | ||
| 71 | #define UBA_UBINIT (1<<18) /* unibus init */ | |
| 72 | #define UBA_UBPDN (1<<17) /* unibus power down */ | |
| 73 | #define UBA_UBIC (1<<16) /* unibus initialization complete */ | |
| 74 | ||
| 75 | /* | |
| 76 | * Types for nex_type. | |
| 77 | */ | |
| 53e0a350 | 78 | #define NEX_ANY 0 /* pseudo for handling 11/750 */ |
| 9c319e96 BJ |
79 | #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */ |
| 80 | #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */ | |
| 81 | #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */ | |
| 82 | #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */ | |
| 83 | #define NEX_MBA 0x20 /* Massbus adaptor */ | |
| 84 | #define NEX_UBA0 0x28 /* Unibus adaptor */ | |
| 53e0a350 | 85 | #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */ |
| 9c319e96 BJ |
86 | #define NEX_UBA2 0x2a |
| 87 | #define NEX_UBA3 0x2b | |
| 88 | #define NEX_DR32 0x30 /* DR32 user i'face to SBI */ | |
| 096eb64d | 89 | #define NEX_CI 0x38 /* CI adaptor */ |
| 9c319e96 BJ |
90 | #define NEX_MPM0 0x40 /* Multi-port mem */ |
| 91 | #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */ | |
| 92 | #define NEX_MPM2 0x42 | |
| 93 | #define NEX_MPM3 0x43 | |
| 096eb64d SL |
94 | #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */ |
| 95 | #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */ | |
| 96 | #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */ | |
| 97 | #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */ | |
| 98 | #define NEX_MEM64I 0x6c /* 64K chips, interleaved */ |