[unix-history] / usr / src / sys / vax / if / if_dmc.c

/*	if_dmc.c	4.9	82/03/30	*/

#include "dmc.h"
#if NDMC > 0
#define printd if(dmcdebug)printf
int dmcdebug = 1;
/*
 * DMC11 device driver, internet version
 *
 * TODO
 *	allow more than one outstanding read or write.
 */

#include "../h/param.h"
#include "../h/systm.h"
#include "../h/mbuf.h"
#include "../h/pte.h"
#include "../h/buf.h"
#include "../h/tty.h"
#include "../h/protosw.h"
#include "../h/socket.h"
#include "../h/ubareg.h"
#include "../h/ubavar.h"
#include "../h/cpu.h"
#include "../h/mtpr.h"
#include "../h/vmmac.h"
#include "../net/in.h"
#include "../net/in_systm.h"
#include "../net/if.h"
#include "../net/if_uba.h"
#include "../net/if_dmc.h"
#include "../net/ip.h"
#include "../net/ip_var.h"
#include "../net/route.h"

/*
 * Driver information for auto-configuration stuff.
 */
int	dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
struct	uba_device *dmcinfo[NDMC];
u_short	dmcstd[] = { 0 };
struct	uba_driver dmcdriver =
	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };

#define	DMC_AF	0xff		/* 8 bits of address type in ui_flags */
#define	DMC_NET	0xff00		/* 8 bits of net number in ui_flags */

/*
 * DMC software status per interface.
 *
 * Each interface is referenced by a network interface structure,
 * sc_if, which the routing code uses to locate the interface.
 * This structure contains the output queue for the interface, its address, ...
 * We also have, for each interface, a UBA interface structure, which
 * contains information about the UNIBUS resources held by the interface:
 * map registers, buffered data paths, etc.  Information is cached in this
 * structure for use by the if_uba.c routines in running the interface
 * efficiently.
 */
struct dmc_softc {
	struct	ifnet sc_if;		/* network-visible interface */
	struct	ifuba sc_ifuba;		/* UNIBUS resources */
	short	sc_flag;		/* flags */
	short	sc_oactive;		/* output active */
	int	sc_ubinfo;		/* UBA mapping info for base table */
	struct clist sc_que;		/* command queue */
} dmc_softc[NDMC];

/* flags */
#define	DMCRUN		01
#define	DMCBMAPPED	02		/* base table mapped */

struct dmc_base {
	short	d_base[128];		/* DMC base table */
} dmc_base[NDMC];

#define	loword(x)	((short *)&x)[0]
#define	hiword(x)	((short *)&x)[1]

dmcprobe(reg)
	caddr_t reg;
{
	register int br, cvec;
	register struct dmcdevice *addr = (struct dmcdevice *)reg;
	register int i;

COUNT(DMCPROBE);
#ifdef lint
	br = 0; cvec = br; br = cvec;
	dmcrint(0); dmcxint(0);
#endif
	addr->bsel1 = DMC_MCLR;
	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
		;
	if ((addr->bsel1 & DMC_RUN) == 0)
		return (0);
	addr->bsel1 &= ~DMC_MCLR;
	addr->bsel0 = DMC_RQI|DMC_IEI;
	DELAY(100000);
	addr->bsel1 = DMC_MCLR;
	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
		;
	return (1);
}

/*
 * Interface exists: make available by filling in network interface
 * record.  System will initialize the interface when it is ready
 * to accept packets.
 */
dmcattach(ui)
	register struct uba_device *ui;
{
	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
	register struct sockaddr_in *sin;

COUNT(DMCATTACH);
	sc->sc_if.if_unit = ui->ui_unit;
	sc->sc_if.if_name = "dmc";
	sc->sc_if.if_mtu = DMCMTU;
	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
	sc->sc_if.if_host[0] = 17;	/* random number */
	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
	sin->sa_family = AF_INET;
	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
	sc->sc_if.if_init = dmcinit;
	sc->sc_if.if_output = dmcoutput;
	sc->sc_if.if_ubareset = dmcreset;
	sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP;
	if_attach(&sc->sc_if);
}

/*
 * Reset of interface after UNIBUS reset.
 * If interface is on specified UBA, reset it's state.
 */
dmcreset(unit, uban)
	int unit, uban;
{
	register struct uba_device *ui;

COUNT(DMCRESET);
	if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
	    ui->ui_ubanum != uban)
		return;
	printf(" dmc%d", unit);
	dmcinit(unit);
}

/*
 * Initialization of interface; reinitialize UNIBUS usage.
 */
dmcinit(unit)
	int unit;
{
	register struct dmc_softc *sc = &dmc_softc[unit];
	register struct uba_device *ui = dmcinfo[unit];
	register struct dmcdevice *addr;
	int base;

COUNT(DMCINIT);
	printd("dmcinit\n");
	if ((sc->sc_flag&DMCBMAPPED) == 0) {
		sc->sc_ubinfo = uballoc(ui->ui_ubanum,
		    (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
		sc->sc_flag |= DMCBMAPPED;
	}
	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
	    (int)btoc(DMCMTU)) == 0) {
		printf("dmc%d: can't initialize\n", unit);
		sc->sc_if.if_flags &= ~IFF_UP;
		return;
	}
	addr = (struct dmcdevice *)ui->ui_addr;
	addr->bsel2 |= DMC_IEO;
	base = sc->sc_ubinfo & 0x3ffff;
	printd("  base 0x%x\n", base);
	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
	dmcload(sc, DMC_CNTLI, 0, 0);
	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
	printd("  first read queued, addr 0x%x\n", base);
	sc->sc_if.if_flags |= IFF_UP;
	/* set up routing table entry */
	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
		rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
			RTF_DIRECT|RTF_HOST|RTF_UP);
		sc->sc_if.if_flags |= IFF_ROUTE;
	}
}

/*
 * Start output on interface.  Get another datagram
 * to send from the interface queue and map it to
 * the interface before starting output.
 */
dmcstart(dev)
	dev_t dev;
{
	int unit = minor(dev);
	struct uba_device *ui = dmcinfo[unit];
	register struct dmc_softc *sc = &dmc_softc[unit];
	int addr, len;
	struct mbuf *m;

COUNT(DMCSTART);
	printd("dmcstart\n");
	/*
	 * Dequeue a request and map it to the UNIBUS.
	 * If no more requests, just return.
	 */
	IF_DEQUEUE(&sc->sc_if.if_snd, m);
	if (m == 0)
		return;
	len = if_wubaput(&sc->sc_ifuba, m);

	/*
	 * Have request mapped to UNIBUS for transmission.
	 * Purge any stale data from this BDP and start the output.
	 */
	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
		UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
	printd("  len %d, addr 0x%x, ", len, addr);
	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
	sc->sc_oactive = 1;
}

/*
 * Utility routine to load the DMC device registers.
 */
dmcload(sc, type, w0, w1)
	register struct dmc_softc *sc;
	int type, w0, w1;
{
	register struct dmcdevice *addr;
	register int unit, sps, n;

COUNT(DMCLOAD);
	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
	unit = sc - dmc_softc;
	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	sps = spl5();
	if ((n = sc->sc_que.c_cc) == 0)
		addr->bsel0 = type | DMC_RQI;
	else
		(void) putc(type | DMC_RQI, &sc->sc_que);
	(void) putw(w0, &sc->sc_que);
	(void) putw(w1, &sc->sc_que);
	if (n == 0)
		dmcrint(unit);
	splx(sps);
}

/*
 * DMC interface receiver interrupt.
 * Ready to accept another command,
 * pull one off the command queue.
 */
dmcrint(unit)
	int unit;
{
	register struct dmc_softc *sc;
	register struct dmcdevice *addr;
	register int n;
	int w0, w1; /* DEBUG */

COUNT(DMCRINT);
	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	sc = &dmc_softc[unit];
	while (addr->bsel0&DMC_RDYI) {
		w0 = getw(&sc->sc_que); /* DEBUG */
		addr->sel4 = w0; /* DEBUG */
		w1 = getw(&sc->sc_que); /* DEBUG */
		addr->sel6 = w1; /* DEBUG */
		/* DEBUG
		addr->sel4 = getw(&sc->sc_que);
		addr->sel6 = getw(&sc->sc_que);
		DEBUG */
		addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
		printd("  w0 0x%x, w1 0x%x\n", w0, w1);
		while (addr->bsel0&DMC_RDYI)
			;
		if (sc->sc_que.c_cc == 0)
			return;
		addr->bsel0 = getc(&sc->sc_que);
		n = RDYSCAN;
		while (n-- && (addr->bsel0&DMC_RDYI) == 0)
			;
	}
	if (sc->sc_que.c_cc)
		addr->bsel0 |= DMC_IEI;
}

/*
 * DMC interface transmitter interrupt.
 * A transfer has completed, check for errors.
 * If it was a read, notify appropriate protocol.
 * If it was a write, pull the next one off the queue.
 */
dmcxint(unit)
	int unit;
{
	register struct dmc_softc *sc;
	struct uba_device *ui = dmcinfo[unit];
	struct dmcdevice *addr;
	struct mbuf *m;
	register struct ifqueue *inq;
	int arg, cmd, len;

COUNT(DMCXINT);
	addr = (struct dmcdevice *)ui->ui_addr;
	arg = addr->sel6;
	cmd = addr->bsel2&7;
	addr->bsel2 &= ~DMC_RDYO;
	sc = &dmc_softc[unit];
	printd("dmcxint\n");
	switch (cmd) {

	case DMC_OUR:
		/*
		 * A read has completed.  Purge input buffered
		 * data path.  Pass packet to type specific
		 * higher-level input routine.
		 */
		sc->sc_if.if_ipackets++;
		if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
			UBAPURGE(sc->sc_ifuba.ifu_uba,
				sc->sc_ifuba.ifu_r.ifrw_bdp);
		len = arg & DMC_CCOUNT;
		printd("  read done, len %d\n", len);
		switch (ui->ui_flags & DMC_AF) {
#ifdef INET
		case AF_INET:
			schednetisr(NETISR_IP);
			inq = &ipintrq;
			break;
#endif

		default:
			printf("dmc%d: unknown address type %d\n", unit,
			    ui->ui_flags & DMC_AF);
			goto setup;
		}
		m = if_rubaget(&sc->sc_ifuba, len, 0);
		if (m == 0)
			goto setup;
		if (IF_QFULL(inq)) {
			IF_DROP(inq);
			(void) m_freem(m);
		} else
			IF_ENQUEUE(inq, m);

setup:
		arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
		dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
		return;

	case DMC_OUX:
		/*
		 * A write has completed, start another
		 * transfer if there is more data to send.
		 */
		if (sc->sc_oactive == 0)
			return;		/* SHOULD IT BE A FATAL ERROR? */
		printd("  write done\n");
		sc->sc_if.if_opackets++;
		sc->sc_oactive = 0;
		if (sc->sc_ifuba.ifu_xtofree) {
			(void) m_freem(sc->sc_ifuba.ifu_xtofree);
			sc->sc_ifuba.ifu_xtofree = 0;
		}
		if (sc->sc_if.if_snd.ifq_head == 0)
			return;
		dmcstart(unit);
		return;

	case DMC_CNTLO:
		arg &= DMC_CNTMASK;
		if (arg&DMC_FATAL) {
			addr->bsel1 = DMC_MCLR;
			sc->sc_flag &= ~DMCRUN;
			/*** DO SOMETHING TO RESTART DEVICE ***/
			printf("DMC FATAL ERROR 0%o\n", arg);
		} else {
			/* ACCUMULATE STATISTICS */
			printf("DMC SOFT ERROR 0%o\n", arg);
		}
		return;

	default:
		printf("dmc%d: bad control %o\n", unit, cmd);
	}
}

/*
 * DMC output routine.
 * Just send the data, header was supplied by
 * upper level protocol routines.
 */
dmcoutput(ifp, m, dst)
	register struct ifnet *ifp;
	register struct mbuf *m;
	struct sockaddr *dst;
{
	struct uba_device *ui = dmcinfo[ifp->if_unit];
	int s;

COUNT(DMCOUTPUT);
	printd("dmcoutput\n");
	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
		printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
		m_freem(m);
		return (0);
	}
	s = splimp();
	if (IF_QFULL(&ifp->if_snd)) {
		IF_DROP(&ifp->if_snd);
		m_freem(m);
		splx(s);
		return (0);
	}
	IF_ENQUEUE(&ifp->if_snd, m);
	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
		dmcstart(ifp->if_unit);
	splx(s);
	return (1);
}
Commit	Line	Data
fc74f0c9	1	/* if_dmc.c 4.9 82/03/30 */
63665984 BJ	2
	3	#include "dmc.h"
	4	#if NDMC > 0
	5	#define printd if(dmcdebug)printf
	6	int dmcdebug = 1;
	7	/*
	8	* DMC11 device driver, internet version
	9	*
	10	* TODO
	11	* allow more than one outstanding read or write.
	12	*/
	13
	14	#include "../h/param.h"
	15	#include "../h/systm.h"
	16	#include "../h/mbuf.h"
	17	#include "../h/pte.h"
	18	#include "../h/buf.h"
	19	#include "../h/tty.h"
	20	#include "../h/protosw.h"
	21	#include "../h/socket.h"
	22	#include "../h/ubareg.h"
	23	#include "../h/ubavar.h"
	24	#include "../h/cpu.h"
	25	#include "../h/mtpr.h"
	26	#include "../h/vmmac.h"
	27	#include "../net/in.h"
	28	#include "../net/in_systm.h"
	29	#include "../net/if.h"
	30	#include "../net/if_uba.h"
791be395	31	#include "../net/if_dmc.h"
63665984 BJ	32	#include "../net/ip.h"
63665984 BJ	33	#include "../net/ip_var.h"
f6311fb6	34	#include "../net/route.h"
63665984 BJ	35
	36	/*
	37	* Driver information for auto-configuration stuff.
	38	*/
	39	int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
	40	struct uba_device *dmcinfo[NDMC];
	41	u_short dmcstd[] = { 0 };
	42	struct uba_driver dmcdriver =
	43	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
	44
ee787340	45	#define DMC_AF 0xff /* 8 bits of address type in ui_flags */
63665984 BJ	46	#define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */
	47
	48	/*
	49	* DMC software status per interface.
	50	*
	51	* Each interface is referenced by a network interface structure,
	52	* sc_if, which the routing code uses to locate the interface.
	53	* This structure contains the output queue for the interface, its address, ...
	54	* We also have, for each interface, a UBA interface structure, which
	55	* contains information about the UNIBUS resources held by the interface:
	56	* map registers, buffered data paths, etc. Information is cached in this
	57	* structure for use by the if_uba.c routines in running the interface
	58	* efficiently.
	59	*/
	60	struct dmc_softc {
	61	struct ifnet sc_if; /* network-visible interface */
	62	struct ifuba sc_ifuba; /* UNIBUS resources */
	63	short sc_flag; /* flags */
	64	short sc_oactive; /* output active */
	65	int sc_ubinfo; /* UBA mapping info for base table */
	66	struct clist sc_que; /* command queue */
	67	} dmc_softc[NDMC];
	68
	69	/* flags */
	70	#define DMCRUN 01
	71	#define DMCBMAPPED 02 /* base table mapped */
	72
	73	struct dmc_base {
	74	short d_base[128]; /* DMC base table */
	75	} dmc_base[NDMC];
	76
	77	#define loword(x) ((short *)&x)[0]
	78	#define hiword(x) ((short *)&x)[1]
	79
	80	dmcprobe(reg)
	81	caddr_t reg;
	82	{
	83	register int br, cvec;
	84	register struct dmcdevice addr = (struct dmcdevice )reg;
	85	register int i;
	86
f6311fb6	87	COUNT(DMCPROBE);
63665984 BJ	88	#ifdef lint
	89	br = 0; cvec = br; br = cvec;
	90	dmcrint(0); dmcxint(0);
	91	#endif
	92	addr->bsel1 = DMC_MCLR;
	93	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
	94	;
	95	if ((addr->bsel1 & DMC_RUN) == 0)
ee787340	96	return (0);
63665984 BJ	97	addr->bsel1 &= ~DMC_MCLR;
	98	addr->bsel0 = DMC_RQI\|DMC_IEI;
	99	DELAY(100000);
	100	addr->bsel1 = DMC_MCLR;
	101	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
	102	;
ee787340	103	return (1);
63665984 BJ	104	}
	105
	106	/*
	107	* Interface exists: make available by filling in network interface
	108	* record. System will initialize the interface when it is ready
	109	* to accept packets.
	110	*/
	111	dmcattach(ui)
	112	register struct uba_device *ui;
	113	{
	114	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
ee787340	115	register struct sockaddr_in *sin;
63665984	116
f6311fb6	117	COUNT(DMCATTACH);
63665984 BJ	118	sc->sc_if.if_unit = ui->ui_unit;
	119	sc->sc_if.if_name = "dmc";
	120	sc->sc_if.if_mtu = DMCMTU;
	121	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
	122	sc->sc_if.if_host[0] = 17; /* random number */
ee787340 SL	123	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
	124	sin->sa_family = AF_INET;
	125	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
63665984 BJ	126	sc->sc_if.if_init = dmcinit;
	127	sc->sc_if.if_output = dmcoutput;
	128	sc->sc_if.if_ubareset = dmcreset;
791be395	129	sc->sc_ifuba.ifuba_flags = UBA_NEEDBDP;
63665984 BJ	130	if_attach(&sc->sc_if);
	131	}
	132
	133	/*
	134	* Reset of interface after UNIBUS reset.
	135	* If interface is on specified UBA, reset it's state.
	136	*/
	137	dmcreset(unit, uban)
	138	int unit, uban;
	139	{
	140	register struct uba_device *ui;
	141
f6311fb6	142	COUNT(DMCRESET);
63665984 BJ	143	if (unit >= NDMC \|\| (ui = dmcinfo[unit]) == 0 \|\| ui->ui_alive == 0 \|\|
	144	ui->ui_ubanum != uban)
	145	return;
	146	printf(" dmc%d", unit);
	147	dmcinit(unit);
	148	}
	149
	150	/*
	151	* Initialization of interface; reinitialize UNIBUS usage.
	152	*/
	153	dmcinit(unit)
	154	int unit;
	155	{
	156	register struct dmc_softc *sc = &dmc_softc[unit];
	157	register struct uba_device *ui = dmcinfo[unit];
	158	register struct dmcdevice *addr;
	159	int base;
	160
f6311fb6	161	COUNT(DMCINIT);
63665984 BJ	162	printd("dmcinit\n");
	163	if ((sc->sc_flag&DMCBMAPPED) == 0) {
	164	sc->sc_ubinfo = uballoc(ui->ui_ubanum,
	165	(caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
	166	sc->sc_flag \|= DMCBMAPPED;
	167	}
	168	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
b3a74b5e	169	(int)btoc(DMCMTU)) == 0) {
63665984	170	printf("dmc%d: can't initialize\n", unit);
ee787340	171	sc->sc_if.if_flags &= ~IFF_UP;
63665984 BJ	172	return;
	173	}
	174	addr = (struct dmcdevice *)ui->ui_addr;
	175	addr->bsel2 \|= DMC_IEO;
	176	base = sc->sc_ubinfo & 0x3ffff;
	177	printd(" base 0x%x\n", base);
	178	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
	179	dmcload(sc, DMC_CNTLI, 0, 0);
	180	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	181	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)\|DMCMTU);
	182	printd(" first read queued, addr 0x%x\n", base);
ee787340	183	sc->sc_if.if_flags \|= IFF_UP;
f6311fb6 SL	184	/* set up routing table entry */
	185	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
	186	rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
fc74f0c9	187	RTF_DIRECT\|RTF_HOST\|RTF_UP);
f6311fb6 SL	188	sc->sc_if.if_flags \|= IFF_ROUTE;
f6311fb6 SL	189	}
63665984 BJ	190	}
	191
	192	/*
	193	* Start output on interface. Get another datagram
	194	* to send from the interface queue and map it to
	195	* the interface before starting output.
	196	*/
	197	dmcstart(dev)
	198	dev_t dev;
	199	{
	200	int unit = minor(dev);
	201	struct uba_device *ui = dmcinfo[unit];
	202	register struct dmc_softc *sc = &dmc_softc[unit];
	203	int addr, len;
	204	struct mbuf *m;
	205
f6311fb6	206	COUNT(DMCSTART);
63665984 BJ	207	printd("dmcstart\n");
	208	/*
	209	* Dequeue a request and map it to the UNIBUS.
	210	* If no more requests, just return.
	211	*/
	212	IF_DEQUEUE(&sc->sc_if.if_snd, m);
	213	if (m == 0)
	214	return;
	215	len = if_wubaput(&sc->sc_ifuba, m);
	216
	217	/*
	218	* Have request mapped to UNIBUS for transmission.
	219	* Purge any stale data from this BDP and start the output.
	220	*/
791be395 BJ	221	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
791be395 BJ	222	UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
63665984 BJ	223	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
	224	printd(" len %d, addr 0x%x, ", len, addr);
	225	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
	226	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)\|((addr>>2)&DMC_XMEM));
	227	sc->sc_oactive = 1;
	228	}
	229
	230	/*
	231	* Utility routine to load the DMC device registers.
	232	*/
	233	dmcload(sc, type, w0, w1)
	234	register struct dmc_softc *sc;
	235	int type, w0, w1;
	236	{
	237	register struct dmcdevice *addr;
	238	register int unit, sps, n;
	239
f6311fb6	240	COUNT(DMCLOAD);
63665984 BJ	241	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
	242	unit = sc - dmc_softc;
	243	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	244	sps = spl5();
	245	if ((n = sc->sc_que.c_cc) == 0)
	246	addr->bsel0 = type \| DMC_RQI;
	247	else
668cc26d SL	248	(void) putc(type \| DMC_RQI, &sc->sc_que);
	249	(void) putw(w0, &sc->sc_que);
	250	(void) putw(w1, &sc->sc_que);
63665984 BJ	251	if (n == 0)
	252	dmcrint(unit);
	253	splx(sps);
	254	}
	255
	256	/*
	257	* DMC interface receiver interrupt.
	258	* Ready to accept another command,
	259	* pull one off the command queue.
	260	*/
	261	dmcrint(unit)
	262	int unit;
	263	{
	264	register struct dmc_softc *sc;
	265	register struct dmcdevice *addr;
	266	register int n;
	267	int w0, w1; /* DEBUG */
	268
f6311fb6	269	COUNT(DMCRINT);
63665984 BJ	270	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	271	sc = &dmc_softc[unit];
	272	while (addr->bsel0&DMC_RDYI) {
	273	w0 = getw(&sc->sc_que); /* DEBUG */
	274	addr->sel4 = w0; /* DEBUG */
	275	w1 = getw(&sc->sc_que); /* DEBUG */
	276	addr->sel6 = w1; /* DEBUG */
	277	/* DEBUG
	278	addr->sel4 = getw(&sc->sc_que);
	279	addr->sel6 = getw(&sc->sc_que);
	280	DEBUG */
	281	addr->bsel0 &= ~(DMC_IEI\|DMC_RQI);
	282	printd(" w0 0x%x, w1 0x%x\n", w0, w1);
	283	while (addr->bsel0&DMC_RDYI)
	284	;
	285	if (sc->sc_que.c_cc == 0)
	286	return;
	287	addr->bsel0 = getc(&sc->sc_que);
	288	n = RDYSCAN;
	289	while (n-- && (addr->bsel0&DMC_RDYI) == 0)
	290	;
	291	}
	292	if (sc->sc_que.c_cc)
	293	addr->bsel0 \|= DMC_IEI;
	294	}
	295
	296	/*
	297	* DMC interface transmitter interrupt.
	298	* A transfer has completed, check for errors.
	299	* If it was a read, notify appropriate protocol.
	300	* If it was a write, pull the next one off the queue.
	301	*/
	302	dmcxint(unit)
	303	int unit;
	304	{
	305	register struct dmc_softc *sc;
	306	struct uba_device *ui = dmcinfo[unit];
	307	struct dmcdevice *addr;
	308	struct mbuf *m;
	309	register struct ifqueue *inq;
	310	int arg, cmd, len;
	311
f6311fb6	312	COUNT(DMCXINT);
63665984 BJ	313	addr = (struct dmcdevice *)ui->ui_addr;
	314	arg = addr->sel6;
	315	cmd = addr->bsel2&7;
	316	addr->bsel2 &= ~DMC_RDYO;
	317	sc = &dmc_softc[unit];
	318	printd("dmcxint\n");
	319	switch (cmd) {
	320
	321	case DMC_OUR:
	322	/*
	323	* A read has completed. Purge input buffered
	324	* data path. Pass packet to type specific
	325	* higher-level input routine.
	326	*/
	327	sc->sc_if.if_ipackets++;
791be395 BJ	328	if (sc->sc_ifuba.ifuba_flags & UBA_NEEDBDP)
	329	UBAPURGE(sc->sc_ifuba.ifu_uba,
	330	sc->sc_ifuba.ifu_r.ifrw_bdp);
63665984 BJ	331	len = arg & DMC_CCOUNT;
63665984 BJ	332	printd(" read done, len %d\n", len);
ee787340	333	switch (ui->ui_flags & DMC_AF) {
63665984	334	#ifdef INET
ee787340	335	case AF_INET:
9c8692e9	336	schednetisr(NETISR_IP);
63665984 BJ	337	inq = &ipintrq;
	338	break;
	339	#endif
	340
	341	default:
ee787340 SL	342	printf("dmc%d: unknown address type %d\n", unit,
ee787340 SL	343	ui->ui_flags & DMC_AF);
63665984 BJ	344	goto setup;
	345	}
	346	m = if_rubaget(&sc->sc_ifuba, len, 0);
	347	if (m == 0)
	348	goto setup;
1e977657 BJ	349	if (IF_QFULL(inq)) {
	350	IF_DROP(inq);
	351	(void) m_freem(m);
	352	} else
	353	IF_ENQUEUE(inq, m);
63665984 BJ	354
	355	setup:
	356	arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	357	dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) \| DMCMTU);
	358	return;
	359
	360	case DMC_OUX:
	361	/*
	362	* A write has completed, start another
	363	* transfer if there is more data to send.
	364	*/
	365	if (sc->sc_oactive == 0)
	366	return; /* SHOULD IT BE A FATAL ERROR? */
	367	printd(" write done\n");
	368	sc->sc_if.if_opackets++;
	369	sc->sc_oactive = 0;
	370	if (sc->sc_ifuba.ifu_xtofree) {
1e977657	371	(void) m_freem(sc->sc_ifuba.ifu_xtofree);
63665984 BJ	372	sc->sc_ifuba.ifu_xtofree = 0;
	373	}
	374	if (sc->sc_if.if_snd.ifq_head == 0)
	375	return;
	376	dmcstart(unit);
	377	return;
	378
	379	case DMC_CNTLO:
	380	arg &= DMC_CNTMASK;
	381	if (arg&DMC_FATAL) {
	382	addr->bsel1 = DMC_MCLR;
	383	sc->sc_flag &= ~DMCRUN;
	384	/* DO SOMETHING TO RESTART DEVICE */
	385	printf("DMC FATAL ERROR 0%o\n", arg);
	386	} else {
	387	/* ACCUMULATE STATISTICS */
	388	printf("DMC SOFT ERROR 0%o\n", arg);
	389	}
	390	return;
	391
	392	default:
	393	printf("dmc%d: bad control %o\n", unit, cmd);
	394	}
	395	}
	396
	397	/*
	398	* DMC output routine.
	399	* Just send the data, header was supplied by
	400	* upper level protocol routines.
	401	*/
ee787340	402	dmcoutput(ifp, m, dst)
63665984 BJ	403	register struct ifnet *ifp;
63665984 BJ	404	register struct mbuf *m;
ee787340	405	struct sockaddr *dst;
63665984 BJ	406	{
	407	struct uba_device *ui = dmcinfo[ifp->if_unit];
	408	int s;
	409
f6311fb6	410	COUNT(DMCOUTPUT);
63665984	411	printd("dmcoutput\n");
ee787340 SL	412	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
	413	printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
	414	m_freem(m);
63665984 BJ	415	return (0);
	416	}
	417	s = splimp();
1e977657 BJ	418	if (IF_QFULL(&ifp->if_snd)) {
1e977657 BJ	419	IF_DROP(&ifp->if_snd);
ee787340	420	m_freem(m);
1e977657 BJ	421	splx(s);
	422	return (0);
	423	}
63665984 BJ	424	IF_ENQUEUE(&ifp->if_snd, m);
	425	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
	426	dmcstart(ifp->if_unit);
	427	splx(s);
	428	return (1);
	429	}