projects / unix-history / blame
| Commit | Line | Data |
|---|---|---|
| fbfcdb0a BJ |
1 | /* ht.c 1.1 %G% */ |
| 2 | ||
| 3 | /* | |
| 4 | * TJU16 tape driver | |
| 5 | */ | |
| 6 | ||
| 7 | #include "../h/param.h" | |
| 8 | #include "../h/inode.h" | |
| 9 | #include "../h/mba.h" | |
| 10 | #include "saio.h" | |
| 11 | ||
| 12 | struct device | |
| 13 | { | |
| 14 | int htcs1; | |
| 15 | int htds; | |
| 16 | int hter; | |
| 17 | int htmr; | |
| 18 | int htas; | |
| 19 | int htfc; | |
| 20 | int htdt; | |
| 21 | int htck; | |
| 22 | int htsn; | |
| 23 | int httc; | |
| 24 | }; | |
| 25 | ||
| 26 | #define HTADDR ((struct device *)(PHYSMBA1 + MBA_ERB)) | |
| 27 | ||
| 28 | #define GO 01 | |
| 29 | #define WCOM 060 | |
| 30 | #define RCOM 070 | |
| 31 | #define NOP 0 | |
| 32 | #define WEOF 026 | |
| 33 | #define SFORW 030 | |
| 34 | #define SREV 032 | |
| 35 | #define ERASE 024 | |
| 36 | #define REW 06 | |
| 37 | #define DCLR 010 | |
| 38 | #define P800 01700 /* 800 + pdp11 mode */ | |
| 39 | #define P1600 02300 /* 1600 + pdp11 mode */ | |
| 40 | #define IENABLE 0100 | |
| 41 | #define RDY 0200 | |
| 42 | #define TM 04 | |
| 43 | #define DRY 0200 | |
| 44 | #define EOT 02000 | |
| 45 | #define CS 02000 | |
| 46 | #define COR 0100000 | |
| 47 | #define PES 040 | |
| 48 | #define WRL 04000 | |
| 49 | #define MOL 010000 | |
| 50 | #define ERR 040000 | |
| 51 | #define FCE 01000 | |
| 52 | #define TRE 040000 | |
| 53 | #define HARD 064023 /* UNS|OPI|NEF|FMT|RMR|ILR|ILF */ | |
| 54 | ||
| 55 | #define SIO 1 | |
| 56 | #define SSFOR 2 | |
| 57 | #define SSREV 3 | |
| 58 | #define SRETRY 4 | |
| 59 | #define SCOM 5 | |
| 60 | #define SOK 6 | |
| 61 | ||
| 62 | htopen(io) | |
| 63 | register struct iob *io; | |
| 64 | { | |
| 65 | register skip; | |
| 66 | int i; | |
| 67 | ||
| 68 | htinit(); | |
| 69 | htstrategy(io, REW); | |
| 70 | skip = io->i_boff; | |
| 71 | while (skip--) { | |
| 72 | io->i_cc = -1; | |
| 73 | while (htstrategy(io, SFORW)) | |
| 74 | ; | |
| 75 | i = 65536; | |
| 76 | while (--i) | |
| 77 | ; | |
| 78 | htstrategy(io, NOP); | |
| 79 | } | |
| 80 | } | |
| 81 | ||
| 82 | htclose(io) | |
| 83 | register struct iob *io; | |
| 84 | { | |
| 85 | htstrategy(io, REW); | |
| 86 | } | |
| 87 | ||
| 88 | htstrategy(io, func) | |
| 89 | register struct iob *io; | |
| 90 | { | |
| 91 | register int unit, den, errcnt, ds; | |
| 92 | short fc; | |
| 93 | ||
| 94 | unit = io->i_unit; | |
| 95 | errcnt = 0; | |
| 96 | retry: | |
| 97 | if(unit & 1) | |
| 98 | den = P1600; | |
| 99 | else | |
| 100 | den = P800; | |
| 101 | htquiet(); | |
| 102 | if((HTADDR->httc&03777) != den) | |
| 103 | HTADDR->httc = den; | |
| 104 | HTADDR->htfc = -io->i_cc; | |
| 105 | if (func == SREV) { | |
| 106 | HTADDR->htfc = -1; | |
| 107 | HTADDR->htcs1 = SREV | GO; | |
| 108 | return(0); | |
| 109 | } | |
| 110 | if (func == READ || func == WRITE) | |
| 111 | mbastart(io, HTADDR, func); | |
| 112 | else | |
| 113 | HTADDR->htcs1 = func | GO; | |
| 114 | htquiet(); | |
| 115 | ds = HTADDR->htds & TM; | |
| 116 | if (ds&TM) { | |
| 117 | htinit(); | |
| 118 | return(0); | |
| 119 | } | |
| 120 | if (ds&ERR) { | |
| 121 | if (errcnt == 0) | |
| 122 | printf("tape error: ds=%x, er=%x, mbasr=%x", | |
| 123 | HTADDR->htds, HTADDR->hter, PHYSMBA1->mba_sr); | |
| 124 | htinit(); | |
| 125 | if (errcnt == 10) { | |
| 126 | printf("\n"); | |
| 127 | return(-1); | |
| 128 | } | |
| 129 | errcnt++; | |
| 130 | htstrategy(io, SREV); | |
| 131 | goto retry; | |
| 132 | } | |
| 133 | if (errcnt) | |
| 134 | printf(" recovered by retry\n"); | |
| 135 | fc = HTADDR->htfc; | |
| 136 | return(io->i_cc+fc); | |
| 137 | } | |
| 138 | ||
| 139 | htinit() | |
| 140 | { | |
| 141 | ||
| 142 | HTADDR->htcs1 = DCLR|GO; | |
| 143 | } | |
| 144 | ||
| 145 | htquiet() | |
| 146 | { | |
| 147 | register int s; | |
| 148 | ||
| 149 | do | |
| 150 | s = HTADDR->htds; | |
| 151 | while ((s & RDY) == 0); | |
| 152 | } |