/* if_dmc.h 6.1 83/07/29 */
#define RDYSCAN 16 /* loop delay for RDYI after RQI */
#define DMC_WRITE 0 /* transmit block */
#define DMC_READ 4 /* read block */
#define DMC_RQI 0040 /* port request bit */
#define DMC_IEI 0100 /* enable input interrupts */
#define DMC_RDYI 0200 /* port ready */
#define DMC_MCLR 0100 /* DMC11 Master Clear */
#define DMC_RUN 0200 /* clock running */
#define DMC_OUX 0 /* transmit block */
#define DMC_OUR 4 /* read block */
#define DMC_IEO 0100 /* enable output interrupts */
#define DMC_RDYO 0200 /* port available */
/* defines for CNTLI mode */
#define DMC_HDPLX 02000 /* half duplex DDCMP operation */
#define DMC_SEC 04000 /* half duplex secondary station */
#define DMC_MAINT 00400 /* enter maintenance mode */
/* defines for BACCI/O and BASEI mode */
#define DMC_XMEM 0140000 /* xmem bit position */
#define DMC_CCOUNT 0037777 /* character count mask */
#define DMC_RESUME 0002000 /* resume (BASEI only) */
#define DMC_CNTMASK 01777