* Copyright (c) 1989, 1990 William F. Jolitz.
* Copyright (c) 1990 The Regents of the University of California.
* This code is derived from software contributed to Berkeley by
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* @(#)icu.s 7.2 (Berkeley) 5/21/91
* PATCHES MAGIC LEVEL PATCH THAT GOT US HERE
* -------------------- ----- ----------------------
* CURRENT PATCH LEVEL: 5 00167
* -------------------- ----- ----------------------
* 28 Nov 92 Frank MacLachlan Aligned addresses and data
* 24 Mar 93 Rodney W. Grimes Added interrupt counters for vmstat
* also stray and false intr counters added
* 20 Apr 93 Bruce Evans New npx-0.5 code
* 25 Apr 93 Bruce Evans Support new interrupt code (intr-0.1)
* Rodney W. Grimes Reimplement above patches..
* 17 May 93 Rodney W. Grimes Redid the interrupt counter stuff
* moved the counters to vectors.s so
* they are next to the name tables.
* 04 Jun 93 Bruce Evans Fixed irq_num vs id_num for multiple
* devices configed on the same irq with
* respect to ipending. Restructured
* not to use BUILD_VECTORS.
* Rodney W. Grimes softsio1 only works if you have sio
* serial driver, added #include sio.h
* and #ifdef NSIO > 0 to protect it.
* Vector interrupt control section
* XXX - this file is now misnamed. All spls are now soft and the only thing
* related to the hardware icu is that the bit numbering is the same in the
* soft priority masks as in the hard ones.
#define SOFTCLOCKMASK 0x8000
_cpl: .long 0xffff # current priority (all off)
_imen: .long 0xffff # interrupt mask enable (all off)
_highmask: .long HIGHMASK
.long vec0, vec1, vec2, vec3, vec4, vec5, vec6, vec7
.long vec8, vec9, vec10, vec11, vec12, vec13, vec14, vec15
#define GENSPL(name, mask, event) \
COUNT_EVENT(_intrcnt_spl, event) ; \
#define FASTSPL_VARMASK(varmask) \
COUNT_EVENT(_intrcnt_spl, 0)
bsfl %eax,%eax # slow, but not worth optimizing
jnc unpend_v_next # some intr cleared the in-memory bit
movl Vresume(,%eax,4),%eax
* XXX - must be some fastintr, need to register those too.
* Handle return from interrupt after device handler finishes
COUNT_EVENT(_intrcnt_spl, 1)
addl $4,%esp # discard unit arg
popl %eax # get previous priority
* Now interrupt frame is a trap frame!
* XXX - setting up the interrupt frame to be almost a stack frame is mostly
testl %edx,%edx # returning to zero priority?
jne 1f # nope, going to non-zero priority
testl %eax,%eax # check for softint s/traps
jmp test_resched # XXX - schedule jumps better
COUNT_EVENT(_intrcnt_spl, 2) # XXX
COUNT_EVENT(_intrcnt_spl, 3)
#include "../net/netisr.h"
#define DONET(s, c, event) ; \
COUNT_EVENT(_intrcnt_spl, event) ; \
COUNT_EVENT(_intrcnt_spl, 4)
* XXX - might need extra locking while testing reg copy of netisr, but
* interrupt routines setting it would not cause any new problems (since we
* don't loop, fresh bits will not be processed until the next doreti or spl0).
testl $~((1 << NETISR_SCLK) | (1 << NETISR_AST)),%eax
je test_ASTs # no net stuff, just temporary AST's
FASTSPL_VARMASK(_netmask)
DONET(NETISR_RAW, _rawintr, 5)
DONET(NETISR_IP, _ipintr, 6)
DONET(NETISR_IMP, _impintr, 7)
DONET(NETISR_NS, _nsintr, 8)
btrl $NETISR_SCLK,_netisr
COUNT_EVENT(_intrcnt_spl, 9)
* Back to an interrupt frame for a moment.
pushl $0 # previous cpl (probably not used)
pushl $0x7f # dummy unit number
addl $8,%esp # discard dummies
cmpl $0,_astpending # XXX - put it back in netisr to
je 2f # reduce the number of tests
testb $SEL_RPL_MASK,TRAPF_CS_OFF(%esp)
# to non-kernel (i.e., user)?
COUNT_EVENT(_intrcnt_spl, 10)
COUNT_EVENT(_intrcnt_spl, 11)
* Interrupt priority mechanism
* -- soft splXX masks with group mechanism (cpl)
* -- h/w masks for currently active or unused interrupts (imen)
* -- ipending = active interrupts currently masked by cpl
GENSPL(bio, _biomask, 12)
GENSPL(clock, $HIGHMASK, 13) /* splclock == splhigh ex for count */
GENSPL(high, $HIGHMASK, 14)
GENSPL(imp, _netmask, 15) /* splimp == splnet except for count */
GENSPL(net, _netmask, 16)
GENSPL(softclock, $SOFTCLOCKMASK, 17)
GENSPL(tty, _ttymask, 18)
COUNT_EVENT(_intrcnt_spl, 19)
pushl %eax # save old priority
testl $(1 << NETISR_RAW) | (1 << NETISR_IP),_netisr
je over_net_stuff_for_spl0
movl _netmask,%eax # mask off those network devices
movl %eax,_cpl # set new priority
* XXX - what about other net intrs?
DONET(NETISR_RAW, _rawintr, 20)
DONET(NETISR_IP, _ipintr, 21)
movl $0,_cpl # set new priority
popl %eax # return old priority
COUNT_EVENT(_intrcnt_spl, 22)
movl 4(%esp),%eax # new priority
je in_spl0 # going to "zero level" is special
COUNT_EVENT(_intrcnt_spl, 23)
movl _cpl,%edx # save old priority
movl %eax,_cpl # set new priority
movl %edx,%eax # return old priority
COUNT_EVENT(_intrcnt_spl, 24)
movl Vresume(,%eax,4),%edx
* We would prefer to call the intr handler directly here but that doesn't
* work for badly behaved handlers that want the interrupt frame. Also,
* there's a problem determining the unit number. We should change the
* interface so that the unit number is not determined at config time.
* XXX - must be some fastintr, need to register those too.
#define BUILD_VEC(irq_num) \
int $ICU_OFFSET + (irq_num) ; \
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