usr/src/sys/vax/uba/dhreg.h

/*
 * Copyright (c) 1982, 1986 Regents of the University of California.
 * All rights reserved.  The Berkeley software License Agreement
 * specifies the terms and conditions for redistribution.
 *
 *      @(#)dhreg.h     7.1 (Berkeley) 6/5/86
 */

/*
 * DH-11 device register definitions.
 */
struct dhdevice {
        union {
                short   dhcsr;          /* control-status register */
                char    dhcsrl;         /* low byte for line select */
        } un;
        short   dhrcr;                  /* receive character register */
        short   dhlpr;                  /* line parameter register */
        u_short dhcar;                  /* current address register */
        short   dhbcr;                  /* byte count register */
        u_short dhbar;                  /* buffer active register */
        short   dhbreak;                /* break control register */
        short   dhsilo;                 /* silo status register */
};

/* Bits in dhcsr */
#define DH_TI   0100000         /* transmit interrupt */
#define DH_SI   0040000         /* storage interrupt */
#define DH_TIE  0020000         /* transmit interrupt enable */
#define DH_SIE  0010000         /* storage interrupt enable */
#define DH_MC   0004000         /* master clear */
#define DH_NXM  0002000         /* non-existant memory */
#define DH_MM   0001000         /* maintenance mode */
#define DH_CNI  0000400         /* clear non-existant memory interrupt */
#define DH_RI   0000200         /* receiver interrupt */
#define DH_RIE  0000100         /* receiver interrupt enable */

/* Bits in dhlpr */
#define BITS6   01
#define BITS7   02
#define BITS8   03
#define TWOSB   04
#define PENABLE 020
/* DEC manuals incorrectly say this bit causes generation of even parity. */
#define OPAR    040
#define HDUPLX  040000

#define DH_IE   (DH_TIE|DH_SIE|DH_RIE)

/* Bits in dhrcr */
#define DH_PE           0010000         /* parity error */
#define DH_FE           0020000         /* framing error */
#define DH_DO           0040000         /* data overrun */