* Copyright (c) 1985, 1986 Regents of the University of California.
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
* @(#)dmz.c 7.7 (Berkeley) %G%
extern int dmx_timeout
; /* silo timeout, in ms */
* The clist space is mapped by one terminal driver onto each UNIBUS.
* The identity of the board which allocated resources is recorded,
* so the process may be repeated after UNIBUS resets.
* The UBACVT macro converts a clist space address for unibus uban
* into an i/o space address for the DMA routine.
int dmz_uballoc
[NUBA
]; /* which dmz (if any) allocated unibus map */
int cbase
[NUBA
]; /* base address of clists in unibus map */
* Autoconfiguration and variables for DMZ32
int dmzprobe(), dmzattach();
struct uba_device
*dmzinfo
[NDMZ
];
u_short dmzstd
[] = { 0 };
struct uba_driver dmzdriver
= {
dmzprobe
, 0, dmzattach
, 0, dmzstd
, "dmz", dmzinfo
struct tty dmz_tty
[NDMZ
*24];
struct dmx_softc dmz_softc
[3 * NDMZ
];
int ndmz
= NDMZ
*24; /* used by iostat */
register struct dmzdevice
*dmz_addr
;
dmz_addr
= (struct dmzdevice
*)reg
;
br
= 0; cvec
= br
; br
= cvec
; dmzxinta(0); dmzxintb(0); dmzxintc(0);
dmzrinta(0); dmzrintb(0); dmzrintc(0);
a
= dmz_addr
->dmz_config
;
if (((a
>>12) & ~DMZ_INTERFACE
) != 0) {
printf(" Unknown interface type\n");
if (((a
>>8) & DMZ_NOC_MASK
) != 3) {
printf(" Not all octets are available\n");
cvec
= (uba_hd
[numuba
].uh_lastiv
-= 4 * 6);
dmz_addr
->dmz_config
= cvec
>> 2;
return (sizeof(struct dmzdevice
));
register struct uba_device
*ui
;
register struct dmx_softc
*sc
;
sc
= &dmz_softc
[3 * ui
->ui_unit
];
for (i
= 0; i
< 3; i
++, sc
++) {
sc
->dmx_unit
= ui
->ui_unit
;
sc
->dmx_ubanum
= ui
->ui_ubanum
;
sc
->dmx_softCAR
= (ui
->ui_flags
>> (8 * i
)) & 0xff;
sc
->dmx_tty
= &dmz_tty
[((ui
->ui_unit
* 3) + i
) * 8];
sc
->dmx_octet
= (struct dmx_octet
*)
&((struct dmzdevice
*)ui
->ui_addr
)->dmz_octet
[i
];
cbase
[ui
->ui_ubanum
] = -1;
dmz_uballoc
[ui
->ui_ubanum
] = -1;
* Open a DMF32 line, mapping the clist onto the uba if this
* is the first dmf on this uba. Turn on this dmf if this is
if (unit
>= NDMZ
*24 || (ui
= dmzinfo
[dmz
])== 0 || ui
->ui_alive
== 0)
sc
= &dmz_softc
[unit
/ 8];
tp
->t_addr
= (caddr_t
)sc
->dmx_octet
;
tp
->t_dev
= dev
; /* needed before dmxopen */
* While setting up state for this uba,
* block uba resets which can clear the state.
if (cbase
[ui
->ui_ubanum
] == -1) {
dmz_uballoc
[ui
->ui_ubanum
] = dmz
;
cbase
[ui
->ui_ubanum
] = UBAI_ADDR(uballoc(ui
->ui_ubanum
,
(caddr_t
)cfree
, nclist
*sizeof(struct cblock
), 0));
return (dmxopen(tp
, sc
, flag
));
dmxclose(&dmz_tty
[minor(dev
)]);
tp
= &dmz_tty
[minor(dev
)];
return ((*linesw
[tp
->t_line
].l_read
)(tp
, uio
, flag
));
tp
= &dmz_tty
[minor(dev
)];
return ((*linesw
[tp
->t_line
].l_write
)(tp
, uio
));
* DMZ32 receiver interrupts.
if (ui
== 0 || ui
->ui_alive
== 0)
dmxrint(&dmz_softc
[3 * dmz
+ 0]);
if (ui
== 0 || ui
->ui_alive
== 0)
dmxrint(&dmz_softc
[3 * dmz
+ 1]);
if (ui
== 0 || ui
->ui_alive
== 0)
dmxrint(&dmz_softc
[3 * dmz
+ 2]);
dmzioctl(dev
, cmd
, data
, flag
)
return (dmxioctl(&dmz_tty
[unit
], cmd
, data
, flag
));
* DMZ32 transmitter interrupts.
dmxxint(&dmz_softc
[3 * dmz
+ 0]);
dmxxint(&dmz_softc
[3 * dmz
+ 1]);
dmxxint(&dmz_softc
[3 * dmz
+ 2]);
* Start (restart) transmission on the given line.
dmxstart(tp
, &dmz_softc
[minor(tp
->t_dev
) >> 3]);
* Stop output on a line, e.g. for ^S/^Q or output flush.
dmxstop(tp
, &dmz_softc
[minor(tp
->t_dev
) >> 3], flag
);
* Reset state of driver if UBA reset was necessary.
* Reset the csr, lpr, and lcr registers on open lines, and
register struct uba_device
*ui
;
register struct dmzdevice
*addr
;
for (dmz
= 0; dmz
< NDMZ
; dmz
++) {
if (ui
== 0 || ui
->ui_alive
== 0 || ui
->ui_ubanum
!= uban
)
addr
= (struct dmzdevice
*)ui
->ui_addr
;
if (dmz_uballoc
[uban
] == dmz
) {
info
= uballoc(uban
, (caddr_t
)cfree
,
nclist
* sizeof(struct cblock
), UBA_CANTWAIT
);
cbase
[uban
] = UBAI_ADDR(info
);
printf(" [can't get uba map]");
if (dmz_softc
[3 * dmz
+ i
].dmx_flags
& DMX_ACTIVE
) {
addr
->dmz_octet
[i
].csr
= DMF_IE
;
addr
->dmz_octet
[i
].rsp
= dmx_timeout
;
* If a unit is open or waiting for open to complete,
for (i
= 0; i
< 24; i
++, tp
++) {
if (tp
->t_state
& (TS_ISOPEN
| TS_WOPEN
)) {
dmxparam(tp
, &tp
->t_termios
);
(void) dmxmctl(tp
, DMF_ON
, DMSET
);