.\" Copyright (c) 1990, 1991 The Regents of the University of California.
.\" This code is derived from software contributed to Berkeley by
.\" the Systems Programming Group of the University of Utah Computer
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\" 3. All advertising materials mentioning features or use of this software
.\" must display the following acknowledgement:
.\" This product includes software developed by the University of
.\" California, Berkeley and its contributors.
.\" 4. Neither the name of the University nor the names of its contributors
.\" may be used to endorse or promote products derived from this software
.\" without specific prior written permission.
.\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" @(#)dv.4 5.2 (Berkeley) 3/27/91
``DaVinci'' device interface
and 98731 graphics device, also known as
the DaVinci. This driver has not been tested with all possible
combinations of frame buffer boards and scan boards installed in the device.
The driver merely checks for the existence of the device and does minimal set
The DaVinci can be configured at either the ``internal'' address
(frame buffer address 0x200000, control register space address 0x560000)
or at an external select code less than 32.
At the internal address it will be the ``preferred'' console device
The hardware installation manual describes the procedure for
A user process communicates to the device initially by means of
calls supported, refer to
Get info about device, setting the entries in the
.Aq Pa hpdev/grfioctl.h .
For the standard 98730, the number of planes should be 4. The number of
colors would therefore be 15, excluding black. If one 98732A frame buffer
board is installed, there will still be 4 planes, with the 4 planes on the
colormap board becoming overlay planes. With each additional 98732 frame
buffer board 4 planes will be added up to a maximum of 32 planes total.
Turn graphics on by enabling
output. The screen will come on, displaying
whatever is in the frame buffer, using whatever colormap is in place.
Turn graphics off by disabling output to the
The frame buffer contents
Map in control registers and frame buffer space. Once the device file is
mapped, the frame buffer structure is accessible. The structure describing
.Aq Pa hpdev/grf_dvreg.h .
This is a short segment of code showing how the device is opened and mapped
into user process address space assuming that it is
.Bd -literal -offset indent
u_char *Addr, frame_buffer;
disp_fd = open("/dev/grf0",1);
if (ioctl (disp_fd, GRFIOCGINFO, &gi) < 0) return -1;
(void) ioctl (disp_fd, GRFIOCON, 0);
if (ioctl (disp_fd, GRFIOCMAP, &Addr) < 0) {
(void) ioctl (disp_fd, GRFIOCOFF, 0);
dvbox = (dvboxfb *) Addr; /* Control Registers */
frame_buffer=(u_char *)Addr+gi.gd_regsize; /* Frame buffer memory */
.Bl -tag -width /dev/MAKEDEV.hpux -compact
Another process has the device open.
Invalid ioctl specification.
Not tested for all configurations of scan board and frame buffer memory boards.