SCCS-vsn: sys/tahoe/vba/hd.c 7.10
SCCS-vsn: sys/tahoe/vba/mp.c 7.11
SCCS-vsn: sys/tahoe/vba/dr.c 7.6
SCCS-vsn: sys/tahoe/vba/ik.c 7.5
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
- * @(#)dr.c 7.5 (Berkeley) %G%
+ * @(#)dr.c 7.6 (Berkeley) %G%
wakeup((caddr_t)&dra->dr_buf.b_flags);
}
splx(s);
wakeup((caddr_t)&dra->dr_buf.b_flags);
}
splx(s);
* so function bits are not changed
*/
rsaddr->dr_pulse = IENB;
* so function bits are not changed
*/
rsaddr->dr_pulse = IENB;
- sleep((caddr_t)&dra->dr_cmd, DRPRI);
+ error = tsleep((caddr_t)&dra->dr_cmd, DRPRI | PCATCH,
+ devio, 0);
/* Reset DMA ATN RPER flag */
rsaddr->dr_pulse = (MCLR|RDMA|RATN|RPER);
DELAY(0x1f000);
/* Reset DMA ATN RPER flag */
rsaddr->dr_pulse = (MCLR|RDMA|RATN|RPER);
DELAY(0x1f000);
- while ((rsaddr->dr_cstat & REDY) == 0)
- sleep((caddr_t)dra, DRPRI); /* Wakeup by drtimo() */
+ while ((rsaddr->dr_cstat & REDY) == 0 && error == 0)
+ /* Wakeup by drtimo() */
+ error = tsleep((caddr_t)dra, DRPRI | PCATCH, devio, 0);
dra->dr_istat = 0;
dra->dr_cmd = 0;
dra->currenttimo = 0;
dra->dr_istat = 0;
dra->dr_cmd = 0;
dra->currenttimo = 0;
}
while (dra->dr_flags & DR_ACTV)
/* Device is active; should never be in here... */
}
while (dra->dr_flags & DR_ACTV)
/* Device is active; should never be in here... */
- sleep((caddr_t)&dra->dr_flags,DRPRI);
+ (void) tsleep((caddr_t)&dra->dr_flags, DRPRI, devio, 0);
dra->dr_actf = bp;
#ifdef DR_DEBUG
drva(dra, bp->b_proc, bp->b_un.b_addr, bp->b_bcount);
dra->dr_actf = bp;
#ifdef DR_DEBUG
drva(dra, bp->b_proc, bp->b_un.b_addr, bp->b_bcount);
s = SPL_UP();
while (dr->dr_flags & DR_ACTV)
s = SPL_UP();
while (dr->dr_flags & DR_ACTV)
- sleep((caddr_t)dr, DRPRI);
+ (void) tsleep((caddr_t)dr, DRPRI, devio, 0);
splx(s);
if (dr->dr_flags & DR_TMDM) { /* DMA timed out */
dr->dr_flags &= ~DR_TMDM;
splx(s);
if (dr->dr_flags & DR_TMDM) { /* DMA timed out */
dr->dr_flags &= ~DR_TMDM;
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
- * @(#)hd.c 7.9 (Berkeley) %G%
+ * @(#)hd.c 7.10 (Berkeley) %G%
s = spl7();
while (dk->dk_state != OPEN && dk->dk_state != OPENRAW &&
dk->dk_state != CLOSED)
s = spl7();
while (dk->dk_state != OPEN && dk->dk_state != OPENRAW &&
dk->dk_state != CLOSED)
- sleep((caddr_t)dk, PZERO+1);
+ if (error = tsleep((caddr_t)dk, (PZERO+1) | PCATCH,
+ devopn, 0)) {
+ splx(s);
+ return (error);
+ }
splx(s);
if (dk->dk_state != OPEN && dk->dk_state != OPENRAW)
if (error = hdinit(dev, flags))
splx(s);
if (dk->dk_state != OPEN && dk->dk_state != OPENRAW)
if (error = hdinit(dev, flags))
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
- * @(#)ik.c 7.4 (Berkeley) %G%
+ * @(#)ik.c 7.5 (Berkeley) %G%
(void) ikcommand(dev, PS_DETACH, 1); /* auto detach */
sc->is_uid = -1;
untimeout(iktimer, (caddr_t)unit);
(void) ikcommand(dev, PS_DETACH, 1); /* auto detach */
sc->is_uid = -1;
untimeout(iktimer, (caddr_t)unit);
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
- * @(#)mp.c 7.10 (Berkeley) %G%
+ * @(#)mp.c 7.11 (Berkeley) %G%
* serialize open and close events
*/
while ((mp->mp_flags & MP_PROGRESS) || ((tp->t_state & TS_WOPEN) &&
* serialize open and close events
*/
while ((mp->mp_flags & MP_PROGRESS) || ((tp->t_state & TS_WOPEN) &&
- !(mode&O_NONBLOCK) && !(tp->t_cflag&CLOCAL)))
- sleep((caddr_t)&tp->t_canq, TTIPRI);
+ !(mode&O_NONBLOCK) && !(tp->t_cflag&CLOCAL)))
+ if (error = tsleep((caddr_t)&tp->t_canq, TTIPRI | PCATCH,
+ ttopen, 0)) {
+ splx(s);
+ return (error);
+ }
restart:
tp->t_state |= TS_WOPEN;
tp->t_addr = (caddr_t)ms;
restart:
tp->t_state |= TS_WOPEN;
tp->t_addr = (caddr_t)ms;
if ((tp->t_state & TS_ISOPEN) == 0) {
ttychars(tp);
if (tp->t_ispeed == 0) {
if ((tp->t_state & TS_ISOPEN) == 0) {
ttychars(tp);
if (tp->t_ispeed == 0) {
- tp->t_ispeed = TTYDEF_SPEED;
- tp->t_ospeed = TTYDEF_SPEED;
- tp->t_iflag = TTYDEF_IFLAG;
- tp->t_oflag = TTYDEF_OFLAG;
- tp->t_lflag = TTYDEF_LFLAG;
- tp->t_cflag = TTYDEF_CFLAG;
+ tp->t_ispeed = TTYDEF_SPEED;
+ tp->t_ospeed = TTYDEF_SPEED;
+ tp->t_iflag = TTYDEF_IFLAG;
+ tp->t_oflag = TTYDEF_OFLAG;
+ tp->t_lflag = TTYDEF_LFLAG;
+ tp->t_cflag = TTYDEF_CFLAG;
}
/*
* Initialize port state: init MPCC interface
}
/*
* Initialize port state: init MPCC interface
* wait for port to start
*/
while (mp->mp_proto != MPPROTO_ASYNC)
* wait for port to start
*/
while (mp->mp_proto != MPPROTO_ASYNC)
- sleep((caddr_t)&tp->t_canq, TTIPRI);
+ if (error = tsleep((caddr_t)&tp->t_canq,
+ TTIPRI | PCATCH, ttopen, 0))
+ goto bad;
ttsetwater(tp);
mp->mp_flags &= ~MP_PROGRESS;
}
ttsetwater(tp);
mp->mp_flags &= ~MP_PROGRESS;
}
- while (!(mode&O_NONBLOCK) && !(tp->t_cflag&CLOCAL) &&
- (tp->t_state & TS_CARR_ON) == 0) {
- sleep((caddr_t)&tp->t_rawq, TTIPRI);
+ while ((mode&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
+ (tp->t_state & TS_CARR_ON) == 0) {
+ if (error = tsleep((caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
+ ttopen, 0))
+ goto bad;
/*
* a mpclose() might have disabled port. if so restart
*/
/*
* a mpclose() might have disabled port. if so restart
*/
register struct tty *tp;
register struct mpport *mp;
register struct mpevent *ev;
register struct tty *tp;
register struct mpport *mp;
register struct mpevent *ev;
- int s, port, unit, error;
+ int s, port, unit, error = 0;
struct mblok *mb;
unit = minor(dev);
struct mblok *mb;
unit = minor(dev);
return (0);
}
while (mp->mp_flags & MP_PROGRESS)
return (0);
}
while (mp->mp_flags & MP_PROGRESS)
- sleep((caddr_t)&tp->t_canq, TTIPRI);
+ if (error = tsleep((caddr_t)&tp->t_canq,
+ TTIPRI | PCATCH, ttclos, 0)) {
+ splx(s);
+ return (error);
+ }
mp->mp_flags |= MP_PROGRESS;
(*linesw[tp->t_line].l_close)(tp);
ev = mp_getevent(mp, unit, 1);
mp->mp_flags |= MP_PROGRESS;
(*linesw[tp->t_line].l_close)(tp);
ev = mp_getevent(mp, unit, 1);
else
mpmodem(unit, MMOD_ON);
mpcmd(ev, EVCMD_CLOSE, 0, mb, port);
else
mpmodem(unit, MMOD_ON);
mpcmd(ev, EVCMD_CLOSE, 0, mb, port);
out:
if (mp->mp_flags & MP_REMBSY)
mpclean(mb, port);
else
out:
if (mp->mp_flags & MP_REMBSY)
mpclean(mb, port);
else
- while (mp->mp_flags & MP_PROGRESS)
- sleep((caddr_t)&tp->t_canq,TTIPRI);
+ while (mp->mp_flags & MP_PROGRESS && error == 0)
+ error = tsleep((caddr_t)&tp->t_canq, TTIPRI | PCATCH,
+ ttclos, 0);
splx(s);
return (error);
}
splx(s);
return (error);
}
case TIOCCBRK: /* clear break */
s = spl8();
while (mp->mp_flags & MP_IOCTL) {
case TIOCCBRK: /* clear break */
s = spl8();
while (mp->mp_flags & MP_IOCTL) {
- sleep((caddr_t)&tp->t_canq, TTIPRI);
+ if (error = tsleep((caddr_t)&tp->t_canq,
+ TTIPRI | PCATCH, ttyout, 0)) {
+ splx(s);
+ return (error);
+ }
if (mp->mp_proto != MPPROTO_ASYNC) {
if (mp->mp_proto != MPPROTO_ASYNC) {
- mp->mp_flags &= ~MP_IOCTL;
}
}
ev = mp_getevent(mp, unit, 0);
}
}
ev = mp_getevent(mp, unit, 0);
/* ARGSUSED */
mpdlioctl(dev, cmd, data, flag)
dev_t dev;
/* ARGSUSED */
mpdlioctl(dev, cmd, data, flag)
dev_t dev;
{
register struct mblok *mb;
register struct mpdl *dl;
{
register struct mblok *mb;
register struct mpdl *dl;
+ int unit, error = 0, s, i;
mb = mp_softc[unit=MPUNIT(minor(dev))].ms_mb;
if (mb == 0)
mb = mp_softc[unit=MPUNIT(minor(dev))].ms_mb;
if (mb == 0)
dl = &mb->mb_dl;
error = 0;
switch (cmd) {
dl = &mb->mb_dl;
error = 0;
switch (cmd) {
error = mpdlwait(dl);
break;
case MPIOSTARTDL:
error = mpdlwait(dl);
break;
case MPIOSTARTDL:
- sleep((caddr_t)&mpdlbusy, PZERO+1);
+ if (error = tsleep((caddr_t)&mpdlbusy,
+ (PZERO+1) | PCATCH, devioc, 0))
+ break;
+ splx(s);
+ if (error)
+ break;
mpdlbusy++;
/* initialize the downloading interface */
mpbogus.magic = MPMAGIC;
mpdlbusy++;
/* initialize the downloading interface */
mpbogus.magic = MPMAGIC;
mb->mb_diagswitch[1] = 'P';
s = spl8();
*(u_short *)mpinfo[unit]->ui_addr = 2;
mb->mb_diagswitch[1] = 'P';
s = spl8();
*(u_short *)mpinfo[unit]->ui_addr = 2;
- timeout(mpdltimeout, (caddr_t)mb, 30*hz);
- sleep((caddr_t)&mb->mb_status, PZERO+1);
+ error = tsleep((caddr_t)&mb->mb_status, (PZERO+1) | PCATCH,
+ devio, 30*hz);
- if (mb->mb_status == MP_DLOPEN) {
- untimeout(mpdltimeout, (caddr_t)mb);
- } else if (mb->mb_status == MP_DLTIME) {
- mpbogus.status = 0;
+ if (error == EWOULDBLOCK)
- error = ENXIO;
- log(LOG_ERR, "mp%d: start download: unknown status %x",
- unit, mb->mb_status);
- }
bzero((caddr_t)mb->mb_port, sizeof (mb->mb_port));
break;
case MPIORESETBOARD:
bzero((caddr_t)mb->mb_port, sizeof (mb->mb_port));
break;
case MPIORESETBOARD:
-mpdltimeout(mp)
- struct mblok *mp;
-{
-
- mp->mb_status = MP_DLTIME;
- wakeup((caddr_t)&mp->mb_status);
-}
-
/*
* Wait for a transfer to complete or a timeout to occur.
*/
/*
* Wait for a transfer to complete or a timeout to occur.
*/
s = spl8();
dl->mpdl_status = EVSTATUS_GO;
while (dl->mpdl_status != EVSTATUS_FREE) {
s = spl8();
dl->mpdl_status = EVSTATUS_GO;
while (dl->mpdl_status != EVSTATUS_FREE) {
- sleep((caddr_t)&dl->mpdl_status, PZERO+1);
+ error = tsleep((caddr_t)&dl->mpdl_status, (PZERO+1) | PCATCH,
+ devout, 0);
if (mpdlerr == MP_DLERROR)
error = EIO;
if (mpdlerr == MP_DLERROR)
error = EIO;
}
splx(s);
return (error);
}
splx(s);
return (error);