scb, otherwise it would be at variable location; add nexi numbers
for 64K chip controllers and ci
SCCS-vsn: sys/vax/vax/Locore.c 4.26
SCCS-vsn: sys/vax/vax/autoconf.c 4.49
SCCS-vsn: sys/vax/vax/locore.s 4.85
SCCS-vsn: sys/vax/vax/nexus.h 4.12
SCCS-vsn: sys/vax/vax/scb.h 4.4
SCCS-vsn: sys/vax/vax/scb.s 4.15
-/* Locore.c 6.1 83/07/29 */
+/* Locore.c 4.26 83/08/01 */
#include "dz.h"
#include "mba.h"
#include "dz.h"
#include "mba.h"
struct scb scb;
int (*UNIvec[128])();
struct scb scb;
int (*UNIvec[128])();
+#if NUBA > 1
+int (*UNI1vec[128])();
+#endif
struct rpb rpb;
int intstack[3*128];
struct rpb rpb;
int intstack[3*128];
panic("Machine check");
printf("Write timeout");
(*UNIvec[0])();
panic("Machine check");
printf("Write timeout");
(*UNIvec[0])();
+#if NUBA > 1
+ (*UNI1vec[0])();
+#endif
ubaerror(0, (struct uba_hd *)0, 0, 0, (struct uba_regs *)0);
cnrint(0);
cnxint(0);
ubaerror(0, (struct uba_hd *)0, 0, 0, (struct uba_regs *)0);
cnrint(0);
cnxint(0);
-/* autoconf.c 6.1 83/07/29 */
+/* autoconf.c 4.49 83/08/01 */
/*
* Setup the system to run on the current machine.
/*
* Setup the system to run on the current machine.
if (ocp->pc_cputype == cpusid.cpuany.cp_type) {
probenexus(ocp);
/*
if (ocp->pc_cputype == cpusid.cpuany.cp_type) {
probenexus(ocp);
/*
- * Write protect the scb. It is strange
- * that this code is here, but this is as soon
- * as we are done mucking with it, and the
+ * Write protect the scb and UNIBUS interrupt vectors.
+ * It is strange that this code is here, but this is
+ * as soon as we are done mucking with it, and the
* write-enable was done in assembly language
* to which we will never return.
*/
ip = (int *)Sysmap; *ip &= ~PG_PROT; *ip |= PG_KR;
* write-enable was done in assembly language
* to which we will never return.
*/
ip = (int *)Sysmap; *ip &= ~PG_PROT; *ip |= PG_KR;
+ ip++; *ip &= ~PG_PROT; *ip |= PG_KR;
+#if NUBA > 1
+ ip++; *ip &= ~PG_PROT; *ip |= PG_KR;
+#endif
mtpr(TBIS, Sysbase);
#if GENERIC
setconf();
mtpr(TBIS, Sysbase);
#if GENERIC
setconf();
case NEX_MEM4I:
case NEX_MEM16:
case NEX_MEM16I:
case NEX_MEM4I:
case NEX_MEM16:
case NEX_MEM16I:
+ case NEX_MEM64L:
+ case NEX_MEM64LI:
+ case NEX_MEM64U:
+ case NEX_MEM64UI:
+ case NEX_MEM64I:
printf("mcr%d at tr%d\n", nmcr, nexnum);
if (nmcr >= 4) {
printf("5 mcr's");
printf("mcr%d at tr%d\n", nmcr, nexnum);
if (nmcr >= 4) {
printf("5 mcr's");
printf("mpm");
goto unsupp;
printf("mpm");
goto unsupp;
+ case NEX_CI:
+ printf("ci");
+ goto unsupp;
+
default:
printf("nexus type %x", nexcsr.nex_type);
unsupp:
default:
printf("nexus type %x", nexcsr.nex_type);
unsupp:
*/
uhp->uh_uba = vubp;
uhp->uh_physuba = pubp;
*/
uhp->uh_uba = vubp;
uhp->uh_physuba = pubp;
-/* HAVE TO DO SOMETHING SPECIAL FOR SECOND UNIBUS ON COMETS HERE */
if (numuba == 0)
uhp->uh_vec = UNIvec;
if (numuba == 0)
uhp->uh_vec = UNIvec;
- else
- uhp->uh_vec = (int(**)())calloc(512);
+#if NUBA > 1
+ else if (numuba == 1)
+ uhp->uh_vec = UNI1vec;
+ else {
+#if defined(VAX_750)
+ if (cpu == VAX_750)
+ printf("More than 2 UBA's not supported\n");
+ else
+#endif
+ uhp->uh_vec = (int(**)())calloc(512);
+ }
+#endif
for (i = 0; i < 128; i++)
uhp->uh_vec[i] =
scbentry(&catcher[i*2], SCB_ISTACK);
for (i = 0; i < 128; i++)
uhp->uh_vec[i] =
scbentry(&catcher[i*2], SCB_ISTACK);
-/* locore.s 6.1 83/07/29 */
+/* locore.s 4.85 83/08/01 */
#include "../machine/psl.h"
#include "../machine/pte.h"
#include "../machine/psl.h"
#include "../machine/pte.h"
.globl _u
.set _u,0x80000000 - UPAGES*NBPG
.globl _u
.set _u,0x80000000 - UPAGES*NBPG
-/*
- * Restart parameter block
- * This is filled in in machdep.c in startup().
- * It MUST be page aligned.
- * When auto-restart occurs, we run restart() in machdep.c, which
- * takes a core-dump and then cold-starts.
- */
- .globl _rpb
-_rpb:
- .space 508
-erpb:
- .space 4
.globl _intstack
_intstack:
.space NISP*NBPG
.globl _intstack
_intstack:
.space NISP*NBPG
.globl _doadump
_doadump:
nop; nop # .word 0x0101
.globl _doadump
_doadump:
nop; nop # .word 0x0101
-#define _rpbmap _Sysmap+8 # scb, UNIvec, rpb, istack*4
+#define _rpbmap _Sysmap # rpb, scb, UNI*vec, istack*4
bicl2 $PG_PROT,_rpbmap
bisl2 $PG_KW,_rpbmap
tstl _rpb+RP_FLAG # dump only once!
bicl2 $PG_PROT,_rpbmap
bisl2 $PG_KW,_rpbmap
tstl _rpb+RP_FLAG # dump only once!
-/* nexus.h 6.1 83/07/29 */
+/* nexus.h 4.12 83/08/01 */
/*
* Information about nexus's.
/*
* Information about nexus's.
#define NEX_UBA2 0x2a
#define NEX_UBA3 0x2b
#define NEX_DR32 0x30 /* DR32 user i'face to SBI */
#define NEX_UBA2 0x2a
#define NEX_UBA3 0x2b
#define NEX_DR32 0x30 /* DR32 user i'face to SBI */
+#define NEX_CI 0x38 /* CI adaptor */
#define NEX_MPM0 0x40 /* Multi-port mem */
#define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */
#define NEX_MPM2 0x42
#define NEX_MPM3 0x43
#define NEX_MPM0 0x40 /* Multi-port mem */
#define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */
#define NEX_MPM2 0x42
#define NEX_MPM3 0x43
+#define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */
+#define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */
+#define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */
+#define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */
+#define NEX_MEM64I 0x6c /* 64K chips, interleaved */
-/* scb.h 6.1 83/07/29 */
+/* scb.h 4.4 83/08/01 */
/*
* VAX System control block layout
/*
* VAX System control block layout
int (*scb_ipl16[16])(); /* " " IPL 16 */
int (*scb_ipl17[16])(); /* " " IPL 17 */
int (*scb_ubaint[128])(); /* Unibus device intr */
int (*scb_ipl16[16])(); /* " " IPL 16 */
int (*scb_ipl17[16])(); /* " " IPL 17 */
int (*scb_ubaint[128])(); /* Unibus device intr */
+ int (*scb_uba1int[128])(); /* Unibus 1 device intr */
-/* scb.s 6.1 83/07/29 */
+/* scb.s 4.15 83/08/01 */
/*
* System control block
/*
* System control block
.globl _UNIvec
_UNIvec: .space 512 # 750 unibus intr vector
# 1st UBA jump table on 780's
.globl _UNIvec
_UNIvec: .space 512 # 750 unibus intr vector
# 1st UBA jump table on 780's
+#if NUBA > 1
+ .globl _UNI1vec
+_UNI1vec: .space 512 # 750 second unibus intr vector
+ # 2nd UBA jump table on 780's
+#endif