date and time created 92/07/13 00:43:01 by torek

SCCS-vsn: sys/sparc/include/float.h 7.1
SCCS-vsn: sys/sparc/include/frame.h 7.1
SCCS-vsn: sys/sparc/include/fsr.h 7.1

diff --git a/usr/src/sys/sparc/include/float.h b/usr/src/sys/sparc/include/float.h
new file mode 100644 (file)
index 0000000..f3f4b6b
--- /dev/null
+++ b/usr/src/sys/sparc/include/float.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 1992 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * %sccs.include.redist.c%
+ *
+ *     @(#)float.h     7.1 (Berkeley) %G%
+ *
+ * from: $Header: float.h,v 1.2 92/06/17 06:10:17 torek Exp $
+ */
+
+#define FLT_RADIX      2               /* b */
+#define FLT_ROUNDS     1               /* add rounds to nearest by default */
+
+#define FLT_MANT_DIG   24              /* p */
+#define FLT_EPSILON    1.19209290E-07F /* b**(1-p) */
+#define FLT_DIG                6               /* floor((p-1)*log10(b))+(b == 10) */
+#define FLT_MIN_EXP    -125            /* emin */
+#define FLT_MIN                1.17549435E-38F /* b**(emin-1) */
+#define FLT_MIN_10_EXP -37             /* ceil(log10(b**(emin-1))) */
+#define FLT_MAX_EXP    128             /* emax */
+#define FLT_MAX                3.40282347E+38F /* (1-b**(-p))*b**emax */
+#define FLT_MAX_10_EXP 38              /* floor(log10((1-b**(-p))*b**emax)) */
+
+#define DBL_MANT_DIG   53
+#define DBL_EPSILON    2.2204460492503131E-16
+#define DBL_DIG                15
+#define DBL_MIN_EXP    -1021
+#define DBL_MIN                2.2250738585072014E-308
+#define DBL_MIN_10_EXP -307
+#define DBL_MAX_EXP    1024
+#define DBL_MAX                1.7976931348623157E+308
+#define DBL_MAX_10_EXP 308
+
+#define LDBL_MANT_DIG  DBL_MANT_DIG
+#define LDBL_EPSILON   DBL_EPSILON
+#define LDBL_DIG       DBL_DIG
+#define LDBL_MIN_EXP   DBL_MIN_EXP
+#define LDBL_MIN       DBL_MIN
+#define LDBL_MIN_10_EXP        DBL_MIN_10_EXP
+#define LDBL_MAX_EXP   DBL_MAX_EXP
+#define LDBL_MAX       DBL_MAX
+#define LDBL_MAX_10_EXP        DBL_MAX_10_EXP

diff --git a/usr/src/sys/sparc/include/frame.h b/usr/src/sys/sparc/include/frame.h
new file mode 100644 (file)
index 0000000..14eaac3
--- /dev/null
+++ b/usr/src/sys/sparc/include/frame.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 1992 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * %sccs.include.redist.c%
+ *
+ *     @(#)frame.h     7.1 (Berkeley) %G%
+ *
+ * from: $Header: frame.h,v 1.4 92/06/17 06:10:17 torek Exp $
+ */
+
+/*
+ * Sparc stack frame format.
+ *
+ * Note that the contents of each stack frame may be held only in
+ * machine register windows.  In order to get an accurate picture
+ * of the frame, you must first force the kernel to write any such
+ * windows to the stack.
+ */
+struct frame {
+       int     fr_local[8];    /* space to save locals (%l0..%l7) */
+       int     fr_arg[6];      /* space to save arguments (%i0..%i5) */
+       struct  frame *fr_fp;   /* space to save frame pointer (%i6) */
+       int     fr_pc;          /* space to save return pc (%i7) */
+       /*
+        * SunOS reserves another 8 words here; this is pointless
+        * but we do it for compatibility.
+        */
+       int     fr_xxx;         /* `structure return pointer' (unused) */
+       int     fr_argd[6];     /* `arg dump area' (lunacy) */
+       int     fr_argx[1];     /* arg extension (args 7..n; variable size) */
+};

diff --git a/usr/src/sys/sparc/include/fsr.h b/usr/src/sys/sparc/include/fsr.h
new file mode 100644 (file)
index 0000000..6f0b287
--- /dev/null
+++ b/usr/src/sys/sparc/include/fsr.h
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 1992 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * %sccs.include.redist.c%
+ *
+ *     @(#)fsr.h       7.1 (Berkeley) %G%
+ *
+ * from: $Header: fsr.h,v 1.5 92/06/17 06:10:18 torek Exp $
+ */
+
+#ifndef _MACHINE_FSR_H_
+#define        _MACHINE_FSR_H_
+
+/*
+ * Bits in FSR.
+ */
+#define        FSR_RD          0xc0000000      /* rounding direction */
+#define          FSR_RD_RN     0               /* round to nearest */
+#define          FSR_RD_RZ     1               /* round towards 0 */
+#define          FSR_RD_RP     2               /* round towards +inf */
+#define          FSR_RD_RM     3               /* round towards -inf */
+#define        FSR_RD_SHIFT    30
+#define        FSR_RD_MASK     0x03
+
+#define        FSR_RP          0x30000000      /* extended rounding precision */
+#define          FSR_RP_X      0               /* extended stays extended */
+#define          FSR_RP_S      1               /* extended => single */
+#define          FSR_RP_D      2               /* extended => double */
+#define          FSR_RP_80     3               /* extended => 80-bit */
+#define        FSR_RP_SHIFT    28
+#define        FSR_RP_MASK     0x03
+
+#define        FSR_TEM         0x0f800000      /* trap enable mask */
+#define        FSR_TEM_SHIFT   23
+#define        FSR_TEM_MASK    0x1f
+
+#define        FSR_NS          0x00400000      /* ``nonstandard mode'' */
+#define        FSR_AU          0x00400000      /* aka abrupt underflow mode */
+#define        FSR_MBZ         0x00300000      /* reserved; must be zero */
+
+#define        FSR_VER         0x000e0000      /* version bits */
+#define        FSR_VER_SHIFT   17
+#define        FSR_VER_MASK    0x07
+
+#define        FSR_FTT         0x0001c000      /* FP trap type */
+#define          FSR_TT_NONE   0               /* no trap */
+#define          FSR_TT_IEEE   1               /* IEEE exception */
+#define          FSR_TT_UNFIN  2               /* unfinished operation */
+#define          FSR_TT_UNIMP  3               /* unimplemented operation */
+#define          FSR_TT_SEQ    4               /* sequence error */
+#define          FSR_TT_HWERR  5               /* hardware error (unrecoverable) */
+#define        FSR_FTT_SHIFT   14
+#define        FSR_FTT_MASK    0x03
+
+#define        FSR_QNE         0x00002000      /* queue not empty */
+#define        FSR_PR          0x00001000      /* partial result */
+
+#define        FSR_FCC         0x00000c00      /* FP condition codes */
+#define          FSR_CC_EQ     0               /* f1 = f2 */
+#define          FSR_CC_LT     1               /* f1 < f2 */
+#define          FSR_CC_GT     2               /* f1 > f2 */
+#define          FSR_CC_UO     3               /* (f1,f2) unordered */
+#define        FSR_FCC_SHIFT   10
+#define        FSR_FCC_MASK    0x03
+
+#define        FSR_AX  0x000003e0              /* accrued exceptions */
+#define          FSR_AX_SHIFT  5
+#define          FSR_AX_MASK   0x1f
+#define        FSR_CX  0x0000001f              /* current exceptions */
+#define          FSR_CX_SHIFT  0
+#define          FSR_CX_MASK   0x1f
+
+/* The following exceptions apply to TEM, AX, and CX. */
+#define        FSR_NV  0x10                    /* invalid operand */
+#define        FSR_OF  0x08                    /* overflow */
+#define        FSR_UF  0x04                    /* underflow */
+#define        FSR_DZ  0x02                    /* division by zero */
+#define        FSR_NX  0x01                    /* inexact result */
+
+#endif /* _MACHINE_FSR_H_ */