Define a processor speed independent DELAY function

from Pace Willisson (pace@blitz.com)

SCCS-vsn: sys/i386/i386/locore.s 7.8

diff --git a/usr/src/sys/i386/i386/locore.s b/usr/src/sys/i386/i386/locore.s
index f0574df..3074af6 100644 (file)
--- a/usr/src/sys/i386/i386/locore.s
+++ b/usr/src/sys/i386/i386/locore.s
@@ -7,7 +7,7 @@
  *
  * %sccs.include.redist.c%
  *
  *
  * %sccs.include.redist.c%
  *

- *     @(#)locore.s    7.7 (Berkeley) %G%
+ *     @(#)locore.s    7.8 (Berkeley) %G%

  */
 
 #include "assym.s"
  */
 
 #include "assym.s"


@@ -1459,5 +1459,21 @@ ENTRY(ntohs)
        xchgb   %al,%ah
        ret
 
        xchgb   %al,%ah
        ret
 

+/* DELAY(n)  delay about n microseconds */
+ENTRY(DELAY)
+       movl 4(%esp), %ecx
+       incl %ecx /* make DELAY(0) go through the loop just once */
+
+       /* 
+        * 0x80 is the manufacturing test port, which should be safe to
+        * write to on any motherboard.  The output instruction will
+        * be executed at bus speed, rather than processor speed, so
+        * it will be about 750ns on any ISA or EISA machine.
+        */
+1:
+       outb %al, $0x80
+       loop 1b
+       ret     
+

 #include "vector.s"
 #include "i386/isa/icu.s"
 #include "vector.s"
 #include "i386/isa/icu.s"