date and time created 93/10/30 22:02:05 by torek

SCCS-vsn: sys/sparc/sbus/btreg.h 8.1
SCCS-vsn: sys/sparc/sbus/btvar.h 8.1

diff --git a/usr/src/sys/sparc/sbus/btreg.h b/usr/src/sys/sparc/sbus/btreg.h
new file mode 100644 (file)
index 0000000..dd0b1d3
--- /dev/null
+++ b/usr/src/sys/sparc/sbus/btreg.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 1993 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *     This product includes software developed by the University of
+ *     California, Lawrence Berkeley Laboratory.
+ *
+ * %sccs.include.redist.c%
+ *
+ *     @(#)btreg.h     8.1 (Berkeley) %G%
+ *
+ * from: $Header: btreg.h,v 1.1 93/10/12 15:28:52 torek Exp $
+ */
+
+/*
+ * Several Sun color frame buffers use some kind of Brooktree video
+ * DAC (e.g., the Bt458, -- in any case, Brooktree make the only
+ * decent color frame buffer chips).
+ *
+ * Color map control on these is a bit funky in a SPARCstation.
+ * To update the color map one would normally do byte writes, but
+ * the hardware takes longword writes.  Since there are three
+ * registers for each color map entry (R, then G, then B), we have
+ * to set color 1 with a write to address 0 (setting 0's R/G/B and
+ * color 1's R) followed by a second write to address 1 (setting
+ * color 1's G/B and color 2's R/G).  Software must therefore keep
+ * a copy of the current map.
+ *
+ * The colormap address register increments automatically, so the
+ * above write is done as:
+ *
+ *     bt->bt_addr = 0;
+ *     bt->bt_cmap = R0G0B0R1;
+ *     bt->bt_cmap = G1B1R2G2;
+ *     ...
+ *
+ * Yow!
+ *
+ * Bonus complication: on the cg6, only the top 8 bits of each 32 bit
+ * register matter, even though the cg3 takes all the bits from all
+ * bytes written to it.
+ */
+struct bt_regs {
+       u_int   bt_addr;                /* map address register */
+       u_int   bt_cmap;                /* colormap data register */
+       u_int   bt_ctrl;                /* control register */
+       u_int   bt_omap;                /* overlay (cursor) map register */
+};

diff --git a/usr/src/sys/sparc/sbus/btvar.h b/usr/src/sys/sparc/sbus/btvar.h
new file mode 100644 (file)
index 0000000..c347e08
--- /dev/null
+++ b/usr/src/sys/sparc/sbus/btvar.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 1993 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *     This product includes software developed by the University of
+ *     California, Lawrence Berkeley Laboratory.
+ *
+ * %sccs.include.redist.c%
+ *
+ *     @(#)btvar.h     8.1 (Berkeley) %G%
+ *
+ * from: $Header: btvar.h,v 1.1 93/10/12 15:29:01 torek Exp $
+ */
+
+/*
+ * Brooktree color frame buffer state variables (see btreg.h).
+ *
+ * Unfortunately, remarkably little code can be shared between the
+ * cg3 and cg6 drivers here, as the cg3 registers do longword-ops
+ * `as expected', but the cg6 ones use only the upper byte.
+ *
+ * Still, the software color map manipulation is not completely trivial.
+ */
+union bt_cmap {
+       u_char  cm_map[256][3];         /* 256 R/G/B entries */
+       u_int   cm_chip[256 * 3 / 4];   /* the way the chip gets loaded */
+};
+
+/*
+ * Routines in bt_subr.c.
+ */
+int    bt_getcmap __P((struct fbcmap *, union bt_cmap *, int));
+int    bt_putcmap __P((struct fbcmap *, union bt_cmap *, int));
+
+/*
+ * Compute (x / 4) * 3 and (x / 4) * 4.  These are used in turning
+ * RGB indices (which are in multiples of three) into `chip RGB' values
+ * (which are in multiples of four).
+ */
+#define        BT_D4M3(x) ((((x) >> 2) << 1) + ((x) >> 2))     /* (x / 4) * 3 */
+#define        BT_D4M4(x) ((x) & ~3)                           /* (x / 4) * 4 */