SCCS-vsn: sys/vax/uba/uba.c 7.2
SCCS-vsn: sys/vax/uba/ubareg.h 7.2
SCCS-vsn: sys/vax/uba/ubavar.h 7.2
SCCS-vsn: sys/vax/if/if_uba.c 7.3
SCCS-vsn: sys/vax/if/if_uba.h 7.2
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
- * @(#)if_uba.c 7.2 (Berkeley) %G%
+ * @(#)if_uba.c 7.3 (Berkeley) %G%
*/
#include "../machine/pte.h"
*/
#include "../machine/pte.h"
ifu->iff_hlen = hlen;
ifu->iff_uban = uban;
ifu->iff_uba = uba_hd[uban].uh_uba;
ifu->iff_hlen = hlen;
ifu->iff_uban = uban;
ifu->iff_uba = uba_hd[uban].uh_uba;
+ ifu->iff_ubamr = uba_hd[uban].uh_mr;
}
for (i = 0; i < nr; i++)
if (if_ubaalloc(ifu, &ifr[i], nmr) == 0) {
}
for (i = 0; i < nr; i++)
if (if_ubaalloc(ifu, &ifr[i], nmr) == 0) {
ifrw->ifrw_info = info;
ifrw->ifrw_bdp = UBAI_BDP(info);
ifrw->ifrw_proto = UBAMR_MRV | (UBAI_BDP(info) << UBAMR_DPSHIFT);
ifrw->ifrw_info = info;
ifrw->ifrw_bdp = UBAI_BDP(info);
ifrw->ifrw_proto = UBAMR_MRV | (UBAI_BDP(info) << UBAMR_DPSHIFT);
- ifrw->ifrw_mr = &ifu->iff_uba->uba_map[UBAI_MR(info) + (ifu->iff_hlen?
- 1 : 0)];
+ ifrw->ifrw_mr = &ifu->iff_ubamr[UBAI_MR(info) + (ifu->iff_hlen? 1 : 0)];
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
- * @(#)if_uba.h 7.1 (Berkeley) %G%
+ * @(#)if_uba.h 7.2 (Berkeley) %G%
struct ifubinfo {
short iff_uban; /* uba number */
short iff_hlen; /* local net header length */
struct ifubinfo {
short iff_uban; /* uba number */
short iff_hlen; /* local net header length */
- struct uba_regs *iff_uba; /* uba regs, in vm */
+ struct uba_regs *iff_uba; /* uba adaptor regs, in vm */
+ struct pte *iff_ubamr; /* uba map regs, in vm */
short iff_flags; /* used during uballoc's */
};
short iff_flags; /* used during uballoc's */
};
#define ifu_uban ifu_info.iff_uban
#define ifu_hlen ifu_info.iff_hlen
#define ifu_uba ifu_info.iff_uba
#define ifu_uban ifu_info.iff_uban
#define ifu_hlen ifu_info.iff_hlen
#define ifu_uba ifu_info.iff_uba
+#define ifu_ubamr ifu_info.iff_ubamr
#define ifu_flags ifu_info.iff_flags
#define ifu_w ifu_xmt.ifrw
#define ifu_xtofree ifu_xmt.ifw_xtofree
#define ifu_flags ifu_info.iff_flags
#define ifu_w ifu_xmt.ifrw
#define ifu_xtofree ifu_xmt.ifw_xtofree
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
- * @(#)uba.c 7.1 (Berkeley) %G%
+ * @(#)uba.c 7.2 (Berkeley) %G%
*/
#include "../machine/pte.h"
*/
#include "../machine/pte.h"
#include "ubareg.h"
#include "ubavar.h"
#include "ubareg.h"
#include "ubavar.h"
-#if defined(VAX780) || defined(VAX8600)
char ubasr_bits[] = UBASR_BITS;
#endif
char ubasr_bits[] = UBASR_BITS;
#endif
struct proc *rp;
int a, o, ubinfo;
struct proc *rp;
int a, o, ubinfo;
-#if defined(VAX730) || defined(VAX630)
- if (cpu == VAX_730 || cpu == VAX_630)
+#ifdef DW730
+ if (uh->uh_type == DW730)
+ flags &= ~UBA_NEEDBDP;
+#endif
+#ifdef QBA
+ if (uh->uh_type == QBA)
flags &= ~UBA_NEEDBDP;
#endif
v = btop(bp->b_un.b_addr);
flags &= ~UBA_NEEDBDP;
#endif
v = btop(bp->b_un.b_addr);
pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
else
pte = vtopte(rp, v);
pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
else
pte = vtopte(rp, v);
- io = &uh->uh_uba->uba_map[reg];
while (--npf != 0) {
pfnum = pte->pg_pfnum;
if (pfnum == 0)
while (--npf != 0) {
pfnum = pte->pg_pfnum;
if (pfnum == 0)
*amr = 0;
bdp = (mr >> 28) & 0x0f;
if (bdp) {
*amr = 0;
bdp = (mr >> 28) & 0x0f;
if (bdp) {
- switch (cpu) {
-#if defined(VAX780) || defined(VAX8600)
- case VAX_8600:
- case VAX_780:
+ switch (uh->uh_type) {
+#ifdef DW780
+ case DW780:
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
break;
#endif
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
break;
#endif
-#if VAX750
- case VAX_750:
+#ifdef DW750
+ case DW750:
uh->uh_uba->uba_dpr[bdp] |=
UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
break;
#endif
uh->uh_uba->uba_dpr[bdp] |=
UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
break;
#endif
}
uh->uh_bdpfree |= 1 << (bdp-1); /* atomic */
if (uh->uh_bdpwant) {
}
uh->uh_bdpfree |= 1 << (bdp-1); /* atomic */
if (uh->uh_bdpwant) {
register struct uba_hd *uh = um->um_hd;
register int bdp = (um->um_ubinfo >> 28) & 0x0f;
register struct uba_hd *uh = um->um_hd;
register int bdp = (um->um_ubinfo >> 28) & 0x0f;
- switch (cpu) {
-#if defined(VAX780) || defined(VAX8600)
- case VAX_8600:
- case VAX_780:
+ switch (uh->uh_type) {
+#ifdef DW780
+ case DW780:
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
break;
#endif
uh->uh_uba->uba_dpr[bdp] |= UBADPR_BNE;
break;
#endif
-#if VAX750
- case VAX_750:
+#ifdef DW750
+ case DW750:
uh->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
break;
#endif
uh->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE;
break;
#endif
register struct uba_hd *uhp;
{
register struct uba_hd *uhp;
{
- rminit(uhp->uh_map, (long)NUBMREG, (long)1, "uba", UAMSIZ);
- switch (cpu) {
-#if defined(VAX780) || defined(VAX8600)
- case VAX_8600:
- case VAX_780:
+ rminit(uhp->uh_map, (long)uhp->uh_memsize, (long)1, "uba", UAMSIZ);
+ switch (uhp->uh_type) {
+#ifdef DW780
+ case DW780:
uhp->uh_bdpfree = (1<<NBDP780) - 1;
break;
#endif
uhp->uh_bdpfree = (1<<NBDP780) - 1;
break;
#endif
-#if VAX750
- case VAX_750:
+#ifdef DW750
+ case DW750:
uhp->uh_bdpfree = (1<<NBDP750) - 1;
break;
#endif
uhp->uh_bdpfree = (1<<NBDP750) - 1;
break;
#endif
-#if defined(VAX730) || defined(VAX630)
- case VAX_730:
- case VAX_630:
* In these cases we really don't need the interrupts
* enabled, but since we run with ipl high, we don't care
* if they are, they will never happen anyways.
* In these cases we really don't need the interrupts
* enabled, but since we run with ipl high, we don't care
* if they are, they will never happen anyways.
+ * SHOULD GET POINTER TO UBA_HD INSTEAD OF UBA.
*/
ubainit(uba)
register struct uba_regs *uba;
{
*/
ubainit(uba)
register struct uba_regs *uba;
{
+ register struct uba_hd *uhp;
+ int isphys = 0;
- switch (cpu) {
-#if defined(VAX780) || defined(VAX8600)
- case VAX_8600:
- case VAX_780:
+ for (uhp = uba_hd; uhp < uba_hd + numuba; uhp++) {
+ if (uhp->uh_uba == uba)
+ break;
+ if (uhp->uh_physuba == uba) {
+ isphys++;
+ break;
+ }
+ }
+ if (uhp >= uba_hd + numuba) {
+ printf("init unknown uba\n");
+ return;
+ }
+
+ switch (uhp->uh_type) {
+#ifdef DW780
+ case DW780:
uba->uba_cr = UBACR_ADINIT;
uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
;
break;
#endif
uba->uba_cr = UBACR_ADINIT;
uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
while ((uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
;
break;
#endif
-#if VAX750
- case VAX_750:
+#ifdef DW750
+ case DW750:
-#if VAX730
- case VAX_730:
+#ifdef DW730
+ case DW730:
-#if VAX630
- case VAX_630:
-#if defined(VAX750) || defined(VAX730) || defined(VAX630)
+#if DW750 || DW730 || QBA
mtpr(IUR, 0);
/* give devices time to recover from power fail */
/* THIS IS PROBABLY UNNECESSARY */
DELAY(500000);
/* END PROBABLY UNNECESSARY */
mtpr(IUR, 0);
/* give devices time to recover from power fail */
/* THIS IS PROBABLY UNNECESSARY */
DELAY(500000);
/* END PROBABLY UNNECESSARY */
+#ifdef QBA
+ /*
+ * Re-enable local memory access
+ * from the Q-bus.
+ */
+ if (uhp->uh_type == QBA) {
+ if (isphys)
+ *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
+ else
+ *(uhp->uh_iopage + QIPCR) = Q_LMEAE;
+ }
+#endif QBA
+#endif DW750 || DW730 || QBA
-#if defined(VAX780) || defined(VAX8600)
int ubawedgecnt = 10;
int ubacrazy = 500;
int zvcnt_max = 5000; /* in 8 sec */
int ubawedgecnt = 10;
int ubacrazy = 500;
int zvcnt_max = 5000; /* in 8 sec */
-#if defined(VAX780) || defined(VAX8600)
- * On a 780, throw away any map registers disabled by rounding
+ * On a DW780, throw away any map registers disabled by rounding
* the map disable in the configuration register
* up to the next 8K boundary, or below the last unibus memory.
*/
* the map disable in the configuration register
* up to the next 8K boundary, or below the last unibus memory.
*/
- if ((cpu == VAX_780) || (cpu == VAX_8600)) {
+ if (uh->uh_type == DW780) {
register i;
i = btop(((uh->uh_lastmem + 8191) / 8192) * 8192);
register i;
i = btop(((uh->uh_lastmem + 8191) / 8192) * 8192);
* the configuration register is setup to disable UBA
* response on DMA transfers to addresses controlled
* by the disabled mapping registers.
* the configuration register is setup to disable UBA
* response on DMA transfers to addresses controlled
* by the disabled mapping registers.
- * On a 780, should only be called from ubameminit, or in ascending order
+ * On a DW780, should only be called from ubameminit, or in ascending order
* from 0 with 8K-sized and -aligned addresses; freeing memory that isn't
* the last unibus memory would free unusable map registers.
* Doalloc is 1 to allocate, 0 to deallocate.
* from 0 with 8K-sized and -aligned addresses; freeing memory that isn't
* the last unibus memory would free unusable map registers.
* Doalloc is 1 to allocate, 0 to deallocate.
if (a) {
register int i, *m;
if (a) {
register int i, *m;
- m = (int *)&uh->uh_uba->uba_map[a - 1];
+ m = (int *)&uh->uh_mr[a - 1];
for (i = 0; i < npg; i++)
*m++ = 0; /* All off, especially 'valid' */
i = addr + npg * 512;
for (i = 0; i < npg; i++)
*m++ = 0; /* All off, especially 'valid' */
i = addr + npg * 512;
uh->uh_lastmem = i;
else if (doalloc == 0 && i == uh->uh_lastmem)
uh->uh_lastmem = addr;
uh->uh_lastmem = i;
else if (doalloc == 0 && i == uh->uh_lastmem)
uh->uh_lastmem = addr;
-#if defined(VAX780) || defined(VAX8600)
/*
* On a 780, set up the map register disable
* field in the configuration register. Beware
/*
* On a 780, set up the map register disable
* field in the configuration register. Beware
* or in sections other than 8K multiples.
* Ubameminit handles such requests properly, however.
*/
* or in sections other than 8K multiples.
* Ubameminit handles such requests properly, however.
*/
- if ((cpu == VAX_780) || (cpu == VAX_8600)) {
+ if (uh->uh_type == DW780) {
i = uh->uh_uba->uba_cr &~ 0x7c000000;
i |= ((uh->uh_lastmem + 8191) / 8192) << 26;
uh->uh_uba->uba_cr = i;
i = uh->uh_uba->uba_cr &~ 0x7c000000;
i |= ((uh->uh_lastmem + 8191) / 8192) << 26;
uh->uh_uba->uba_cr = i;
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
- * @(#)ubareg.h 7.1 (Berkeley) %G%
+ * @(#)ubareg.h 7.2 (Berkeley) %G%
- * VAX UNIBUS adapter registers
+ * VAX UNIBUS adapter definitions
- * size of unibus address space in pages
+ * "UNIBUS" adaptor types.
+ * This code is used for both UNIBUSes and Q-buses
+ * with different types of adaptors.
+ * Definition of a type includes support code for that type.
+#if VAX780 || VAX8600
+#define DW780 1 /* has adaptor regs, sr: 780/785/8600 */
+#endif
+
+#if VAX750
+#define DW750 2 /* has adaptor regs, no sr: 750, 730 */
+#endif
+
+#if VAX730
+#define DW730 3 /* has adaptor regs, no sr: 750, 730 */
+#endif
+
+#if VAX630
+#define QBA 4 /* 22-bit Q-bus, no adaptor regs: uVAX II */
+#endif
+
+#if VAX8200 || VAX8500 || VAX8800
+#define DWBUA 5 /* BI UNIBUS adaptor: 8200/8500/8800 */
+#endif
- * Number of UNIBUS map registers. We can't use the last 8k of UNIBUS
- * address space for i/o transfers since it is used by the devices,
- * hence have slightly less than 256K of UNIBUS address space.
+ * Size of unibus memory address space in pages
+ * (also number of map registers).
+ * QBAPAGES should be 8192, but umem needs to be expanded.
+#define UBAPAGES 496
+#define NUBMREG 496
+#define QBAPAGES UBAPAGES /* for now; should be 8192 */
+#define UBAIOPAGES 16
- * UBA hardware registers
+ * DW780/DW750 hardware registers
int uba_brrvr[4]; /* receive vector registers */
int uba_dpr[16]; /* buffered data path register */
int pad2[480];
int uba_brrvr[4]; /* receive vector registers */
int uba_dpr[16]; /* buffered data path register */
int pad2[480];
- struct pte uba_map[NUBMREG]; /* unibus map register */
- int pad3[16]; /* no maps for device address space */
+ struct pte uba_map[UBAPAGES]; /* unibus map register */
+ int pad3[UBAIOPAGES]; /* no maps for device address space */
-#if defined(VAX780) || defined(VAX8600)
/* uba_cnfgr */
#define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
#define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
/* uba_cnfgr */
#define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */
#define UBACNFGR_UBPDN 0x00020000 /* unibus power down */
-#if defined(VAX780) || defined(VAX8600)
#define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
#define UBADPR_BTE 0x40000000 /* buffer transfer error */
#define UBADPR_DPF 0x20000000 /* DP function (RO) */
#define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
#define UBADPR_BTE 0x40000000 /* buffer transfer error */
#define UBADPR_DPF 0x20000000 /* DP function (RO) */
#else
#define UBA_PURGE780(uba, bdp)
#endif
#else
#define UBA_PURGE780(uba, bdp)
#endif
#define UBADPR_ERROR 0x80000000 /* error occurred */
#define UBADPR_NXM 0x40000000 /* nxm from memory */
#define UBADPR_UCE 0x20000000 /* uncorrectable error */
#define UBADPR_ERROR 0x80000000 /* error occurred */
#define UBADPR_NXM 0x40000000 /* nxm from memory */
#define UBADPR_UCE 0x20000000 /* uncorrectable error */
-#if defined(VAX8600) || defined(VAX780) || defined(VAX750)
#define UBAPURGE(uba, bdp) { \
switch (cpu) { \
case VAX_8600: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \
case VAX_750: UBA_PURGE750((uba), (bdp)); break; \
} \
}
#define UBAPURGE(uba, bdp) { \
switch (cpu) { \
case VAX_8600: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \
case VAX_750: UBA_PURGE750((uba), (bdp)); break; \
} \
}
-#endif
-#if !defined(VAX8600) && !defined(VAX780) && !defined(VAX750)
#define UBAPURGE(uba, bdp)
#endif
#define UBAPURGE(uba, bdp)
#endif
* Number of unibus buffered data paths and possible uba's per cpu type.
*/
#define NBDP8600 15
* Number of unibus buffered data paths and possible uba's per cpu type.
*/
#define NBDP8600 15
-#define NBDP780 15
-#define NBDP750 3
-#define NBDP730 0
-#define NBDP630 0
-#define MAXNBDP 15
+#define NBDP780 15
+#define NBDP750 3
+#define NBDP730 0
+#define MAXNBDP 15
/*
* Symbolic BUS addresses for UBAs.
*/
#if VAX630
/*
* Symbolic BUS addresses for UBAs.
*/
#if VAX630
-#define UMEM630 ((u_short *)(0x1ffc2000))
+#define QBAMAP630 ((struct pte *)0x20088000)
+#define QMEM630 0x30000000
+#define QIOPAGE630 0x20000000
+/*
+ * Q-bus control registers
+ */
+#define QIPCR 0x1f40 /* from start of iopage */
+/* bits in QIPCR */
+#define Q_DBIRQ 0x0001 /* doorbell interrupt request */
+#define Q_LMEAE 0x0020 /* local mem external access enable */
+#define Q_DBIIE 0x0040 /* doorbell interrupt enable */
+#define Q_AUXHLT 0x0100 /* auxiliary processor halt */
+#define Q_DMAQPE 0x8000 /* Q22 bus address space parity error */
-#define UMEM730 ((u_short *)(0xfc0000))
+#define UMEM730 0xfc0000
-#define UMEM750(i) ((u_short *)(0xfc0000-(i)*0x40000))
+#define UMEM750(i) (0xfc0000-(i)*0x40000)
-#define UMEM780(i) ((u_short *)(0x20100000+(i)*0x40000))
+#define UMEM780(i) (0x20100000+(i)*0x40000)
-#define UMEMA8600(i) ((u_short *)(0x20100000+(i)*0x40000))
-#define UMEMB8600(i) ((u_short *)(0x22100000+(i)*0x40000))
+#define UMEMA8600(i) (0x20100000+(i)*0x40000)
+#define UMEMB8600(i) (0x22100000+(i)*0x40000)
#endif
/*
* Macro to offset a UNIBUS device address, often expressed as
#endif
/*
* Macro to offset a UNIBUS device address, often expressed as
- * something like 0172520 by forcing it into the last 8K of UNIBUS memory
- * space.
+ * something like 0172520, by forcing it into the last 8K
+ * of UNIBUS memory space.
-#define ubdevreg(addr) (0760000|((addr)&017777))
-
+#define ubdevreg(addr) ((addr) & 017777)
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
* All rights reserved. The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
- * @(#)ubavar.h 7.1 (Berkeley) %G%
+ * @(#)ubavar.h 7.2 (Berkeley) %G%
* wait states are also recorded here.
*/
struct uba_hd {
* wait states are also recorded here.
*/
struct uba_hd {
- struct uba_regs *uh_uba; /* virt addr of uba */
- struct uba_regs *uh_physuba; /* phys addr of uba */
+ int uh_type; /* type of adaptor */
+ struct uba_regs *uh_uba; /* virt addr of uba adaptor regs */
+ struct uba_regs *uh_physuba; /* phys addr of uba adaptor regs */
+ struct pte *uh_mr; /* start of page map */
+ int uh_memsize; /* size of uba memory, pages */
+ caddr_t uh_mem; /* start of uba memory address space */
+ caddr_t uh_iopage; /* start of uba io page */
int (**uh_vec)(); /* interrupt vector */
struct uba_device *uh_actf; /* head of queue to transfer */
struct uba_device *uh_actl; /* tail of queue to transfer */
int (**uh_vec)(); /* interrupt vector */
struct uba_device *uh_actf; /* head of queue to transfer */
struct uba_device *uh_actl; /* tail of queue to transfer */
struct map *uh_map; /* buffered data path regs free */
};
struct map *uh_map; /* buffered data path regs free */
};
/*
* Per-controller structure.
* (E.g. one for each disk and tape controller, and other things
/*
* Per-controller structure.
* (E.g. one for each disk and tape controller, and other things
struct uba_ctlr *ui_mi;
struct uba_hd *ui_hd;
};
struct uba_ctlr *ui_mi;
struct uba_hd *ui_hd;
};
/*
* Per-driver structure.
/*
* Per-driver structure.
/*
* UNIbus device address space is mapped by UMEMmap
* into virtual address umem[][].
/*
* UNIbus device address space is mapped by UMEMmap
* into virtual address umem[][].
+ * The IO page is mapped to the last 8K of each.
+ * This should be enlarged for the Q22 bus.
*/
extern struct pte UMEMmap[][512]; /* uba device addr pte's */
extern char umem[][512*NBPG]; /* uba device addr space */
*/
extern struct pte UMEMmap[][512]; /* uba device addr pte's */
extern char umem[][512*NBPG]; /* uba device addr space */
* Since some VAXen vector their unibus interrupts
* just adjacent to the system control block, we must
* allocate space there when running on ``any'' cpu. This space is
* Since some VAXen vector their unibus interrupts
* just adjacent to the system control block, we must
* allocate space there when running on ``any'' cpu. This space is
- * used for the vectors for uba0 and uba1 on all cpu's.
+ * used for the vectors for uba0 and uba1 on all cpu's but 8600's.
*/
extern int (*UNIvec[])(); /* unibus vec for uba0 */
#if NUBA > 1
*/
extern int (*UNIvec[])(); /* unibus vec for uba0 */
#if NUBA > 1
#if defined(VAX780) || defined(VAX8600)
/*
#if defined(VAX780) || defined(VAX8600)
/*
- * On 780's, we must set the scb vectors for the nexus of the
+ * On DW780's, we must set the scb vectors for the nexus of the
* UNIbus adaptors to vector to locore unibus adaptor interrupt dispatchers
* which make 780's look like the other VAXen.
*/
* UNIbus adaptors to vector to locore unibus adaptor interrupt dispatchers
* which make 780's look like the other VAXen.
*/
projects / unix-history / commitdiff