cleanup with new soft interrupts and new ctlr scheme

SCCS-vsn: sys/vax/uba/dh.c 4.15
SCCS-vsn: sys/vax/uba/dz.c 4.12

diff --git a/usr/src/sys/vax/uba/dh.c b/usr/src/sys/vax/uba/dh.c
index 9f226f1..3a42258 100644 (file)
--- a/usr/src/sys/vax/uba/dh.c
+++ b/usr/src/sys/vax/uba/dh.c
@@ -1,10 +1,10 @@
-/*     dh.c    4.14    81/02/15        */
+/*     dh.c    4.15    81/02/16        */

 
 #include "dh.h"
 #if NDH11 > 0
 
 #include "dh.h"
 #if NDH11 > 0

+#define        DELAY(i)        { register int j = i; while (--j > 0); }

 /*
  * DH-11 driver
 /*
  * DH-11 driver

- *

  * DOESNT HANDLE EXTENDED ADDRESS BITS.
  */
 
  * DOESNT HANDLE EXTENDED ADDRESS BITS.
  */
 


@@ -21,21 +21,16 @@
 #include "../h/clist.h"
 #include "../h/mx.h"
 
 #include "../h/clist.h"
 #include "../h/mx.h"
 

-/* This is to block the clock because we are using the silos */
-/* SHOULD RATHER QUEUE SOFTWARE INTERRUPT AT CLOCK TIME */
-#define        spl5    spl6
-
-#define        UBACVT(x,uban) (cbase[uban] + (short)((x)-(char *)cfree))
+#define        UBACVT(x,uban) (cbase[uban] + ((x)-(char *)cfree))

 
 int    dhcntrlr(), dhslave(), dhrint(), dhxint();
 struct uba_dinfo *dhinfo[NDH11];
 u_short        dhstd[] = { 0 };
 struct uba_driver dhdriver =
 
 int    dhcntrlr(), dhslave(), dhrint(), dhxint();
 struct uba_dinfo *dhinfo[NDH11];
 u_short        dhstd[] = { 0 };
 struct uba_driver dhdriver =

-       { dhcntrlr, dhslave, (int (*)())0, 0, 0, dhstd, "dh", dhinfo };
+       { dhcntrlr, dhslave, 0, 0, dhstd, "dh", dhinfo };

 
 struct tty dh11[NDH11*16];
 int    dhact;
 
 struct tty dh11[NDH11*16];
 int    dhact;

-int    dhisilo;

 int    ndh11   = NDH11*16;
 int    dhstart();
 int    ttrstrt();
 int    ndh11   = NDH11*16;
 int    dhstart();
 int    ttrstrt();


@@ -54,24 +49,32 @@ int cbase[MAXNUBA];
 #define        OPAR    040
 #define        HDUPLX  040000
 
 #define        OPAR    040
 #define        HDUPLX  040000
 

-#define        MAINT   01000
-#define        IENAB   030100
-#define        NXM     02000
-#define        CLRNXM  0400
-#define        PERROR  010000
-#define        FRERROR 020000
-#define        OVERRUN 040000
-#define        XINT    0100000
-#define        RINT    0100
-#define        SSPEED  7       /* standard speed: 300 baud */
+/* Bits in dhcsr */
+#define        DH_TI   0100000         /* transmit interrupt */
+#define        DH_SI   0040000         /* storage interrupt */
+#define        DH_TIE  0020000         /* transmit interrupt enable */
+#define        DH_SIE  0010000         /* storage interrupt enable */
+#define        DH_MC   0004000         /* master clear */
+#define        DH_NXM  0002000         /* non-existant memory */
+#define        DH_MM   0001000         /* maintenance mode */
+#define        DH_CNI  0000400         /* clear non-existant memory interrupt */
+#define        DH_RI   0000200         /* receiver interrupt */
+#define        DH_RIE  0000100         /* receiver interrupt enable */
+
+#define        DH_IE   (DH_TIE|DH_SIE|DH_RIE)
+
+/* Bits in dhrcr */
+#define        DH_PE   010000          /* parity error */
+#define        DH_FE   020000          /* framing error */
+#define        DH_DO   040000          /* data overrun */

 
 /*
  * DM control bits
  */
 
 /*
  * DM control bits
  */

-#define        TURNON  03      /* CD lead + line enable */
-#define        TURNOFF 01      /* line enable */
-#define        DTR     02      /* data terminal ready */
-#define        RQS     04      /* request to send */
+#define        DM_ON   03      /* CD lead + line enable */
+#define        DM_OFF  01      /* line enable */
+#define        DM_DTR  02      /* data terminal ready */
+#define        DM_RQS  04      /* request to send */

 
 /*
  * Software copy of last dhbar
 
 /*
  * Software copy of last dhbar


@@ -81,42 +84,52 @@ short       dhsar[NDH11];
 struct device
 {
        union {
 struct device
 {
        union {

-               short   dhcsr;
-               char    dhcsrl;
+               short   dhcsr;          /* control-status register */
+               char    dhcsrl;         /* low byte for line select */

        } un;
        } un;

-       short   dhnxch;
-       short   dhlpr;
-       unsigned short  dhcar;
-       short   dhbcr;
-       unsigned short  dhbar;
-       short   dhbreak;
-       short   dhsilo;
+       short   dhrcr;                  /* receive character register */
+       short   dhlpr;                  /* line parameter register */
+       u_short dhcar;                  /* current address register */
+       short   dhbcr;                  /* byte count register */
+       u_short dhbar;                  /* buffer active register */
+       short   dhbreak;                /* break control register */
+       short   dhsilo;                 /* silo status register */

 };
 
 };
 

+/*
+ * Routine for configuration to force a dh to interrupt.
+ * Set to transmit at 9600 baud, and cause a transmitter interrupt.
+ */

 dhcntrlr(ui, reg)
        struct uba_dinfo *ui;
        caddr_t reg;
 {
 dhcntrlr(ui, reg)
        struct uba_dinfo *ui;
        caddr_t reg;
 {

-       struct device *dhaddr = (struct device *)reg;
+       register int br, cvec;
+       register struct device *dhaddr = (struct device *)reg;

        int i;
 
        int i;
 

-       dhaddr->un.dhcsr = IENAB;
+       dhaddr->un.dhcsr = DH_TIE;
+       DELAY(5);
+       dhaddr->dhlpr = (B9600 << 10) | (B9600 << 6) | BITS7|PENABLE;

        dhaddr->dhbcr = -1;
        dhaddr->dhbcr = -1;

-       dhaddr->dhbar = 1;

        dhaddr->dhcar = 0;
        dhaddr->dhcar = 0;

-       for (i = 0; i < 1000000; i++)
-               ;
-       /* we should have had an interrupt */
+       dhaddr->dhbar = 1;
+       DELAY(100000);          /* wait 1/10'th of a sec for interrupt */

        dhaddr->un.dhcsr = 0;
        dhaddr->un.dhcsr = 0;

-       asm("cmpl r10,$0x200;beql 1f;subl2 $4,r10;1:;");
+       if (cvec && cvec != 0x200)
+               cvec -= 4;              /* transmit -> receive */
+       return (1);

 }
 
 }
 

+/*
+ * Routine called to init slave tables.
+ */

 dhslave(ui, reg, slaveno)
        struct uba_dinfo *ui;
        caddr_t reg;
 {
 
 dhslave(ui, reg, slaveno)
        struct uba_dinfo *ui;
        caddr_t reg;
 {
 

-       /* could fill in local tables for the dh here */
+       /* no tables to set up */

 }
 
 /*
 }
 
 /*


@@ -151,16 +164,19 @@ dhopen(dev, flag)
                dh_ubinfo[ui->ui_ubanum] =
                    uballoc(ui->ui_ubanum, (caddr_t)cfree,
                        512+NCLIST*sizeof(struct cblock), 0);
                dh_ubinfo[ui->ui_ubanum] =
                    uballoc(ui->ui_ubanum, (caddr_t)cfree,
                        512+NCLIST*sizeof(struct cblock), 0);

-               cbase[ui->ui_ubanum] = (short)dh_ubinfo[ui->ui_ubanum];
+               cbase[ui->ui_ubanum] = dh_ubinfo[ui->ui_ubanum]&0x3ffff;
+       }
+       if ((dhact&(1<<dh)) == 0) {
+               addr->un.dhcsr |= DH_IE;
+               addr->dhsilo = 16;
+               dhact |= (1<<dh);

        }
        splx(s);
        }
        splx(s);

-       addr->un.dhcsr |= IENAB;
-       dhact |= (1<<dh);

        if ((tp->t_state&ISOPEN) == 0) {
                ttychars(tp);
                if (tp->t_ispeed == 0) {
        if ((tp->t_state&ISOPEN) == 0) {
                ttychars(tp);
                if (tp->t_ispeed == 0) {

-                       tp->t_ispeed = SSPEED;
-                       tp->t_ospeed = SSPEED;
+                       tp->t_ispeed = B300;
+                       tp->t_ospeed = B300;

                        tp->t_flags = ODDP|EVENP|ECHO;
                }
                dhparam(unit);
                        tp->t_flags = ODDP|EVENP|ECHO;
                }
                dhparam(unit);


@@ -187,13 +203,9 @@ dhclose(dev, flag)
        unit = minor(dev);
        tp = &dh11[unit];
        (*linesw[tp->t_line].l_close)(tp);
        unit = minor(dev);
        tp = &dh11[unit];
        (*linesw[tp->t_line].l_close)(tp);

-       /*
-        * Turn of the break bit in case somebody did a TIOCSBRK without
-        * a TIOCCBRK.
-        */

        ((struct device *)(tp->t_addr))->dhbreak &= ~(1<<(unit&017));
        if (tp->t_state&HUPCLS || (tp->t_state&ISOPEN)==0)
        ((struct device *)(tp->t_addr))->dhbreak &= ~(1<<(unit&017));
        if (tp->t_state&HUPCLS || (tp->t_state&ISOPEN)==0)

-               dmctl(unit, TURNOFF, DMSET);
+               dmctl(unit, DM_OFF, DMSET);

        ttyclose(tp);
 }
 
        ttyclose(tp);
 }
 


@@ -234,11 +246,15 @@ dhrint(dh)
        register struct uba_dinfo *ui;
        int s;
 
        register struct uba_dinfo *ui;
        int s;
 

-       s = spl6();     /* see comment in clock.c */

        ui = dhinfo[dh];
        ui = dhinfo[dh];

+       if (ui == 0) {
+               printf("stray dhrint %d\n", dh);
+               asm("halt");
+               return;
+       }

        addr = (struct device *)ui->ui_addr;
        tp0 = &dh11[dh*16];
        addr = (struct device *)ui->ui_addr;
        tp0 = &dh11[dh*16];

-       while ((c = addr->dhnxch) < 0) {        /* char. present */
+       while ((c = addr->dhrcr) < 0) { /* char. present */

                tp = tp0 + ((c>>8)&017);
                if (tp >= &dh11[NDH11*16])
                        continue;
                tp = tp0 + ((c>>8)&017);
                if (tp >= &dh11[NDH11*16])
                        continue;


@@ -246,28 +262,23 @@ dhrint(dh)
                        wakeup((caddr_t)tp);
                        continue;
                }
                        wakeup((caddr_t)tp);
                        continue;
                }

-               if (c&PERROR)
+               if (c&DH_PE)

                        if ((tp->t_flags&(EVENP|ODDP))==EVENP
                         || (tp->t_flags&(EVENP|ODDP))==ODDP )
                                continue;
                        if ((tp->t_flags&(EVENP|ODDP))==EVENP
                         || (tp->t_flags&(EVENP|ODDP))==ODDP )
                                continue;

-               if (c&OVERRUN)
+               if (c&DH_DO)

                        printf("O");
                        printf("O");

-               if (c&FRERROR)          /* break */
+               if (c&DH_FE)            /* break */

                        if (tp->t_flags&RAW)
                                c = 0;  /* null (for getty) */
                        else
                        if (tp->t_flags&RAW)
                                c = 0;  /* null (for getty) */
                        else

-#ifdef IIASA
-                               continue;
-#else

                                c = tun.t_intrc;
                                c = tun.t_intrc;

-#endif

                if (tp->t_line == NETLDISC) {
                        c &= 0177;
                        BKINPUT(c, tp);
                } else
                        (*linesw[tp->t_line].l_rint)(c,tp);
        }
                if (tp->t_line == NETLDISC) {
                        c &= 0177;
                        BKINPUT(c, tp);
                } else
                        (*linesw[tp->t_line].l_rint)(c,tp);
        }

-       splx(s);

 }
 
 /*
 }
 
 /*


@@ -295,10 +306,10 @@ dhioctl(dev, cmd, addr, flag)
                ((struct device *)(tp->t_addr))->dhbreak &= ~(1<<(unit&017));
                break;
        case TIOCSDTR:
                ((struct device *)(tp->t_addr))->dhbreak &= ~(1<<(unit&017));
                break;
        case TIOCSDTR:

-               dmctl(unit, DTR|RQS, DMBIS);
+               dmctl(unit, DM_DTR|DM_RQS, DMBIS);

                break;
        case TIOCCDTR:
                break;
        case TIOCCDTR:

-               dmctl(unit, DTR|RQS, DMBIC);
+               dmctl(unit, DM_DTR|DM_RQS, DMBIC);

                break;
        default:
                u.u_error = ENOTTY;
                break;
        default:
                u.u_error = ENOTTY;


@@ -320,13 +331,10 @@ dhparam(unit)
        tp = &dh11[unit];
        addr = (struct device *)tp->t_addr;
        s = spl5();
        tp = &dh11[unit];
        addr = (struct device *)tp->t_addr;
        s = spl5();

-       addr->un.dhcsrl = (unit&017) | IENAB;
-       /*
-        * Hang up line?
-        */
+       addr->un.dhcsrl = (unit&017) | DH_IE;

        if ((tp->t_ispeed)==0) {
                tp->t_state |= HUPCLS;
        if ((tp->t_ispeed)==0) {
                tp->t_state |= HUPCLS;

-               dmctl(unit, TURNOFF, DMSET);
+               dmctl(unit, DM_OFF, DMSET);

                return;
        }
        lpar = ((tp->t_ospeed)<<10) | ((tp->t_ispeed)<<6);
                return;
        }
        lpar = ((tp->t_ospeed)<<10) | ((tp->t_ispeed)<<6);


@@ -359,15 +367,13 @@ dhxint(dh)
        register unit;
        int s;
 
        register unit;
        int s;
 

-       s = spl6();     /* block the clock */

        ui = dhinfo[dh];
        addr = (struct device *)ui->ui_addr;
        ui = dhinfo[dh];
        addr = (struct device *)ui->ui_addr;

-       addr->un.dhcsr &= (short)~XINT;
-       if (addr->un.dhcsr & NXM) {
-               asm("halt");
-               addr->un.dhcsr |= CLRNXM;
-               printf("dh clr NXM\n");
+       if (addr->un.dhcsr & DH_NXM) {
+               addr->un.dhcsr |= DH_CNI;
+               printf("dh%d NXM\n", ui->ui_ctlr);

        }
        }

+       addr->un.dhcsr &= (short)~DH_TI;

        sbar = &dhsar[dh];
        bar = *sbar & ~addr->dhbar;
        unit = dh * 16; ttybit = 1;
        sbar = &dhsar[dh];
        bar = *sbar & ~addr->dhbar;
        unit = dh * 16; ttybit = 1;


@@ -380,9 +386,10 @@ dhxint(dh)
                        if (tp->t_state&FLUSH)
                                tp->t_state &= ~FLUSH;
                        else {
                        if (tp->t_state&FLUSH)
                                tp->t_state &= ~FLUSH;
                        else {

-                               addr->un.dhcsrl = (unit&017)|IENAB;
+                               addr->un.dhcsrl = (unit&017)|DH_IE;

                                ndflush(&tp->t_outq,
                                ndflush(&tp->t_outq,

-                                   (int)(short)addr->dhcar-
+                                   /* SHOULD PASTE ON 16&17 BITS HERE */
+                                   addr->dhcar-

                                        UBACVT(tp->t_outq.c_cf,ui->ui_ubanum));
                        }
                        if (tp->t_line)
                                        UBACVT(tp->t_outq.c_cf,ui->ui_ubanum));
                        }
                        if (tp->t_line)


@@ -391,7 +398,6 @@ dhxint(dh)
                                dhstart(tp);
                }
        }
                                dhstart(tp);
                }
        }

-       splx(s);

 }
 
 /*
 }
 
 /*


@@ -435,7 +441,8 @@ dhstart(tp)
                }
        }
        if (nch) {
                }
        }
        if (nch) {

-               addr->un.dhcsrl = (unit&017)|IENAB;
+               /* SHOULD PASTE ON BITS 16&17 HERE */
+               addr->un.dhcsrl = (unit&017)|DH_IE;

                addr->dhcar = UBACVT(tp->t_outq.c_cf, 
                    dhinfo[dh]->ui_ubanum);
                addr->dhbcr = -nch;
                addr->dhcar = UBACVT(tp->t_outq.c_cf, 
                    dhinfo[dh]->ui_ubanum);
                addr->dhbcr = -nch;


@@ -450,7 +457,6 @@ out:
 
 /*
  * Stop output on a line.
 
 /*
  * Stop output on a line.

- * Assume call is made at spl6.

  */
 /*ARGSUSED*/
 dhstop(tp, flag)
  */
 /*ARGSUSED*/
 dhstop(tp, flag)


@@ -463,7 +469,7 @@ register struct tty *tp;
        s = spl6();
        if (tp->t_state & BUSY) {
                unit = minor(tp->t_dev);
        s = spl6();
        if (tp->t_state & BUSY) {
                unit = minor(tp->t_dev);

-               addr->un.dhcsrl = (unit&017) | IENAB;
+               addr->un.dhcsrl = (unit&017) | DH_IE;

                if ((tp->t_state&TTSTOP)==0)
                        tp->t_state |= FLUSH;
                addr->dhbcr = -1;
                if ((tp->t_state&TTSTOP)==0)
                        tp->t_state |= FLUSH;
                addr->dhbcr = -1;


@@ -471,34 +477,6 @@ register struct tty *tp;
        splx(s);
 }
 
        splx(s);
 }
 

-int    dhsilo = 16;
-/*
- * Silo control is fixed strategy
- * here, paralleling only option available
- * on DZ-11.
- */
-/*ARGSUSED*/
-dhtimer()
-{
-       register int dh;
-       register struct device *addr;
-       register struct uba_dinfo *ui;
-
-       dh = 0;
-       do {
-               ui = dhinfo[dh];
-               addr = (struct device *)ui->ui_addr;
-               if (dhact & (1<<dh)) {
-                       if ((dhisilo & (1<<dh)) == 0) {
-                               addr->dhsilo = dhsilo;
-                               dhisilo |= 1<<dh;
-                       }
-                       dhrint(dh);
-               }
-               dh++;
-       } while (dh < NDH11);
-}
-

 /*
  * Reset state of driver if UBA reset was necessary.
  * Reset the csrl and lpr registers on open lines, and
 /*
  * Reset state of driver if UBA reset was necessary.
  * Reset the csrl and lpr registers on open lines, and


@@ -518,19 +496,19 @@ dhreset(uban)
        dh_ubinfo[uban] = uballoc(uban, (caddr_t)cfree,
            512+NCLIST*sizeof (struct cblock), 0);
        cbase[uban] = dh_ubinfo[uban]&0x3ffff;
        dh_ubinfo[uban] = uballoc(uban, (caddr_t)cfree,
            512+NCLIST*sizeof (struct cblock), 0);
        cbase[uban] = dh_ubinfo[uban]&0x3ffff;

-       dhisilo = 0;            /* conservative */

        dh = 0;
        for (dh = 0; dh < NDH11; dh++) {
                ui = dhinfo[dh];
                if (ui == 0 || ui->ui_alive == 0 || ui->ui_ubanum != uban)
                        continue;
        dh = 0;
        for (dh = 0; dh < NDH11; dh++) {
                ui = dhinfo[dh];
                if (ui == 0 || ui->ui_alive == 0 || ui->ui_ubanum != uban)
                        continue;

-               ((struct device *)ui->ui_addr)->un.dhcsr |= IENAB;
+               ((struct device *)ui->ui_addr)->un.dhcsr |= DH_IE;
+               ((struct device *)ui->ui_addr)->dhsilo = 16;

                unit = dh * 16;
                for (i = 0; i < 16; i++) {
                        tp = &dh11[unit];
                        if (tp->t_state & (ISOPEN|WOPEN)) {
                                dhparam(unit);
                unit = dh * 16;
                for (i = 0; i < 16; i++) {
                        tp = &dh11[unit];
                        if (tp->t_state & (ISOPEN|WOPEN)) {
                                dhparam(unit);

-                               dmctl(unit, TURNON, DMSET);
+                               dmctl(unit, DM_ON, DMSET);

                                tp->t_state &= ~BUSY;
                                dhstart(tp);
                        }
                                tp->t_state &= ~BUSY;
                                dhstart(tp);
                        }


@@ -540,6 +518,14 @@ dhreset(uban)
        dhtimer();
 }
 
        dhtimer();
 }
 

+dhtimer()
+{
+       register int dh;
+
+       for (dh = 0; dh < NDH11; dh++)
+               dhrint(dh);
+}
+

 #if DHDM
 #include "../dev/dhdm.c"
 #else
 #if DHDM
 #include "../dev/dhdm.c"
 #else

diff --git a/usr/src/sys/vax/uba/dz.c b/usr/src/sys/vax/uba/dz.c
index 1e0adf4..3a0d465 100644 (file)
--- a/usr/src/sys/vax/uba/dz.c
+++ b/usr/src/sys/vax/uba/dz.c
@@ -1,7 +1,8 @@
-/*     dz.c    4.11    %G%     */
+/*     dz.c    4.12    %G%     */

 
 #include "dz.h"
 #if NDZ11 > 0
 
 #include "dz.h"
 #if NDZ11 > 0

+#define        DELAY(i)        { register int j = i; while (--j > 0); }

 /*
  *  DZ-11 Driver
  */
 /*
  *  DZ-11 Driver
  */


@@ -20,48 +21,34 @@
 #include "../h/file.h"
 #include "../h/mx.h"
 
 #include "../h/file.h"
 #include "../h/mx.h"
 

-/*
- * When running dz's using only SAE (silo alarm) on input
- * it is necessary to call dzrint() at clock interrupt time.
- * This is unsafe unless spl5()s in tty code are changed to
- * spl6()s to block clock interrupts.  Note that the dh driver
- * currently in use works the same way as the dz, even though
- * we could try to more intelligently manage its silo.
- * Thus don't take this out if you have no dz's unless you
- * change clock.c and dhtimer().
- *
- * SHOULD RATHER QUEUE SOFTWARE INTERRUPT AT CLOCK TIME.
- */
-#define        spl5    spl6
- 

 int    dzcntrlr(), dzslave(), dzrint();
 struct uba_dinfo *dzinfo[NDZ11];
 u_short        dzstd[] = { 0 };
 struct uba_driver dzdriver =
 int    dzcntrlr(), dzslave(), dzrint();
 struct uba_dinfo *dzinfo[NDZ11];
 u_short        dzstd[] = { 0 };
 struct uba_driver dzdriver =

-       { dzcntrlr, dzslave, (int (*)())0, 0, 0, dzstd, "dz", dzinfo };
+       { dzcntrlr, dzslave, 0, 0, dzstd, "dz", dzinfo };

 
 

-#define NDZ    (NDZ11*8)
+#define        NDZ     (NDZ11*8)

  
  

-#define BITS7  020
-#define BITS8  030
-#define TWOSB  040
-#define PENABLE        0100
-#define OPAR   0200
+#define        BITS7   020
+#define        BITS8   030
+#define        TWOSB   040
+#define        PENABLE 0100
+#define        OPAR    0200

 #define        CLR     020             /* Reset dz */
 #define        CLR     020             /* Reset dz */

-#define MSE    040             /* Master Scan Enable */
-#define RIE    0100            /* Receiver Interrupt Enable */
+#define        MSE     040             /* Master Scan Enable */
+#define        RIE     0100            /* Receiver Interrupt Enable */

 #define        SAE     010000          /* Silo Alarm Enable */
 #define        SAE     010000          /* Silo Alarm Enable */

-#define TIE    040000          /* Transmit Interrupt Enable */
-#define DZ_IEN (MSE+RIE+TIE+SAE)
-#define PERROR 010000
-#define FRERROR        020000
+#define        TIE     040000          /* Transmit Interrupt Enable */
+#define        DZ_IEN  (MSE+RIE+TIE+SAE)
+#define        PERROR  010000
+#define        FRERROR 020000

 #define        OVERRUN 040000
 #define        OVERRUN 040000

-#define SSPEED 7               /* std speed = 300 baud */
+#define        SSPEED  7               /* std speed = 300 baud */

 
 #define        dzlpr   dzrbuf
 
 #define        dzlpr   dzrbuf

-#define dzmsr  dzbrk
-#define ON     1
-#define OFF    0
+#define        dzmsr   dzbrk
+#define        ON      1
+#define        OFF     0

  
 int    dzstart();
 int    dzxint();
  
 int    dzstart();
 int    dzxint();


@@ -90,16 +77,16 @@ dzcntrlr(ui, reg)
        struct uba_dinfo *ui;
        caddr_t reg;
 {
        struct uba_dinfo *ui;
        caddr_t reg;
 {

-       int     i;              /* NB: NOT REGISTER */
-       struct  device *dzaddr = (struct device *)reg;
+       register int br, cvec;
+       register struct device *dzaddr = (struct device *)reg;

 
        dzaddr->dzcsr = TIE|MSE;
        dzaddr->dztcr = 1;              /* enable any line */
 
        dzaddr->dzcsr = TIE|MSE;
        dzaddr->dztcr = 1;              /* enable any line */

-       for (i = 0; i < 1000000; i++)
-               ;
+       DELAY(100000);

        dzaddr->dzcsr = CLR;            /* reset everything */
        dzaddr->dzcsr = CLR;            /* reset everything */

-       asm("cmpl r10,$0x200;beql 1f;subl2 $4,r10;1:;");
-       return(1);
+       if (cvec && cvec != 0x200)
+               cvec -= 4;
+       return (1);

 }
 
 dzslave(ui, reg, slaveno, uban)
 }
 
 dzslave(ui, reg, slaveno, uban)


@@ -210,42 +197,38 @@ dzrint(dz)
        register int unit;
        int s;
  
        register int unit;
        int s;
  

-       s = spl6();     /* see comment in clock.c */
-       /* as long as we are here, service them all */
-       for (unit = 0; unit < NDZ; unit += 8) {
-               if ((dzact & (1<<(unit>>3))) == 0)
+       if ((dzact & (1<<dz)) == 0)
+               return;
+       unit = dz * 8;
+       dzaddr = dzpdma[unit].p_addr;
+       tp0 = &dz_tty[unit];
+       while ((c = dzaddr->dzrbuf) < 0) {      /* char present */
+               tp = tp0 + ((c>>8)&07);
+               if (tp >= &dz_tty[dz_cnt])
+                       continue;
+               if ((tp->t_state & ISOPEN) == 0) {
+                       wakeup((caddr_t)&tp->t_rawq);

                        continue;
                        continue;

-               dzaddr = dzpdma[unit].p_addr;
-               tp0 = &dz_tty[unit];
-               while ((c = dzaddr->dzrbuf) < 0) {      /* char present */
-                       tp = tp0 + ((c>>8)&07);
-                       if (tp >= &dz_tty[dz_cnt])
-                               continue;
-                       if ((tp->t_state & ISOPEN) == 0) {
-                               wakeup((caddr_t)&tp->t_rawq);
-                               continue;
-                       }
-                       if (c&FRERROR)
-                               /* framing error = break */
-                               if (tp->t_flags & RAW)
-                                       c = 0;          /* null for getty */
-                               else
-                                       c = tun.t_intrc;
-                       if (c&OVERRUN)
-                               printf("o");
-                       if (c&PERROR)   
-                               /* parity error */
-                               if (((tp->t_flags & (EVENP|ODDP)) == EVENP)
-                                 || ((tp->t_flags & (EVENP|ODDP)) == ODDP))
-                                       continue;
-                       if (tp->t_line == NETLDISC) {
-                               c &= 0177;
-                               BKINPUT(c, tp);
-                       } else
-                               (*linesw[tp->t_line].l_rint)(c, tp);

                }
                }

+               if (c&FRERROR)
+                       /* framing error = break */
+                       if (tp->t_flags & RAW)
+                               c = 0;          /* null for getty */
+                       else
+                               c = tun.t_intrc;
+               if (c&OVERRUN)
+                       printf("o");
+               if (c&PERROR)   
+                       /* parity error */
+                       if (((tp->t_flags & (EVENP|ODDP)) == EVENP)
+                         || ((tp->t_flags & (EVENP|ODDP)) == ODDP))
+                               continue;
+               if (tp->t_line == NETLDISC) {
+                       c &= 0177;
+                       BKINPUT(c, tp);
+               } else
+                       (*linesw[tp->t_line].l_rint)(c, tp);

        }
        }

-       splx(s);

 }
  
 /*ARGSUSED*/
 }
  
 /*ARGSUSED*/


@@ -317,8 +300,8 @@ dzxint(tp)
 {
        register struct pdma *dp;
        register s;
 {
        register struct pdma *dp;
        register s;

-       s = spl6();     /* block the clock */

  
  

+       s = spl5();

        dp = (struct pdma *)tp->t_addr;
        tp->t_state &= ~BUSY;
        if (tp->t_state & FLUSH)
        dp = (struct pdma *)tp->t_addr;
        tp->t_state &= ~BUSY;
        if (tp->t_state & FLUSH)


@@ -386,7 +369,7 @@ dzstop(tp, flag)
        register int s;
 
        dp = (struct pdma *)tp->t_addr;
        register int s;
 
        dp = (struct pdma *)tp->t_addr;

-       s = spl6();
+       s = spl5();

        if (tp->t_state & BUSY) {
                dp->p_end = dp->p_mem;
                if ((tp->t_state&TTSTOP)==0)
        if (tp->t_state & BUSY) {
                dp->p_end = dp->p_mem;
                if ((tp->t_state&TTSTOP)==0)


@@ -448,8 +431,10 @@ dzscan()
 
 dztimer()
 {
 
 dztimer()
 {

+       int dz;

 
 

-       dzrint(0);
+       for (dz = 0; dz < NDZ11; dz++)
+               dzrint(dz);

 }
 
 /*
 }
 
 /*