BSD 4_3_Reno development
authorCSRG <csrg@ucbvax.Berkeley.EDU>
Sun, 20 Jul 1986 04:18:18 +0000 (20:18 -0800)
committerCSRG <csrg@ucbvax.Berkeley.EDU>
Sun, 20 Jul 1986 04:18:18 +0000 (20:18 -0800)
Work on file usr/src/sys/tahoealign/align.h
Work on file usr/src/sys/tahoealign/defs.h
Work on file usr/src/sys/tahoealign/Aadd3.c
Work on file usr/src/sys/tahoealign/Aadd2.c
Work on file usr/src/sys/tahoealign/Aadda.c
Work on file usr/src/sys/tahoealign/Aaddd.c
Work on file usr/src/sys/tahoealign/Aaddf.c
Work on file usr/src/sys/tahoealign/Aadwc.c
Work on file usr/src/sys/tahoealign/Aand3.c
Work on file usr/src/sys/tahoealign/Aand2.c
Work on file usr/src/sys/tahoealign/Aaoblss.c
Work on file usr/src/sys/tahoealign/Aaobleq.c
Work on file usr/src/sys/tahoealign/Abispsw.c
Work on file usr/src/sys/tahoealign/Abbs.c
Work on file usr/src/sys/tahoealign/Abicpsw.c
Work on file usr/src/sys/tahoealign/Abbc.c
Work on file usr/src/sys/tahoealign/Acall.c
Work on file usr/src/sys/tahoealign/Abit.c
Work on file usr/src/sys/tahoealign/Acmpd.c
Work on file usr/src/sys/tahoealign/Aclr.c
Work on file usr/src/sys/tahoealign/Acasel.c
Work on file usr/src/sys/tahoealign/Acmp.c
Work on file usr/src/sys/tahoealign/Acmpf2.c
Work on file usr/src/sys/tahoealign/Acmpf.c
Work on file usr/src/sys/tahoealign/Acmpd2.c
Work on file usr/src/sys/tahoealign/Acvfl.c
Work on file usr/src/sys/tahoealign/Acvld.c
Work on file usr/src/sys/tahoealign/Acvdl.c
Work on file usr/src/sys/tahoealign/Acvlf.c
Work on file usr/src/sys/tahoealign/Acvt.c
Work on file usr/src/sys/tahoealign/Acvtlb.c
Work on file usr/src/sys/tahoealign/Adivd.c
Work on file usr/src/sys/tahoealign/Adec.c
Work on file usr/src/sys/tahoealign/Acvtlw.c
Work on file usr/src/sys/tahoealign/Adivl3.c
Work on file usr/src/sys/tahoealign/Adivf.c
Work on file usr/src/sys/tahoealign/Aediv.c
Work on file usr/src/sys/tahoealign/Adivl2.c
Work on file usr/src/sys/tahoealign/Affs.c
Work on file usr/src/sys/tahoealign/Affc.c
Work on file usr/src/sys/tahoealign/Aemul.c
Work on file usr/src/sys/tahoealign/Aget_byte.c
Work on file usr/src/sys/tahoealign/Ainc.c
Work on file usr/src/sys/tahoealign/Aget_long.c
Work on file usr/src/sys/tahoealign/Aldd.c
Work on file usr/src/sys/tahoealign/Ajmp.c
Work on file usr/src/sys/tahoealign/Aget_word.c
Work on file usr/src/sys/tahoealign/Aldf.c
Work on file usr/src/sys/tahoealign/Aldfd.c
Work on file usr/src/sys/tahoealign/Alnd.c
Work on file usr/src/sys/tahoealign/Alnf.c
Work on file usr/src/sys/tahoealign/Amcom.c
Work on file usr/src/sys/tahoealign/Aloadr.c
Work on file usr/src/sys/tahoealign/Amneg.c
Work on file usr/src/sys/tahoealign/Amov.c
Work on file usr/src/sys/tahoealign/Amovob.c
Work on file usr/src/sys/tahoealign/Amova.c
Work on file usr/src/sys/tahoealign/Amovzb.c
Work on file usr/src/sys/tahoealign/Amovpsl.c
Work on file usr/src/sys/tahoealign/Amovzwl.c
Work on file usr/src/sys/tahoealign/Amull2.c
Work on file usr/src/sys/tahoealign/Amulf.c
Work on file usr/src/sys/tahoealign/Amuld.c
Work on file usr/src/sys/tahoealign/Amull3.c
Work on file usr/src/sys/tahoealign/Aor2.c
Work on file usr/src/sys/tahoealign/Aor3.c
Work on file usr/src/sys/tahoealign/Aoperand.c
Work on file usr/src/sys/tahoealign/Aprober.c
Work on file usr/src/sys/tahoealign/Apusha.c
Work on file usr/src/sys/tahoealign/Apush.c
Work on file usr/src/sys/tahoealign/Aprobew.c
Work on file usr/src/sys/tahoealign/Apushx.c
Work on file usr/src/sys/tahoealign/Aput_long.c
Work on file usr/src/sys/tahoealign/Aput_byte.c
Work on file usr/src/sys/tahoealign/Asbwc.c
Work on file usr/src/sys/tahoealign/Aput_word.c
Work on file usr/src/sys/tahoealign/Areadable.c
Work on file usr/src/sys/tahoealign/Aregister.c
Work on file usr/src/sys/tahoealign/Ashll.c
Work on file usr/src/sys/tahoealign/Ashal.c
Work on file usr/src/sys/tahoealign/Ashar.c
Work on file usr/src/sys/tahoealign/Ashlq.c
Work on file usr/src/sys/tahoealign/Ashrl.c
Work on file usr/src/sys/tahoealign/Ashrq.c
Work on file usr/src/sys/tahoealign/Astorer.c
Work on file usr/src/sys/tahoealign/Astd.c
Work on file usr/src/sys/tahoealign/Astf.c
Work on file usr/src/sys/tahoealign/Asub2.c
Work on file usr/src/sys/tahoealign/Asuba.c
Work on file usr/src/sys/tahoealign/Asub3.c
Work on file usr/src/sys/tahoealign/Asubd.c
Work on file usr/src/sys/tahoealign/Awrite_long.c
Work on file usr/src/sys/tahoealign/Asubf.c
Work on file usr/src/sys/tahoealign/Atst.c
Work on file usr/src/sys/tahoealign/Awrite_byte.c
Work on file usr/src/sys/tahoealign/Awrite_quad.c
Work on file usr/src/sys/tahoealign/Awrite_back.c
Work on file usr/src/sys/tahoealign/Awriteable.c
Work on file usr/src/sys/tahoealign/Awrite_word.c
Work on file usr/src/sys/tahoealign/align.c
Work on file usr/src/sys/tahoealign/Axor2.c
Work on file usr/src/sys/tahoealign/Axor3.c
Work on file usr/src/sys/tahoealign/exception.c
Work on file usr/src/sys/tahoealign/table.c

Synthesized-from: CSRG/cd2/4.3reno

104 files changed:
usr/src/sys/tahoealign/Aadd2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aadd3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aadda.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aaddd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aaddf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aadwc.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aand2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aand3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aaobleq.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aaoblss.c [new file with mode: 0644]
usr/src/sys/tahoealign/Abbc.c [new file with mode: 0644]
usr/src/sys/tahoealign/Abbs.c [new file with mode: 0644]
usr/src/sys/tahoealign/Abicpsw.c [new file with mode: 0644]
usr/src/sys/tahoealign/Abispsw.c [new file with mode: 0644]
usr/src/sys/tahoealign/Abit.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acall.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acasel.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aclr.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acmp.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acmpd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acmpd2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acmpf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acmpf2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvdl.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvfl.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvld.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvlf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvt.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvtlb.c [new file with mode: 0644]
usr/src/sys/tahoealign/Acvtlw.c [new file with mode: 0644]
usr/src/sys/tahoealign/Adec.c [new file with mode: 0644]
usr/src/sys/tahoealign/Adivd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Adivf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Adivl2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Adivl3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aediv.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aemul.c [new file with mode: 0644]
usr/src/sys/tahoealign/Affc.c [new file with mode: 0644]
usr/src/sys/tahoealign/Affs.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aget_byte.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aget_long.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aget_word.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ainc.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ajmp.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aldd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aldf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aldfd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Alnd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Alnf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aloadr.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amcom.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amneg.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amov.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amova.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amovob.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amovpsl.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amovzb.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amovzwl.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amuld.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amulf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amull2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Amull3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aoperand.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aor2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aor3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aprober.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aprobew.c [new file with mode: 0644]
usr/src/sys/tahoealign/Apush.c [new file with mode: 0644]
usr/src/sys/tahoealign/Apusha.c [new file with mode: 0644]
usr/src/sys/tahoealign/Apushx.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aput_byte.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aput_long.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aput_word.c [new file with mode: 0644]
usr/src/sys/tahoealign/Areadable.c [new file with mode: 0644]
usr/src/sys/tahoealign/Aregister.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asbwc.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashal.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashar.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashll.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashlq.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashrl.c [new file with mode: 0644]
usr/src/sys/tahoealign/Ashrq.c [new file with mode: 0644]
usr/src/sys/tahoealign/Astd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Astf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Astorer.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asub2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asub3.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asuba.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asubd.c [new file with mode: 0644]
usr/src/sys/tahoealign/Asubf.c [new file with mode: 0644]
usr/src/sys/tahoealign/Atst.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awrite_back.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awrite_byte.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awrite_long.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awrite_quad.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awrite_word.c [new file with mode: 0644]
usr/src/sys/tahoealign/Awriteable.c [new file with mode: 0644]
usr/src/sys/tahoealign/Axor2.c [new file with mode: 0644]
usr/src/sys/tahoealign/Axor3.c [new file with mode: 0644]
usr/src/sys/tahoealign/align.c [new file with mode: 0644]
usr/src/sys/tahoealign/align.h [new file with mode: 0644]
usr/src/sys/tahoealign/defs.h [new file with mode: 0644]
usr/src/sys/tahoealign/exception.c [new file with mode: 0644]
usr/src/sys/tahoealign/table.c [new file with mode: 0644]

diff --git a/usr/src/sys/tahoealign/Aadd2.c b/usr/src/sys/tahoealign/Aadd2.c
new file mode 100644 (file)
index 0000000..ebda281
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Aadd2.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+add2(infop)    process_info *infop;
+/*
+/*     Add , 2 operands.
+/*
+/*****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 + data1;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Aadd3.c b/usr/src/sys/tahoealign/Aadd3.c
new file mode 100644 (file)
index 0000000..84de44b
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Aadd3.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+add3(infop)    process_info *infop;
+/*
+/*     Add , 3 operands.
+/*
+/*****************************************/
+{
+
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 + data1;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/Aadda.c b/usr/src/sys/tahoealign/Aadda.c
new file mode 100644 (file)
index 0000000..1458acd
--- /dev/null
@@ -0,0 +1,14 @@
+/*     Aadda.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+adda(infop)    process_info *infop;
+/*
+/*     Add address.
+/*
+/************************/
+{
+       register long result;
+
+       result = operand(infop,1)->data + operand(infop,0)->data;
+       write_back (infop,result, operand(infop,1));
+}
diff --git a/usr/src/sys/tahoealign/Aaddd.c b/usr/src/sys/tahoealign/Aaddd.c
new file mode 100644 (file)
index 0000000..7a0863b
--- /dev/null
@@ -0,0 +1,18 @@
+/*     Aaddd.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+
+addd(infop)    process_info *infop;
+/*
+/*     Add operand with accumulator to accumulator (double).
+/*
+/*************************************************************/
+{
+       register double         *operand_pnt;
+       register double         *acc_pnt;
+
+       operand_pnt = (double *)&operand(infop,0)->data;
+       acc_pnt = (double *) &acc_high;
+       *acc_pnt = *acc_pnt + *operand_pnt;
+}
+
diff --git a/usr/src/sys/tahoealign/Aaddf.c b/usr/src/sys/tahoealign/Aaddf.c
new file mode 100644 (file)
index 0000000..ebd6c4f
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Aaddf.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+addf(infop)    process_info *infop;
+/*
+/*     Add operand with accumulator to accumulator (float).
+/*
+/*************************************************************/
+{
+       register float  *operand_pnt;
+       register float  *acc_pnt;
+
+       operand_pnt = (float *)&operand(infop,0)->data;
+       acc_pnt = (float *) &acc_high;
+       *acc_pnt = *acc_pnt + *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Aadwc.c b/usr/src/sys/tahoealign/Aadwc.c
new file mode 100644 (file)
index 0000000..8990527
--- /dev/null
@@ -0,0 +1,33 @@
+/*     Aadwc.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+adwc(infop)    process_info *infop;
+/*
+/*     Add with carry.
+/*     Note : the play with 'tmp' just before the 'asm' line makes
+/*             sure that when the adwc opcode is executed, the current
+/*             carry in psl is the same as the 'offending' process'.
+/*             Don't change unless you know exactly what you're doing.
+/*
+/*****************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    tmp;
+
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       if (carry)      /* If process' carry set */
+               tmp = -1;
+       else tmp = 0;
+       tmp++;          /* 0 => carry set.  1 => carry clear */
+
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm("   adwc    r11,r12");
+       asm("   movpsl  r11");
+       New_cc (Register_11);
+
+       write_back(infop, Register_12, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Aand2.c b/usr/src/sys/tahoealign/Aand2.c
new file mode 100644 (file)
index 0000000..c38a06a
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Aand2.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h" 
+and2(infop)    process_info *infop;
+/*
+/*     And , 2 operands.
+/*
+/*****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 & data1;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Aand3.c b/usr/src/sys/tahoealign/Aand3.c
new file mode 100644 (file)
index 0000000..f333008
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Aand3.c 1.1     86/07/20        */
+
+
+
+#include "../tahoealign/align.h" 
+and3(infop)    process_info *infop;
+/*
+/*     And , 3 operands.
+/*
+/*****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 & data1;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/Aaobleq.c b/usr/src/sys/tahoealign/Aaobleq.c
new file mode 100644 (file)
index 0000000..d00ff1d
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Aaobleq.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+aobleq(infop)  process_info *infop;
+/*
+/*     Add one, branch if less or equal.
+/*     Can't use real HW opcodes since we don't want to branch here.
+/*
+/*******************************************/
+{
+       register long limit, index, new_address, complement;
+
+       limit = operand(infop,0)->data;
+       index = operand(infop,1)->data;
+       complement =  limit + ~index;
+       if ( complement < 0){ carry_0; negative_1;} else{negative_0; carry_1;}
+       if ( complement == 0) zero_1; else zero_0;
+       overflow_0;  
+       write_back (infop, index+1, operand(infop,1));
+       new_address = operand(infop,2)->address;
+       if (!negative || zero) pc = new_address;
+}
diff --git a/usr/src/sys/tahoealign/Aaoblss.c b/usr/src/sys/tahoealign/Aaoblss.c
new file mode 100644 (file)
index 0000000..b94352e
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Aaoblss.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+aoblss(infop)  process_info *infop;
+/*
+/*     Add one, branch if less than.
+/*     Can't use real HW opcode, don't want to branch out of here !
+/*
+/*******************************************/
+{
+       register long limit, index, new_address, complement;
+
+       limit = operand(infop,0)->data;
+       index = operand(infop,1)->data;
+       complement =  limit + ~index;
+       if ( complement < 0){ carry_0; negative_1;}else{carry_1; negative_0;}
+       if ( complement == 0) zero_1; else zero_0;
+       overflow_0;
+       write_back (infop,index+1, operand(infop,1));
+       new_address = operand(infop,2)->address;
+       if (!negative && !zero) pc = new_address;
+}
diff --git a/usr/src/sys/tahoealign/Abbc.c b/usr/src/sys/tahoealign/Abbc.c
new file mode 100644 (file)
index 0000000..733a1ea
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Abbc.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+bbc(infop)     process_info *infop;
+/*
+/*     Branch on bit clear.
+/*
+/********************************/
+{
+       register int position,base, new_address;
+
+       position = operand(infop,0)-> data & 0x1f;
+       base = operand(infop,1)->data;
+       new_address = operand(infop,2) -> address;
+       negative_0; zero_1; overflow_0; carry_1;
+       if ( !(base & 1 << position) ) pc = new_address;
+}
diff --git a/usr/src/sys/tahoealign/Abbs.c b/usr/src/sys/tahoealign/Abbs.c
new file mode 100644 (file)
index 0000000..931a3c5
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Abbs.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+bbs(infop)     process_info *infop;
+/*
+/*     Branch on bit set.
+/*
+/********************************/
+{
+       register int position,base, new_address;
+
+       position = operand(infop,0)-> data & 0x1f;
+       base = operand(infop,1)->data;
+       new_address = operand(infop,2) -> address;
+       negative_0; zero_1; overflow_0; carry_1;
+       if  (base & 1 << position) pc = new_address;
+}
diff --git a/usr/src/sys/tahoealign/Abicpsw.c b/usr/src/sys/tahoealign/Abicpsw.c
new file mode 100644 (file)
index 0000000..86a6265
--- /dev/null
@@ -0,0 +1,14 @@
+/*     Abicpsw.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+bicpsw(infop)  process_info *infop;
+/*
+/*     Bits clear in PSW.
+/*
+/*************************************/
+{
+       register int mask;
+
+       mask = operand(infop,0)->data;
+       psl &= ~(mask & 0x7f);
+}
diff --git a/usr/src/sys/tahoealign/Abispsw.c b/usr/src/sys/tahoealign/Abispsw.c
new file mode 100644 (file)
index 0000000..1cefd0a
--- /dev/null
@@ -0,0 +1,14 @@
+/*     Abispsw.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+bispsw(infop)  process_info *infop;
+/*
+/*     Bits set in PSW.
+/*
+/*************************************/
+{
+       register int mask;
+
+       mask = operand(infop,0)->data;
+       psl |= mask & 0x7f;
+}
diff --git a/usr/src/sys/tahoealign/Abit.c b/usr/src/sys/tahoealign/Abit.c
new file mode 100644 (file)
index 0000000..d5ae576
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Abit.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+bit(infop)     process_info *infop;
+/*
+/*     Test set bits
+/*
+/***************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+
+       Register_11 = operand(infop,0)->data;
+       Register_12 = operand(infop,1)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  bitl    r11,r12");
+       asm ("  movpsl  r12");
+       New_cc(Register_12);
+}
diff --git a/usr/src/sys/tahoealign/Acall.c b/usr/src/sys/tahoealign/Acall.c
new file mode 100644 (file)
index 0000000..a65ab6f
--- /dev/null
@@ -0,0 +1,33 @@
+/*     Acall.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+call(infop)
+process_info *infop;
+/*
+/*     Call a procedure with argument list on stack.
+/*
+/******************************************************/
+{
+
+       register long removed, mask, new_address, i, next, temp_fp;
+
+       printf("entering call\n");
+       removed = operand(infop, 0)->data & 0xffff ;
+       printf("after first call to operand\n");
+       new_address = operand(infop, 1)->address;
+       printf("in call, removed = 0x%x , new_address=0x%x \n",removed, new_address);
+       push (infop, fp);
+       temp_fp = sp;
+       mask = get_word (infop, new_address) & 0x1fff;  /* Only bits 12-0 */
+       printf("in call, mask = 0x%x , pc=0x%x \n",mask,pc);
+       push (infop, mask << 16 | removed);
+       push (infop, pc);                               /* Next opcode address */
+       next = 12;                              /* Register # to save */
+       for (i = 0x1000; i != 0; i = i >> 1)
+       { 
+               if ( i & mask ) push (infop,  Register (infop, next));
+               next--; 
+       }
+       fp = temp_fp;
+       pc = new_address + 2;                   /* Transfer control */
+}  
diff --git a/usr/src/sys/tahoealign/Acasel.c b/usr/src/sys/tahoealign/Acasel.c
new file mode 100644 (file)
index 0000000..0e5b811
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Acasel.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+casel(infop)   process_info *infop;
+/*
+/*     Case (longword).
+/*     Can't use real HW opcode, don't want to branch out !
+/*
+/***********************************/
+{
+       register long selector, base;
+       register unsigned temporary, limit;
+
+       selector = operand(infop,0)->data;
+       base = operand(infop,1)->data;
+       limit = operand(infop,2)->data;
+       if (pc & 1) pc += 1;    /* Displacements are aligned ! */
+       temporary = selector - base;
+       if (temporary <= limit)
+               pc = pc + get_word (infop, (char *)(pc + 2*temporary) );
+       else pc = pc + limit*2 + 2;
+}
diff --git a/usr/src/sys/tahoealign/Aclr.c b/usr/src/sys/tahoealign/Aclr.c
new file mode 100644 (file)
index 0000000..a1b3576
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Aclr.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+clr(infop)     process_info *infop;
+/*
+/*     Clear operand
+/*
+/*************************************/
+{
+
+       write_back(infop, 0, operand(infop,0));
+       negative_0;
+       zero_1;
+       overflow_0;
+       carry_1;
+}
diff --git a/usr/src/sys/tahoealign/Acmp.c b/usr/src/sys/tahoealign/Acmp.c
new file mode 100644 (file)
index 0000000..30ae1d8
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Acmp.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+cmp(infop)     process_info *infop;
+/*
+/*     Arithmetic comparison 
+/*
+/**************************************************/
+{
+       register long   Register_12;    /* Has to be first reg ! */
+       register long   Register_11;
+       register long   Register_10;
+
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  cmpl    r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+}
diff --git a/usr/src/sys/tahoealign/Acmpd.c b/usr/src/sys/tahoealign/Acmpd.c
new file mode 100644 (file)
index 0000000..c40b998
--- /dev/null
@@ -0,0 +1,24 @@
+/*     Acmpd.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cmpd(infop)    process_info *infop;
+/*
+/*     Compare accumulator (double) with operand. 
+/*
+/****************************************************/
+{
+       register float  *Register_12;   /* Has to be first reg ! */
+       register float  *Register_11;
+       register long   Register_10;
+
+       Register_12 = (float *) &acc_high;
+       Register_11 = (float *) &operand(infop,0)->data;
+       if ( reserved( *(long *)Register_11 ) )
+                       exception(infop, ILL_OPRND);
+       asm ("  ldd     (r12)");
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  cmpd    (r11)");
+       asm ("  movpsl  r10");
+       New_cc (Register_10);
+}
diff --git a/usr/src/sys/tahoealign/Acmpd2.c b/usr/src/sys/tahoealign/Acmpd2.c
new file mode 100644 (file)
index 0000000..87ad465
--- /dev/null
@@ -0,0 +1,24 @@
+/*     Acmpd2.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cmpd2(infop)   process_info *infop;
+/*
+/*     Compare operand 1 with operand 2 (double). 
+/*
+/****************************************************/
+{
+       register double *Register_12;   /* Has to be first reg ! */
+       register double *Register_11;
+       register long   Register_10;
+
+       Register_12 = (double *) &operand(infop,0)->data;
+       Register_11 = (double *) &operand(infop,1)->data;
+       if ( reserved( *(long *)Register_12 ) ||
+            reserved( *(long *)Register_11 ) )
+                       exception(infop, ILL_OPRND);
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  cmpd2   (r12),(r11)");
+       asm ("  movpsl  r10");
+       New_cc (Register_10);
+}
diff --git a/usr/src/sys/tahoealign/Acmpf.c b/usr/src/sys/tahoealign/Acmpf.c
new file mode 100644 (file)
index 0000000..1d3d5da
--- /dev/null
@@ -0,0 +1,24 @@
+/*     Acmpf.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cmpf(infop)    process_info *infop;
+/*
+/*     Compare accumulator (float) with operand.
+/*
+/*************************************************/
+{
+       register float  *Register_12;   /* Has to be first reg ! */
+       register float  *Register_11;
+       register long   Register_10;
+
+       Register_12 = (float *) &acc_high;
+       Register_11 = (float *) &operand(infop,0)->data;
+       if ( reserved( *(long *)Register_11 ) )
+                       exception(infop, ILL_OPRND);
+       asm ("  ldf     (r12)");
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  cmpf    (r11)");
+       asm ("  movpsl  r10");
+       New_cc (Register_10);
+}
diff --git a/usr/src/sys/tahoealign/Acmpf2.c b/usr/src/sys/tahoealign/Acmpf2.c
new file mode 100644 (file)
index 0000000..02b55e3
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Acmpf2.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cmpf2(infop)   process_info *infop;
+/*
+/*     Compare operand 1 with operand2 (float).
+/*
+/*************************************************/
+{
+       register float  *Register_12;   /* Has to be first reg ! */
+       register float  *Register_11;
+       register long   Register_10;
+
+       Register_12 = (float *) &operand(infop,0)->data;
+       Register_11 = (float *) &operand(infop,1)->data;
+       if ( reserved( *(long *)Register_12 ) ||
+            reserved( *(long *)Register_11 ) )
+                       {exception(infop, ILL_OPRND);}
+
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  cmpf2   (r12),(r11)");
+       asm ("  movpsl  r10");
+       New_cc (Register_10);
+}
diff --git a/usr/src/sys/tahoealign/Acvdl.c b/usr/src/sys/tahoealign/Acvdl.c
new file mode 100644 (file)
index 0000000..4119b5c
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Acvdl.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvdl(infop)    process_info *infop;
+/*
+/*     Convert double precission accumulator into integer.
+/*
+/******************************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        double  *acc_pnt;
+       register        long    result;
+
+       acc_pnt = (double *)&acc_high;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = (long) *acc_pnt;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, result, operand(infop,0) );
+}
diff --git a/usr/src/sys/tahoealign/Acvfl.c b/usr/src/sys/tahoealign/Acvfl.c
new file mode 100644 (file)
index 0000000..ce9abd1
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Acvfl.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvfl(infop)    process_info *infop;
+/*
+/*     Convert single precission accumulator into integer.
+/*
+/******************************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        float   *acc_pnt;
+       register        long    result;
+
+       acc_pnt = (float *)&acc_high;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = (long) *acc_pnt;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, result, operand(infop,0) );
+}
diff --git a/usr/src/sys/tahoealign/Acvld.c b/usr/src/sys/tahoealign/Acvld.c
new file mode 100644 (file)
index 0000000..52fa50c
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Acvld.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvld(infop)    process_info *infop;
+/*
+/*     Convert integer to double (into accumulator).
+/*
+/******************************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        double  *Register_11;
+       register        long    Register_10;
+
+       Register_11 = (double *) &acc_high;
+       Register_10 = operand(infop,0)->data;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  cvld    r10");          /* Don't change the order !! */
+       asm ("  movpsl  r12");
+       asm ("  std     (r11)");
+       New_cc (Register_12);
+}
diff --git a/usr/src/sys/tahoealign/Acvlf.c b/usr/src/sys/tahoealign/Acvlf.c
new file mode 100644 (file)
index 0000000..2169996
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Acvlf.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvlf(infop)    process_info *infop;
+/*
+/*     Convert integer to float (into accumulator).
+/*
+/******************************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        float   *Register_10;
+       /*
+       register        long    Register_9;
+       register        long    Register_8;
+       */
+       register struct oprnd *oppnt;
+
+       Register_11 = operand(infop,0)->data;
+       Register_10 = (float *) &acc_high;
+       Register_12 = psl;
+       Set_psl (r12);  
+       asm ("  cvlf    r11");          /* Don't change the order !! */
+       asm ("  movpsl  r12");
+       asm ("  stf     (r10)");
+       New_cc ( Register_12 );
+}
diff --git a/usr/src/sys/tahoealign/Acvt.c b/usr/src/sys/tahoealign/Acvt.c
new file mode 100644 (file)
index 0000000..efa64b5
--- /dev/null
@@ -0,0 +1,18 @@
+/*     Acvt.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvt(infop)     process_info *infop;
+/*
+/*     Convert , checks overflow
+/*
+/****************************************/
+{
+       register long result;
+
+       result = operand(infop,0)->data;
+       if (result < 0 )  negative_1 ; else negative_0;
+       if (result == 0 )  zero_1 ; else zero_0;
+       carry_1; overflow_0;
+               /* Overflow may be set by writing back */
+       write_back (infop, result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Acvtlb.c b/usr/src/sys/tahoealign/Acvtlb.c
new file mode 100644 (file)
index 0000000..178033a
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Acvtlb.c        1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h"
+cvtlb(infop)   process_info *infop;
+/*
+/*     Convert long to byte, checks overflow
+/*
+/****************************************/
+{
+       register long result;
+
+       result = operand(infop,0)->data;
+       if (result < 0 )  negative_1 ; else negative_0;
+       if (result == 0 )  zero_1 ; else zero_0;
+       carry_1; 
+       if (result > 0x7f || result <= -0x80) overflow_1;
+       else overflow_0;
+       write_back (infop, result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Acvtlw.c b/usr/src/sys/tahoealign/Acvtlw.c
new file mode 100644 (file)
index 0000000..93cdd3f
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Acvtlw.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+cvtlw(infop) 
+process_info *infop;
+/*
+/*     Convert longword to word
+/*
+/****************************************/
+{
+       register long result;
+
+       result = operand(infop,0)->data;
+       if (result < 0 )  negative_1 ; else negative_0;
+       if (result == 0 )  zero_1 ; else zero_0;
+       carry_1; 
+       if (result > 0x7fff || result <= -0x8000) overflow_1;
+       else overflow_0;
+       write_back (infop, result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Adec.c b/usr/src/sys/tahoealign/Adec.c
new file mode 100644 (file)
index 0000000..fc23d65
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Adec.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+dec(infop)     process_info *infop;
+/*
+/*     Decrement operand.
+/*
+/***************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_11 = operand(infop,0)->data;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  decl    r11");                  /* Make sure to use the
+                                                * right opcode */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+
+       write_back (infop,Register_11, operand(infop,0) );
+}      
diff --git a/usr/src/sys/tahoealign/Adivd.c b/usr/src/sys/tahoealign/Adivd.c
new file mode 100644 (file)
index 0000000..fdd9df6
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Adivd.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+divd(infop)    process_info *infop;
+/*
+/*     Divide accumulator by operand to accumulator (double).
+/*
+/*******************************************************************/
+{
+       register double *operand_pnt;
+       register double *acc_pnt;
+
+       operand_pnt = (double *)&operand(infop,0)->data;
+       acc_pnt = (double *) &acc_high;
+       *acc_pnt = *acc_pnt / *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Adivf.c b/usr/src/sys/tahoealign/Adivf.c
new file mode 100644 (file)
index 0000000..bcb8916
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Adivf.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+divf(infop)    process_info *infop;
+/*
+/*     Divide accumulator by operand to accumulator (float).
+/*
+/*******************************************************************/
+{
+       register float  *operand_pnt;
+       register float  *acc_pnt;
+
+       operand_pnt = (float *)&operand(infop,0)->data;
+       acc_pnt = (float *) &acc_high;
+       *acc_pnt = *acc_pnt / *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Adivl2.c b/usr/src/sys/tahoealign/Adivl2.c
new file mode 100644 (file)
index 0000000..ac915a8
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Adivl2.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+divl2(infop)   process_info *infop;
+/*
+/*     Arithmetic division, 2 operands.
+/*
+/**************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    divident, divisor, result;
+
+       divisor = operand(infop,0)->data;
+       divident = operand(infop,1)->data;
+       if (divisor == 0) {
+               exception (infop, ARITHMETIC, 2);
+       } else {
+               Register_12=psl;
+               Set_psl(r12);   /* restore the user psl */
+               result = divident / divisor;
+               asm ("  movpsl  r12");
+               New_cc (Register_12);
+       }
+       write_back (infop,result, operand(infop,1));
+}
+
+
diff --git a/usr/src/sys/tahoealign/Adivl3.c b/usr/src/sys/tahoealign/Adivl3.c
new file mode 100644 (file)
index 0000000..26ecd2f
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Adivl3.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+divl3(infop)   process_info *infop;
+/*
+/*     Arithmetic division, 3 operands.
+/*
+/**************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    divident, divisor, result;
+
+       divisor = operand(infop,0)->data;
+       divident = operand(infop,1)->data;
+       if (divisor == 0) {
+               exception (infop, ARITHMETIC, 2);
+       } else {
+               Register_12=psl;
+               Set_psl(r12);   /* restore the user psl */
+               result = divident / divisor;
+               asm ("  movpsl  r12");
+               New_cc (Register_12);
+       }
+       write_back (infop,result, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Aediv.c b/usr/src/sys/tahoealign/Aediv.c
new file mode 100644 (file)
index 0000000..769500e
--- /dev/null
@@ -0,0 +1,28 @@
+/*     Aediv.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+int    zzz1,zzz2,zzz3,zzz4,zzz5;
+ediv(infop)    process_info *infop;
+/*
+/*     Extended precision division.
+/*
+/***************************************/
+{
+       register long Register_12;      /* Has to be the first reg !! */
+       register long Register_11;      /* remainder */
+       register long Register_10;      /* quotient */
+       register long Register_9;       /* divident least */
+       register long Register_8;       /* divident most */
+       register long Register_7;       /* divisor */
+
+       Register_7 = operand(infop, 0)->data;
+       Register_8 = operand(infop, 1)->data;
+       Register_9 = operand(infop, 1)->data2;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  ediv    r7,r8,r10,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_10, operand(infop, 2));
+       write_back (infop, Register_11, operand(infop, 3));
+}
diff --git a/usr/src/sys/tahoealign/Aemul.c b/usr/src/sys/tahoealign/Aemul.c
new file mode 100644 (file)
index 0000000..d4e4f1a
--- /dev/null
@@ -0,0 +1,29 @@
+/*     Aemul.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h"
+emul(infop)    process_info *infop;
+/*
+/*     Extended precision multiplication.
+/*
+/***************************************/
+{
+       register long Register_12;      /* multiplicand */
+       register long Register_11;      /* product least */
+       register long Register_10;      /* product most */
+       register long Register_9;       /* addend */
+       register long Register_8;       /* multiplier */
+       quadword result;
+
+       Register_8 = operand(infop, 0)->data;
+       Register_12 = operand(infop, 1)->data;
+       Register_9 = operand(infop, 2)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  emul    r8,r12,r9,r10");
+       asm ("  movpsl  r8");
+       New_cc (Register_8);
+       result.high = Register_10;
+       result.low  = Register_11;
+       write_quadword (infop, result, operand(infop, 3));
+}
diff --git a/usr/src/sys/tahoealign/Affc.c b/usr/src/sys/tahoealign/Affc.c
new file mode 100644 (file)
index 0000000..d5697fa
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Affc.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+ffc(infop)     process_info *infop;
+/*
+/*     Find first clear bit.
+/*
+/********************************/
+{
+
+       register long   Register_12;    /* Has to be first reg ! */
+       register long   Register_11;
+       register long   Register_10;
+
+       Register_12 = operand(infop,0)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  ffc     r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,Register_11, operand(infop,1));
+}
diff --git a/usr/src/sys/tahoealign/Affs.c b/usr/src/sys/tahoealign/Affs.c
new file mode 100644 (file)
index 0000000..8c0479c
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Affs.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+ffs_op(infop)  process_info *infop;
+/*
+/*     Find first set bit.
+/*
+/********************************/
+{
+
+       register long   Register_12;    /* Has to be first reg ! */
+       register long   Register_11;
+
+       Register_12 = operand(infop,0)->data;
+       Register_11=psl;
+       Set_psl(r11);   /* restore the user psl */
+       asm ("  ffs     r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,Register_11, operand(infop,1));
+}
diff --git a/usr/src/sys/tahoealign/Aget_byte.c b/usr/src/sys/tahoealign/Aget_byte.c
new file mode 100644 (file)
index 0000000..70a47c8
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Aget_byte.c     1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+int get_byte (infop, address)
+process_info   *infop;
+char           *address;
+/*
+/*     Fetch the byte at the given 'address' from memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code;
+
+       code = readable(infop, (long)address, 1);
+       if ( code == TRUE ) {
+               return(*address);
+       } else exception (infop, ILL_ACCESS, address, code);
+}
diff --git a/usr/src/sys/tahoealign/Aget_long.c b/usr/src/sys/tahoealign/Aget_long.c
new file mode 100644 (file)
index 0000000..a0e9ac5
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Aget_long.c     1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+int get_longword (infop, address)
+process_info   *infop;
+char           *address;
+/*
+/*     Fetch the longword at the given 'address' from memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code, value;
+
+       code = readable(infop, address, 4);
+       if (code == TRUE) {
+               value = *address++;
+               value = (value << 8) | *address++ & 0xff;
+               value = (value << 8) | *address++ & 0xff;
+               value = (value << 8) | *address & 0xff;
+               return(value);
+       } else exception (infop, ILL_ACCESS, address, code);
+}
diff --git a/usr/src/sys/tahoealign/Aget_word.c b/usr/src/sys/tahoealign/Aget_word.c
new file mode 100644 (file)
index 0000000..5b81e1c
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Aget_word.c     1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+int get_word (infop, address)
+process_info   *infop;
+char           *address;
+/*
+/*     Fetch the word at the given 'address' from memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code, value;
+
+       code = readable(infop, address, 2);
+       if (code == TRUE) {
+               value = *address++ << 8;
+               value = value | *address & 0xff;
+               return(value);
+       } else exception (infop, ILL_ACCESS, address, code);
+}
diff --git a/usr/src/sys/tahoealign/Ainc.c b/usr/src/sys/tahoealign/Ainc.c
new file mode 100644 (file)
index 0000000..9c309f3
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Ainc.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+inc(infop)     process_info *infop;
+/*
+/*     Increment operand.
+/*
+/***************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_11 = operand(infop,0)->data;
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  incl    r11");                  /* Make sure to use the
+                                                * right opcode */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+
+       write_back (infop,Register_11, operand(infop,0) );
+}      
diff --git a/usr/src/sys/tahoealign/Ajmp.c b/usr/src/sys/tahoealign/Ajmp.c
new file mode 100644 (file)
index 0000000..37d85a9
--- /dev/null
@@ -0,0 +1,12 @@
+/*     Ajmp.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+jmp(infop)
+process_info *infop;
+/*
+/*     Jump to the given address.
+/*
+/********************************************/
+{
+       pc = operand(infop,0)->address ;
+}
diff --git a/usr/src/sys/tahoealign/Aldd.c b/usr/src/sys/tahoealign/Aldd.c
new file mode 100644 (file)
index 0000000..0c452e4
--- /dev/null
@@ -0,0 +1,19 @@
+/*     Aldd.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+ldd(infop)     process_info *infop;
+/*
+/*     Load a double operand into accumulator.
+/*
+/*************************************************/
+{
+       register struct oprnd *oprnd_pnt;
+
+       oprnd_pnt = operand(infop,0);
+       if ( reserved( oprnd_pnt->data ) ) 
+               exception(infop, ILL_OPRND);
+       acc_high = oprnd_pnt->data ;
+       acc_low = oprnd_pnt->data2 ;
+       psl |= PSL_DBL;
+       infop->acc_dbl = 1;
+}
diff --git a/usr/src/sys/tahoealign/Aldf.c b/usr/src/sys/tahoealign/Aldf.c
new file mode 100644 (file)
index 0000000..677f82a
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Aldf.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+ldf(infop)     process_info *infop;
+/*
+/*     Load a float operand into accumulator.
+/*
+/*************************************************/
+{
+
+       register struct oprnd *oprnd_pnt;
+
+       oprnd_pnt = operand(infop,0);
+       if ( reserved( oprnd_pnt->data ) ) 
+               exception(infop, ILL_OPRND);
+       if ( (oprnd_pnt->data & 0xff800000) == 0 ) acc_high = 0;
+       else acc_high = oprnd_pnt->data ;
+       psl &= ~PSL_DBL;
+       infop->acc_dbl = 0;
+}
diff --git a/usr/src/sys/tahoealign/Aldfd.c b/usr/src/sys/tahoealign/Aldfd.c
new file mode 100644 (file)
index 0000000..43d9f3d
--- /dev/null
@@ -0,0 +1,19 @@
+/*     Aldfd.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+ldfd(infop)    process_info *infop;
+/*
+/*     Load into accumulator float operand converted to double.
+/*
+/***************************************************************/
+{
+       register struct oprnd *oprnd_pnt;
+
+       oprnd_pnt = operand(infop,0);
+       if ( reserved( oprnd_pnt->data ) ) 
+               exception(infop, ILL_OPRND);
+       acc_high = oprnd_pnt->data ;
+       acc_low = 0;
+       psl |= PSL_DBL;
+       infop->acc_dbl = 1;
+}
diff --git a/usr/src/sys/tahoealign/Alnd.c b/usr/src/sys/tahoealign/Alnd.c
new file mode 100644 (file)
index 0000000..3a65069
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Alnd.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+lnd(infop)     process_info *infop;
+/*
+/*     Load a negated double operand into accumulator.
+/*
+/*******************************************************/
+{
+       register struct oprnd *oprnd_pnt;
+
+       oprnd_pnt = operand(infop,0);
+       if ( reserved( oprnd_pnt->data ) ) 
+               exception(infop, ILL_OPRND);
+       if ( oprnd_pnt->data == 0 ) acc_high = 0;
+       else acc_high = 0x80000000 ^ oprnd_pnt->data ;
+       acc_low = oprnd_pnt->data2 ;
+       psl |= PSL_DBL;
+       infop->acc_dbl = 1;
+}
diff --git a/usr/src/sys/tahoealign/Alnf.c b/usr/src/sys/tahoealign/Alnf.c
new file mode 100644 (file)
index 0000000..e716e1b
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Alnf.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+lnf(infop)     process_info *infop;
+/*
+/*     Load a negated float operand into accumulator.
+/*
+/******************************************************/
+{
+
+       register struct oprnd   *op_pnt;
+
+       op_pnt = operand(infop,0);
+       if ( reserved( op_pnt->data ) ) 
+               exception(infop, ILL_OPRND);
+       if ( op_pnt->data == 0 ) acc_high = 0;
+       else acc_high = 0x80000000 ^ op_pnt->data ;
+       psl &= ~PSL_DBL;
+       infop->acc_dbl = 0;
+}
diff --git a/usr/src/sys/tahoealign/Aloadr.c b/usr/src/sys/tahoealign/Aloadr.c
new file mode 100644 (file)
index 0000000..beef8dc
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Aloadr.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+loadr(infop)   process_info *infop;
+/*
+/*     Load multiple registers.
+/*
+/***************************************/
+{
+       register long mask, next_register, new_address;
+
+       mask = operand(infop,0)->data & 0x3fff; /* Bits 0 to 13 only */
+       new_address = operand(infop,1)->address;
+       next_register = 0;                              /* Register # */
+       while (next_register <= 13)
+       { 
+               if (mask & 1 << next_register) 
+               {
+                       Replace (infop, next_register,
+                               get_longword (infop, new_address));
+                       new_address += 4; 
+               }
+               next_register++ ;
+       }
+}
diff --git a/usr/src/sys/tahoealign/Amcom.c b/usr/src/sys/tahoealign/Amcom.c
new file mode 100644 (file)
index 0000000..75357c6
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Amcom.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+mcom(infop)    process_info *infop;
+/*
+/*     Move complemented 
+/*
+/************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_12 = operand(infop, 0)->data;
+       Register_11=psl;
+       Set_psl(r11);   /* restore the user psl */
+       asm ("  mcoml   r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_11, operand(infop,1));
+}      
diff --git a/usr/src/sys/tahoealign/Amneg.c b/usr/src/sys/tahoealign/Amneg.c
new file mode 100644 (file)
index 0000000..f392268
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Amneg.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+mneg(infop)    process_info *infop;
+/*
+/*     Move negated operand.
+/*
+/**********************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_12 = operand(infop, 0)->data;
+       Register_11=psl;
+       Set_psl(r11);   /* restore the user psl */
+       asm ("  mnegl   r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_11, operand(infop,1));
+}      
diff --git a/usr/src/sys/tahoealign/Amov.c b/usr/src/sys/tahoealign/Amov.c
new file mode 100644 (file)
index 0000000..467d33a
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Amov.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+mov(infop)     process_info *infop;
+/*
+/*     Move operand
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_12 = operand(infop, 0)->data;
+       Register_11=psl;
+       Set_psl(r11);   /* restore the user psl */
+       asm ("  movl    r12,r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_11, operand(infop,1));
+}      
diff --git a/usr/src/sys/tahoealign/Amova.c b/usr/src/sys/tahoealign/Amova.c
new file mode 100644 (file)
index 0000000..4617175
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Amova.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+mova(infop)    process_info *infop;
+/*
+/*     Move operand address
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+
+       Register_12 = operand(infop, 0)->address;
+       Register_11=psl;
+       Set_psl(r11);   /* restore the user psl */
+       asm ("  movab   (r12),r11");    /* Moves original addr to r11 */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_11, operand(infop,1));
+}      
diff --git a/usr/src/sys/tahoealign/Amovob.c b/usr/src/sys/tahoealign/Amovob.c
new file mode 100644 (file)
index 0000000..0afaf47
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Amovob.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+movob_op(infop) 
+process_info *infop;
+/*
+/*     Move output byte
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    code;
+
+
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->address;
+       code = writeable(infop, Register_11, 1);
+       if ( code == TRUE ) {
+               Register_10=psl;
+               Set_psl(r10);   /* restore the user psl */
+               asm ("  movob   r12,(r11)");
+               asm ("  movpsl  r12");
+               New_cc (Register_12);
+       } else exception (infop, ILL_ACCESS, Register_11, code);
+}
diff --git a/usr/src/sys/tahoealign/Amovpsl.c b/usr/src/sys/tahoealign/Amovpsl.c
new file mode 100644 (file)
index 0000000..d2c2a39
--- /dev/null
@@ -0,0 +1,11 @@
+/*     Amovpsl.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+movpsl(infop)  process_info *infop;
+/*
+/*     Move PSL to some place.
+/*
+/************************************/
+{
+       write_back (infop, psl, operand(infop,0));
+}
diff --git a/usr/src/sys/tahoealign/Amovzb.c b/usr/src/sys/tahoealign/Amovzb.c
new file mode 100644 (file)
index 0000000..0b11fbf
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Amovzb.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+movzb(infop)   process_info *infop;
+/*
+/*     Move byte to word or longword, zero-extended
+/*
+/****************************************/
+{
+       register long result;
+       register struct oprnd *oppnt;
+
+       oppnt = operand(infop,0);
+       result = oppnt->data;
+       negative_0;
+       if (result == 0 )  zero_1 ; else zero_0;
+       overflow_0;  carry_1;
+       if ((oppnt->mode & 0xff) == Dir) 
+               write_back (infop, result , operand(infop,1) );
+       else write_back (infop, result & 0xff, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Amovzwl.c b/usr/src/sys/tahoealign/Amovzwl.c
new file mode 100644 (file)
index 0000000..f6b3bb9
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Amovzwl.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+movzwl(infop)  process_info *infop;
+/*
+/*     Move word to longword, zero-extended
+/*
+/****************************************/
+{
+       register long result;
+       register struct oprnd *oppnt;
+
+       oppnt = operand(infop,0);
+       result = oppnt->data;
+       negative_0;
+       if (result == 0 )  zero_1 ; else zero_0;
+       overflow_0;  carry_1;
+       if ((oppnt->mode & 0xff) == Dir) 
+               write_back (infop, result , operand(infop,1) );
+       else write_back (infop, result & 0xffff, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Amuld.c b/usr/src/sys/tahoealign/Amuld.c
new file mode 100644 (file)
index 0000000..5c8901f
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Amuld.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h"
+muld(infop)    process_info *infop;
+/*
+/*     Multiply operand by accumulator to accumulator (double).
+/*
+/*******************************************************************/
+{
+       register double *operand_pnt;
+       register double *acc_pnt;
+
+       operand_pnt = (double *)&operand(infop,0)->data;
+       acc_pnt = (double *) &acc_high;
+       *acc_pnt = *acc_pnt * *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Amulf.c b/usr/src/sys/tahoealign/Amulf.c
new file mode 100644 (file)
index 0000000..2117197
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Amulf.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+mulf(infop)    process_info *infop;
+/*
+/*     Multiply operand by accumulator to accumulator (float).
+/*
+/*******************************************************************/
+{
+       register float  *operand_pnt;
+       register float  *acc_pnt;
+
+       operand_pnt = (float *)&operand(infop,0)->data;
+       acc_pnt = (float *) &acc_high;
+       *acc_pnt = *acc_pnt * *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Amull2.c b/usr/src/sys/tahoealign/Amull2.c
new file mode 100644 (file)
index 0000000..0bab13e
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Amull2.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+int    zzz1,zzz2,zzz3,zzz4,zzz5;
+mull2(infop)   process_info *infop;
+/*
+/*     Multiply longwords, 2 operands.
+/*
+/*****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    result, data0, data1;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 * data1;
+       asm("movpsl     r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Amull3.c b/usr/src/sys/tahoealign/Amull3.c
new file mode 100644 (file)
index 0000000..8024565
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Amull3.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+mull3(infop)   process_info *infop;
+/*
+/*     Multiply longwords, 3 operands.
+/*
+/*****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    result, data0, data1;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 * data1;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/Aoperand.c b/usr/src/sys/tahoealign/Aoperand.c
new file mode 100644 (file)
index 0000000..773c38f
--- /dev/null
@@ -0,0 +1,301 @@
+/*     Aoperand.c      1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+#define        illegal(x) ((look_at->add_modes & x)==0)
+#define        legal(x) !illegal(x)
+
+struct oprnd *operand(infop, number)
+register process_info *infop;
+int    number;
+/*
+ *     Enter with pc pointing to an operand descriptor
+ *     in the 'text'. Decode the addressing mode, get
+ *     the effective address and some data from there.
+ *     Leave pc on the next oerand specifier or opcode.
+ *     Returns a pointer to a 'decoded operand' structure,
+ *     actually one of the 4 pre-allocated .
+ *
+ *     This routine should be called in such a sequence
+ *     that pc will not have to be backed up to get some
+ *     operand. For example, operand(0) and then operand(1)
+ *     and then operand(2) is OK. Even operand(0), operand(1),
+ *     operand(1) is OK. The rule is that operand(N) should not
+ *     be called before operand(N-1) was.
+ *     
+ ***********************************************************/
+{
+       register struct oprnd *next;
+       register struct operand_des *look_at;
+       register int header,reg_num,shift_count, displ;
+       register int keep_last;
+
+       next = &decoded[number]; 
+       if (number <= last_operand) return(next);
+       if (number == last_operand+1) last_operand = number;
+       else
+       {
+               printf ("Wrong sequence of OPERAND calls (alignment code)\n");
+               return (&decoded[number]);
+       };
+       look_at  = &Table[opCODE].operand[number];
+       next->data2 = 0;                /* Prepare for quad fetch */
+       next->length = look_at->length;
+       if (look_at->add_modes == Brd)
+       { 
+               next->mode = Add;
+               switch(look_at->length)
+               { 
+               case 1: 
+                       displ = get_byte(infop, pc);
+                       pc++; 
+                       break; 
+               case 2: 
+                       displ = get_word(infop, pc); 
+                       pc +=2; 
+                       break;
+               default: 
+                       printf ("Wrong branch displacement(alignment code)\n");
+               }; 
+               next->address = pc+displ; 
+               return(next); 
+       };
+       
+       /* Not branch displacement, real operand */
+       header = get_byte(infop, pc) & 0xff; 
+       pc++; 
+       reg_num = header & 0xf;
+       switch (header >> 4 & 0xf) { 
+       case 0:                         /* Short literals */
+       case 1: 
+       case 2: 
+       case 3:
+               if (illegal(Lit)) exception(infop, ILL_ADDRMOD);
+               next->mode = Imm; 
+               next->data = header; 
+               break;
+
+       case 4:                         /* Indexed register */
+               if (illegal(Add) || reg_num==PCOUNTER || reg_num==SPOINTER)
+                       exception (infop, ILL_ADDRMOD);
+               keep_last = last_operand;
+               last_operand = number - 1; /* To get real results */
+               next = operand(infop, number);   /* Get base address (recursive) */
+               last_operand = keep_last;
+               if
+                   (! (next->mode & Indx)) exception (infop, ILL_ADDRMOD);
+               switch (look_at->length)
+               { 
+               case 1: 
+                       shift_count = 0; 
+                       break; 
+               case 2: 
+                       shift_count = 1; 
+                       break;
+               case 4: 
+                       shift_count = 2; 
+                       break; 
+               case 8: 
+                       shift_count = 3; 
+                       break;
+               default: 
+                       printf("Wrong data length in table(alignment code)\n");
+               }; 
+               next->address += (Register(infop,reg_num) << shift_count);
+               next->mode |= (look_at->add_modes & M); /* Set R/W bits */
+               trytoread (infop,next,number);
+               break;
+
+       case 5:                         /* Direct register */
+               if (illegal (Dir) || reg_num==PCOUNTER ||
+                   reg_num==SPOINTER && legal(R)) exception (infop, ILL_ADDRMOD);
+               next->mode = Dir; 
+               next->data = Register(infop,reg_num); 
+               next->mode |= (look_at->add_modes & M); /* Set R/W bits */
+               next->reg_number = reg_num; 
+               if (look_at->length == 8)
+               {
+                       if (reg_num >= SPOINTER-1 || (reg_num & 1)==1 ) 
+                               exception (infop, ILL_ADDRMOD);
+                       else next->data2 = Register(infop,reg_num+1);
+               };
+               break;
+
+       case 6:                         /* Indirect register */
+               if (illegal(Add) || reg_num==PCOUNTER )
+                       exception (infop, ILL_ADDRMOD); 
+               next->mode = Add; 
+               next->mode |= (look_at->add_modes & M); /* Set R/W bits */
+               if (reg_num != SPOINTER) next->mode |= Indx;  /* (sp) not indexable*/
+               next->reg_number = reg_num;
+               next->address = Register(infop,reg_num);
+               trytoread (infop,next,number);
+               break;
+
+       case 7:                         /* Autodecrement SP */
+               if (illegal(Add) || reg_num!=SPOINTER || look_at->length != 4 ||
+                   legal(R)) exception (infop, ILL_ADDRMOD);
+               next->mode = SPmode;    /* Implies Add */
+               next->mode |= W;        /* Set R/W bits */
+               next->reg_number = SPOINTER; 
+               next->length = 4;       /* Regardless of big table */
+               sp -= 4;
+               next->address = sp; 
+               break;
+
+       case 8:                         /* Immediate or (sp)+ */
+               switch (reg_num) { 
+               case 8:                 /* Immediate byte */
+                       if (illegal(Imm)) exception (infop, ILL_ADDRMOD);
+                       next->mode = Imm; 
+                       next->data = get_byte(infop, pc); 
+                       pc++; 
+                       break;
+               case 9:                 /* Immediate word */
+                       if (illegal(Imm)) exception (infop, ILL_ADDRMOD);
+                       next->mode = Imm; 
+                       next->data = get_word(infop, pc); 
+                       pc +=2; 
+                       break;
+               case 0xf :              /* Immediate longword */
+                       if (illegal(Imm)) exception (infop, ILL_ADDRMOD);
+                       next->mode = Imm; 
+                       next->data = get_longword(infop, pc); 
+                       pc +=4; 
+                       break;
+               case 0xe:               /* Autoincrement sp */
+                       if (illegal(Add) || legal(W) ||
+                               look_at->length != 4) exception (infop, ILL_ADDRMOD);
+                       next->mode = SPmode;    /* Implies Add */
+                       next->reg_number = SPOINTER;
+                       next->address = sp; 
+                       next->data = get_longword(infop, sp);
+                       next->length = 4;       /* Regardless of big table */
+                       sp += 4; 
+                       break;
+               default: 
+                       exception (infop, ILL_ADDRMOD);
+               };
+               if (look_at -> length == 8)     /* Quadword fetch,not (sp)+ */
+               {
+                       next->data2 = next->data;
+                       if (next->data2 >= 0) next->data = 0;
+                       else next->data = -1;
+               }
+               break;
+
+       case 9:                         /* Autoincrement deferred SP or PC */
+               if (reg_num !=PCOUNTER && reg_num !=SPOINTER )
+                       exception (infop, ILL_ADDRMOD);
+               if (reg_num == PCOUNTER && illegal(Abs) ||
+                   reg_num == SPOINTER && illegal(Add))
+                       exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M) | Indx; 
+               next->address = get_longword (infop, (reg_num == PCOUNTER)?pc : sp ); 
+               Replace (infop,reg_num, Register(infop,reg_num)+4);
+               trytoread (infop,next,number);
+               break;
+
+       case 0xa:                       /* Register or PC + byte displacement */
+               if (reg_num != PCOUNTER && illegal(Add) ||
+                   reg_num == PCOUNTER && illegal(Pcrel) ) exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M); 
+               if (reg_num != SPOINTER &&
+                       look_at->add_modes != PR) next->mode |= Indx;
+               displ = get_byte(infop,pc); 
+               pc++;
+               next->address = Register(infop,reg_num)+displ;
+               trytoread (infop,next,number);
+               break;
+
+       case 0xb:                       /* Same, indirect */ 
+               if (illegal(Add)) exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M) | Indx; 
+               displ = get_byte(infop,pc); 
+               pc++;
+               next->address = get_longword(infop, Register(infop,reg_num)+displ);
+               trytoread (infop,next,number);
+               break;
+
+       case 0xc:                       /* Register or PC + word displacement */
+               if (reg_num != PCOUNTER && illegal(Add) ||
+                   reg_num == PCOUNTER && illegal(Pcrel) ) exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M); 
+               if (reg_num != SPOINTER &&
+                       look_at->add_modes != PR) next->mode |= Indx;
+               displ = get_word(infop,pc); 
+               pc +=2;
+               next->address = Register(infop,reg_num)+displ;
+               trytoread (infop,next,number);
+               break;
+
+       case 0xd:                       /* Same, indirect */ 
+               if (illegal(Add)) exception (infop, ILL_ADDRMOD);
+               next->mode =Add | (look_at->add_modes & M) | Indx ; 
+               displ = get_word(infop,pc); 
+               pc +=2;
+               next->address = get_longword (infop,Register(infop,reg_num)+displ);
+               trytoread (infop,next,number);
+               break;
+
+
+       case 0xe:               /* Register or PC + longword displacement */
+               if (reg_num != PCOUNTER && illegal(Add) ||
+                   reg_num == PCOUNTER && illegal(Pcrel) ) exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M); 
+               if (reg_num != SPOINTER &&
+                       look_at->add_modes != PR) next->mode |= Indx;
+               displ = get_longword(infop,pc); 
+               pc += 4;
+               next->address = Register(infop,reg_num)+displ;
+               trytoread (infop,next,number);
+               break;
+
+       case 0xf:                       /* Same, indirect */ 
+               if (illegal(Add)) exception (infop, ILL_ADDRMOD);
+               next->mode = Add | (look_at->add_modes & M) | Indx; 
+               displ = get_longword(infop,pc); 
+               pc +=4;
+               next->address = get_longword(infop, Register(infop,reg_num)+displ);
+               trytoread (infop,next,number);
+       };
+       return(next);
+}
+
+
+trytoread (infop,pointer,number)
+process_info   *infop;
+struct oprnd   *pointer;
+int            number;
+/*
+/*     Receives the opcode operand number and a pointer
+/*     to the 'decoded' operand structure.
+/*     If it's defined as readable data in the big table,
+/*     it returns the data, sign extended.
+/*
+/**********************************************************/
+
+{
+       register struct operand_des *look_at;
+       
+
+       look_at  = &Table[opCODE].operand[number];
+       if (legal(R))
+       switch (look_at->length)
+       {
+       case 1:
+               pointer->data = get_byte (infop,pointer->address);
+               break;
+       case 2:
+               pointer->data = get_word (infop,pointer->address);
+               break;
+       case 4: 
+               pointer->data = get_longword (infop,pointer->address);
+               break;
+       case 8: 
+               pointer->data = get_longword (infop,pointer->address);
+               pointer->data2 = get_longword (infop,pointer->address+4);
+               break;
+       default:
+               printf ("Wrong data length in table (alignment code)\n");
+       };
+}
diff --git a/usr/src/sys/tahoealign/Aor2.c b/usr/src/sys/tahoealign/Aor2.c
new file mode 100644 (file)
index 0000000..2e7667c
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Aor2.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+or2 (infop)    process_info *infop;
+/*
+/*     Or , 2 operands.
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 | data1;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Aor3.c b/usr/src/sys/tahoealign/Aor3.c
new file mode 100644 (file)
index 0000000..b452be2
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Aor3.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+or3 (infop)    process_info *infop;
+/*
+/*     Or , 3 operands.
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 | data1;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/Aprober.c b/usr/src/sys/tahoealign/Aprober.c
new file mode 100644 (file)
index 0000000..ea39fab
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Aprober.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+
+#define        PSL_USER        PSL_CURMOD
+prober(infop)  process_info *infop;
+/*
+/*     Probe read accessability.
+/*
+/*************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    Register_9;
+
+       Register_9 = operand(infop,0)->data & 1;        /* Required mode */
+       if (psl & PSL_USER) Register_9 = 1;             /* user can't probe as
+                                                        *  kernel ! */
+       Register_10 = operand(infop,1)->address;        /* Base address */
+       Register_11 = operand(infop,2)->data;           /* Length */
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  prober  r9,(r10),r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+}
diff --git a/usr/src/sys/tahoealign/Aprobew.c b/usr/src/sys/tahoealign/Aprobew.c
new file mode 100644 (file)
index 0000000..92927c5
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Aprobew.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+
+#define        PSL_USER        PSL_CURMOD
+probew(infop)  process_info *infop;
+/*
+/*     Probe write accessability.
+/*
+/*************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    Register_9;
+
+       Register_9 = operand(infop,0)->data & 1;        /* Required mode */
+       if (psl & PSL_USER) Register_9 = 1;             /* user can't probe as
+                                                        *  kernel ! */
+       Register_10 = operand(infop,1)->address;        /* Base address */
+       Register_11 = operand(infop,2)->data;           /* Length */
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       asm ("  probew  r9,(r10),r11");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+}
diff --git a/usr/src/sys/tahoealign/Apush.c b/usr/src/sys/tahoealign/Apush.c
new file mode 100644 (file)
index 0000000..17a8dcd
--- /dev/null
@@ -0,0 +1,20 @@
+/*     Apush.c 1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+push (infop,longword)  process_info *infop;
+int    longword;
+/*
+/*     Push the given datum on the current stack.
+/*
+/******************************************/
+{
+
+       struct oprnd temp;
+
+       temp.mode = Add | W; 
+       sp -= 4; 
+       temp.address = sp; 
+       temp.length = 4;
+       write_back(infop,longword, &temp) ;
+}
diff --git a/usr/src/sys/tahoealign/Apusha.c b/usr/src/sys/tahoealign/Apusha.c
new file mode 100644 (file)
index 0000000..a391fe3
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Apusha.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+pusha(infop)   process_info *infop;
+/*
+/*     Push address of the operand
+/*
+/**************************************/
+{
+       register long new_address;
+
+       new_address = operand(infop,0)->address;
+       if (new_address < 0) negative_1; else negative_0;
+       if (new_address == 0) zero_1; else zero_0;
+       overflow_0; carry_1;
+       push (infop, new_address);
+}
diff --git a/usr/src/sys/tahoealign/Apushx.c b/usr/src/sys/tahoealign/Apushx.c
new file mode 100644 (file)
index 0000000..8194fa6
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Apushx.c        1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+pushx(infop)   process_info *infop;
+/*
+/*     Push operand on the stack.
+/*
+/******************************************/
+{
+       register long quantity;
+
+       quantity = operand(infop,0)->data ;
+       if (quantity < 0) negative_1; else negative_0;
+       if (quantity == 0) zero_1; else zero_0;
+       overflow_0; carry_1;
+       push (infop, quantity);
+}
diff --git a/usr/src/sys/tahoealign/Aput_byte.c b/usr/src/sys/tahoealign/Aput_byte.c
new file mode 100644 (file)
index 0000000..7429e59
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Aput_byte.c     1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+put_byte (infop, byte, where)
+process_info   *infop;
+char           *where;
+long           byte;
+/*
+/*     Put the byte at the given address in memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code;
+
+       code = writeable(infop, where, 1);
+       if ( code == TRUE ) {
+               *where = byte;
+       } else exception (infop, ILL_ACCESS, where, code);
+}
diff --git a/usr/src/sys/tahoealign/Aput_long.c b/usr/src/sys/tahoealign/Aput_long.c
new file mode 100644 (file)
index 0000000..6e81072
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Aput_long.c     1.1     86/07/20        */
+
+
+#include       "../tahoealign/align.h"
+
+put_longword (infop, longword, where)
+register       process_info    *infop;
+register       char            *where;
+register       long            longword;
+/*
+/*     Put the longword at the given address in memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code;
+
+       code = writeable(infop, where, 4);
+       if ( code == TRUE ) {
+               *where++ = longword>>24;
+               *where++ = longword>>16;
+               *where++ = longword>>8;
+               *where = longword;
+       } else exception (infop, ILL_ACCESS, where, code);
+}
diff --git a/usr/src/sys/tahoealign/Aput_word.c b/usr/src/sys/tahoealign/Aput_word.c
new file mode 100644 (file)
index 0000000..a14b3b0
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Aput_word.c     1.1     86/07/20        */
+
+
+#include       "../tahoealign/align.h"
+
+put_word (infop, word, where)
+register       process_info    *infop;
+register       char            *where;
+register       long            word;
+/*
+/*     Put the word at the given address in memory.
+/*     Caveat: It's quite difficult to find a pte reference
+/*             fault.  So I took the easy way out and just signal
+/*             an illegal access.
+/*     
+/**************************************************/
+{
+       register long code;
+
+       code = writeable(infop, where, 2);
+       if ( code == TRUE ) {
+               *where = word>>8;
+               *(where+1) = word;
+       } else exception (infop, ILL_ACCESS, where, code);
+}
diff --git a/usr/src/sys/tahoealign/Areadable.c b/usr/src/sys/tahoealign/Areadable.c
new file mode 100644 (file)
index 0000000..304e9dd
--- /dev/null
@@ -0,0 +1,79 @@
+/*     Areadable.c     1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+
+long readable(infop, address, length)
+process_info   *infop;
+long           address, length;
+/*
+ *   Return TRUE (= -1) if the specified bytes can be read without an access
+ * control violation (limit and/or protection). Page faults are OK.
+ *   If problems, return the code that would be pushed by HW on the
+ * stack (see the architecture manual).
+ *   Assumption is that in most cases, access is OK, so a quick 'prober'
+ * will be enough. If not, we have to work harder to determine the exact
+ * cause and return the right code, without getting the fault here in
+ * the kernel !!.
+ *
+ * The address is assumed to be read for the user.!
+ */
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    Register_9;
+       register        long    Register_8;
+       register        long    subspace;
+       register        long    last_page;
+
+       Register_12 = address;
+       Register_11 = length-1;
+       asm ("          prober  $1,(r12),$1     ");     /* Yeach ... */
+       asm ("          beql    no_access       ");
+       asm ("          addl2   r11,r12         ");     /* last byte */
+       asm ("          prober  $1,(r12),$1     ");
+       asm ("          beql    no_access       ");
+       asm ("          movl    $-1,r0          ");     /* TRUE */
+       asm ("          ret#1                   ");
+       asm ("no_access:                        ");
+/*
+ * Now the hard work. Have to check length violation first.
+ * If any byte (first or last) causes a length violation, report it as such.
+ */
+       asm ("  mfpr    $3,r8   ");     /* Get length registers. P0LR */
+       asm ("  mfpr    $5,r9   ");     /* P1LR */
+       asm ("  mfpr    $7,r10  ");     /* P2LR */
+       asm ("  mfpr    $1,r11  ");     /* SLR  */
+
+       subspace = (address >> 30) & 3;
+       Register_12 = (address >> 10) & 0xfffff;        /* 1'st byte page # */
+       last_page = ( (address+length-1) >> 10) & 0xfffff;
+       switch ( subspace ) {
+       case 0:
+               if ( (Register_12 >= Register_8) ||
+                    (last_page   >= Register_8) ) return (1);
+               break;
+       case 1:
+               if ( (Register_12 >= Register_9) ||
+                    (last_page   >= Register_9) ) return (1);
+               break;
+       case 2:
+               if ( (Register_12 < Register_10) ||
+                    (last_page   < Register_10) ) return (1);
+               break;
+       case 3:
+               if ( (Register_12 >= Register_11) ||
+                    (last_page   >= Register_11) ) return (1);
+               break;
+       }
+/*
+ * OK, it's not a length violation. Must have been an access problem
+ * (no read by user).
+ *
+ * NOTE : I definitely ignore the case of 'no PTE access' since I
+ *     assume that's not the case for user mode. Besides, the poor
+ *     guy will just get an access violation that will most probably
+ *     send him into hyperspace anyway, so no need to be too acurate here.
+ */
+       return (0);
+}
diff --git a/usr/src/sys/tahoealign/Aregister.c b/usr/src/sys/tahoealign/Aregister.c
new file mode 100644 (file)
index 0000000..f653342
--- /dev/null
@@ -0,0 +1,63 @@
+/*     Aregister.c     1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+
+/*
+ * Return the specified register from the big structure.
+ */
+
+long
+Register (infop, number)
+process_info   *infop;
+long           number;
+{
+
+       switch (number) {
+               case 0: return (r0);
+               case 1: return (r1);
+               case 2: return (r2);
+               case 3: return (r3);
+               case 4: return (r4);
+               case 5: return (r5);
+               case 6: return (r6);
+               case 7: return (r7);
+               case 8: return (r8);
+               case 9: return (r9);
+               case 10:        return (r10);
+               case 11:        return (r11);
+               case 12:        return (r12);
+               case 13:        return (fp);
+               case 14:        return (sp);
+               case 15:        return (pc);
+       }
+}
+
+
+/*
+ * Replace a given register with the given value.
+ */
+Replace (infop,number, newvalue)
+process_info   *infop;
+long           number;
+long           newvalue;
+{
+
+       switch (number) {
+               case 0: r0 = newvalue; return;
+               case 1: r1 = newvalue; return;
+               case 2: r2 = newvalue; return;
+               case 3: r3 = newvalue; return;
+               case 4: r4 = newvalue; return;
+               case 5: r5 = newvalue; return;
+               case 6: r6 = newvalue; return;
+               case 7: r7 = newvalue; return;
+               case 8: r8 = newvalue; return;
+               case 9: r9 = newvalue; return;
+               case 10:        r10 = newvalue; return;
+               case 11:        r11 = newvalue; return;
+               case 12:        r12 = newvalue; return;
+               case 13:        fp = newvalue; return;
+               case 14:        sp = newvalue & ~3; return;
+               case 15:        pc = newvalue; return;
+       }
+}
diff --git a/usr/src/sys/tahoealign/Asbwc.c b/usr/src/sys/tahoealign/Asbwc.c
new file mode 100644 (file)
index 0000000..07d3683
--- /dev/null
@@ -0,0 +1,34 @@
+/*     Asbwc.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h" 
+sbwc(infop)    process_info *infop;
+/*
+/*     Subtract with carry.
+/*     Note : the play with 'tmp' just before the 'asm' line makes
+/*             sure that when the sbwc opcode is executed, the current
+/*             carry in psl is the same as the 'offending' process'.
+/*             Don't change unless you know exactly what you're doing.
+/*
+/*****************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    tmp;
+
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       if (carry)      /* If process' carry set */
+               tmp = -1;
+       else tmp = 0;
+       tmp++;          /* 0 => carry set.  1 => carry clear */
+
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm("   sbwc    r12,r11");
+       asm("   movpsl  r12");
+       New_cc (Register_12);
+
+       write_back(infop, Register_11, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Ashal.c b/usr/src/sys/tahoealign/Ashal.c
new file mode 100644 (file)
index 0000000..169c37e
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Ashal.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+shal(infop)    process_info *infop;
+/*
+/*     Shift arithmetic left (longword).
+/*     Checks for overflow.
+/*
+/*******************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  shal    r12,r11,r10");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_10, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Ashar.c b/usr/src/sys/tahoealign/Ashar.c
new file mode 100644 (file)
index 0000000..0ddc377
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Ashar.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h" 
+shar(infop)    process_info *infop;
+/*
+/*     Shift arithmetic right (longword).
+/*
+/*******************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  shar    r12,r11,r10");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_10, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Ashll.c b/usr/src/sys/tahoealign/Ashll.c
new file mode 100644 (file)
index 0000000..6dd4006
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Ashll.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h" 
+
+shll(infop)    process_info *infop;
+/*
+/*     Shift logical left (longword).
+/*     Checks for overflow.
+/*
+/*******************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       Register_10 = psl;
+       Set_psl(r10);   /*save the orig CC bits of the psl */
+       asm("   shll    r12,r11,r10");
+       asm("   movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_10, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Ashlq.c b/usr/src/sys/tahoealign/Ashlq.c
new file mode 100644 (file)
index 0000000..0a9280d
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Ashlq.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+shlq(infop)    process_info *infop;
+/*
+/*     Shift left quadword.
+/*
+/********************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    *Register_9;
+       quadword        result;
+
+       Register_12 = operand(infop,0)->data;   /* Counter */
+       Register_9 = &operand(infop,1)->data;   /* Source */
+
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  shlq    r12,(r9),r10");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       result.high = Register_10;
+       result.low  = Register_11;
+       write_quadword (infop, result, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Ashrl.c b/usr/src/sys/tahoealign/Ashrl.c
new file mode 100644 (file)
index 0000000..4614139
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Ashrl.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h" 
+shrl(infop)    process_info *infop;
+/*
+/*     Shift logical right (longword).
+/*
+/*******************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       
+       Register_12 = operand(infop,0)->data;
+       Register_11 = operand(infop,1)->data;
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  shrl    r12,r11,r10");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop, Register_10, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Ashrq.c b/usr/src/sys/tahoealign/Ashrq.c
new file mode 100644 (file)
index 0000000..f4544aa
--- /dev/null
@@ -0,0 +1,27 @@
+/*     Ashrq.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+shrq(infop)    process_info *infop;
+/*
+/*     Shift right quadword.
+/*
+/********************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    *Register_9;
+       quadword        result;
+
+       Register_12 = operand(infop,0)->data;   /* Counter */
+       Register_9 = &operand(infop,1)->data;   /* Source */
+
+       Register_10=psl;
+       Set_psl(r10);   /* restore the user psl */
+       asm ("  shrq    r12,(r9),r10");
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       result.high = Register_10;
+       result.low  = Register_11;
+       write_quadword (infop, result, operand(infop,2));
+}
diff --git a/usr/src/sys/tahoealign/Astd.c b/usr/src/sys/tahoealign/Astd.c
new file mode 100644 (file)
index 0000000..1aadf12
--- /dev/null
@@ -0,0 +1,19 @@
+/*     Astd.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+std(infop)     process_info *infop;
+/*
+/*     Store accumulator (double) in destination.
+/*
+/*************************************************/
+{
+       quadword ac;
+
+       ac.high = acc_high;
+       ac.low = acc_low;
+       write_quadword (infop, ac, operand(infop,0) );
+       if (ac.high < 0) negative_1; else negative_0;
+       if ( (ac.high & 0xff800000) == 0 ) zero_1; else zero_0;
+       carry_1;
+       overflow_0;
+}
diff --git a/usr/src/sys/tahoealign/Astf.c b/usr/src/sys/tahoealign/Astf.c
new file mode 100644 (file)
index 0000000..67e234f
--- /dev/null
@@ -0,0 +1,15 @@
+/*     Astf.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+stf(infop)     process_info *infop;
+/*
+/*     Store accumulator (float) in destination.
+/*
+/*************************************************/
+{
+
+       write_back (infop, acc_high, operand(infop,0) );
+       if (acc_high < 0) negative_1; else negative_0;
+       if ( (acc_high & 0xff800000) == 0 ) zero_1; else zero_0;
+       carry_1; overflow_0;
+}
diff --git a/usr/src/sys/tahoealign/Astorer.c b/usr/src/sys/tahoealign/Astorer.c
new file mode 100644 (file)
index 0000000..dd8da30
--- /dev/null
@@ -0,0 +1,25 @@
+/*     Astorer.c       1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+storer(infop)  process_info *infop;
+/*
+/*     Store multiple registers.
+/*
+/***************************************/
+{
+       register int mask, next_register, new_address;
+
+       mask = operand(infop,0)->data & 0x3fff; /* Bits 0 to 13 only */
+       new_address = operand(infop,1)->address;
+       next_register = 0;                              /* Register # */
+       while (next_register <= 13)
+       { 
+               if (mask & 1 << next_register) 
+               {
+                       put_longword (infop, Register (infop, next_register),
+                               new_address);
+                       new_address += 4; 
+               }
+               next_register++;
+       }
+}
diff --git a/usr/src/sys/tahoealign/Asub2.c b/usr/src/sys/tahoealign/Asub2.c
new file mode 100644 (file)
index 0000000..f1cc638
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Asub2.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+sub2(infop)    process_info *infop;
+/*
+/*     Subtract , 2 operands.
+/*
+/*****************************************/
+{
+
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data1 - data0;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Asub3.c b/usr/src/sys/tahoealign/Asub3.c
new file mode 100644 (file)
index 0000000..5086c81
--- /dev/null
@@ -0,0 +1,22 @@
+/*     Asub3.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+sub3(infop)    process_info *infop;
+/*
+/*     Subtract , 3 operands.
+/*
+/*****************************************/
+{
+
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    data0, data1, result;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data1 - data0;         /* 32 bits of true result */
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/Asuba.c b/usr/src/sys/tahoealign/Asuba.c
new file mode 100644 (file)
index 0000000..7a70eff
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Asuba.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+suba(infop)    process_info *infop;
+/*
+/*     Subtract address.
+/*
+/****************************/
+{
+       register int data0, data1, result;
+
+       data0 = operand(infop,0)->data;
+       data1 = operand(infop,1)->data;
+       result = data1 - data0;
+       write_back (infop,result, operand(infop,1));
+}
diff --git a/usr/src/sys/tahoealign/Asubd.c b/usr/src/sys/tahoealign/Asubd.c
new file mode 100644 (file)
index 0000000..9ca10bb
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Asubd.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+subd(infop)    process_info *infop;
+/*
+/*     Subtract operand from accumulator to accumulator (double).
+/*
+/*******************************************************************/
+{
+       register double         *operand_pnt;
+       register double         *acc_pnt;
+
+       operand_pnt = (double *)&operand(infop,0)->data;
+       acc_pnt = (double *) &acc_high;
+       *acc_pnt = *acc_pnt - *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Asubf.c b/usr/src/sys/tahoealign/Asubf.c
new file mode 100644 (file)
index 0000000..3b3e402
--- /dev/null
@@ -0,0 +1,17 @@
+/*     Asubf.c 1.1     86/07/20        */
+
+
+#include "../tahoealign/align.h"
+subf(infop)    process_info *infop;
+/*
+/*     Subtract operand from accumulator to accumulator (float).
+/*
+/*******************************************************************/
+{
+       register float  *operand_pnt;
+       register float          *acc_pnt;
+
+       operand_pnt = (float *)&operand(infop,0)->data;
+       acc_pnt = (float *) &acc_high;
+       *acc_pnt = *acc_pnt - *operand_pnt;
+}
diff --git a/usr/src/sys/tahoealign/Atst.c b/usr/src/sys/tahoealign/Atst.c
new file mode 100644 (file)
index 0000000..da64680
--- /dev/null
@@ -0,0 +1,16 @@
+/*     Atst.c  1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+tst(infop)     process_info *infop;
+/*
+/*     Test operand, set condition codes.
+/*
+/************************************************/
+{
+       register long quantity;
+
+       quantity = operand(infop,0)->data;
+       if (quantity < 0) negative_1; else negative_0;
+       if (quantity == 0) zero_1; else zero_0;
+       overflow_0; carry_1;
+}
diff --git a/usr/src/sys/tahoealign/Awrite_back.c b/usr/src/sys/tahoealign/Awrite_back.c
new file mode 100644 (file)
index 0000000..4d6bf05
--- /dev/null
@@ -0,0 +1,23 @@
+/*     Awrite_back.c   1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+
+write_back(infop,value, where)
+process_info   *infop;
+long           value; 
+struct oprnd   *where;
+/*
+/*     Put the given result where the operand specifies. 
+/*     
+/*
+/**************************************************/
+{
+       switch (where->length)
+       {
+               case 1: write_byte (infop,value, where); break;
+               case 2: write_word (infop,value, where); break;
+               case 4: write_longword (infop,value, where); break;
+               case 8: write_quadword (infop,value, where); break;
+               default : printf ("Wrong destination length in alignment\n");
+       }
+}
diff --git a/usr/src/sys/tahoealign/Awrite_byte.c b/usr/src/sys/tahoealign/Awrite_byte.c
new file mode 100644 (file)
index 0000000..75d5651
--- /dev/null
@@ -0,0 +1,38 @@
+/*     Awrite_byte.c   1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+write_byte (infop,byte, where)
+process_info   *infop;
+long           byte; 
+struct oprnd   *where;
+/*
+/*     Put the 'byte' at the given address in
+/*     tahoe's memory.
+/*     
+/*     1. Only the least significant byte is written.
+/*
+/**************************************************/
+{
+       register struct operand_des *look_at;
+
+       look_at = &Table[opCODE].operand[last_operand];
+       if (! (look_at->add_modes & NOVF))
+               if (byte > 0x7f || byte < -0x80) overflow_1;    
+       if (!(where->mode & W)) exception(infop, ILL_ADDRMOD);
+       switch (where->mode & ADDFIELD) /* Mask out R/W bits */
+       {
+       case Add:
+               put_byte(infop, byte, where->address);
+               break;
+       case Dir:
+               Replace (infop, where->reg_number, byte);
+               break;
+       case SPmode:
+               where->mode = where->mode & ~SPmode | Add;
+               write_longword (infop, byte, where);
+               break;
+       default:
+               printf("Unknown destination in write_byte (alignment code)\n");
+       };
+}      
diff --git a/usr/src/sys/tahoealign/Awrite_long.c b/usr/src/sys/tahoealign/Awrite_long.c
new file mode 100644 (file)
index 0000000..6adfdf1
--- /dev/null
@@ -0,0 +1,28 @@
+/*     Awrite_long.c   1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+write_longword (infop, longword, where)
+process_info   *infop;
+long           longword;
+struct oprnd   *where;
+/*
+/*     Put the longword at the given address in
+/*     tahoe's memory.
+/*
+/**************************************************/
+{
+       if (! (where->mode & W)) exception(infop, ILL_ADDRMOD);
+       switch (where->mode & ADDFIELD) /* Mask out R/W bits */
+       {
+       case Add:
+       case SPmode:
+               put_longword (infop, longword, where->address);
+               break;
+       case Dir:
+               Replace (infop, where->reg_number, longword);
+               break;
+       default:
+               printf("Unknown destination in write_long (alignment code)\n");
+       };
+}      
diff --git a/usr/src/sys/tahoealign/Awrite_quad.c b/usr/src/sys/tahoealign/Awrite_quad.c
new file mode 100644 (file)
index 0000000..b79a4bb
--- /dev/null
@@ -0,0 +1,35 @@
+/*     Awrite_quad.c   1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+write_quadword (infop, qword, where)
+process_info   *infop;
+quadword       qword;
+struct oprnd   *where;
+/*
+/*     Put the quadword at the given address in memory.
+/*     
+/*
+/**************************************************/
+{
+       if (! (where->mode & W)) exception(infop, ILL_ADDRMOD);
+       switch (where->mode & ADDFIELD) /* Mask out R/W bits */
+       {
+       case Add:
+               put_longword (infop, qword.high, where->address);
+               where->address += 4;
+               put_longword (infop, qword.low, where->address);
+               break;
+       case Dir:
+               if ( where->reg_number >= SPOINTER || (where->reg_number & 1) == 1 )
+                       exception (infop, ILL_OPRND); 
+               Replace (infop, where->reg_number, qword.high);
+               Replace (infop, where->reg_number+1, qword.low);
+               break;
+       case SPmode:
+               exception(infop, ILL_ADDRMOD);
+               break;
+       default:
+               printf("Unknown destination in write_quad (alignment code)\n");
+       };
+}      
diff --git a/usr/src/sys/tahoealign/Awrite_word.c b/usr/src/sys/tahoealign/Awrite_word.c
new file mode 100644 (file)
index 0000000..b5df01a
--- /dev/null
@@ -0,0 +1,38 @@
+/*     Awrite_word.c   1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+write_word (infop, word, where)
+process_info   *infop;
+long           word;
+struct oprnd   *where;
+/*
+/*     Put the word at the given address in
+/*     tahoe's memory.
+/*     
+/*     1. The least significant word is written.
+/*
+/**************************************************/
+{
+       register struct operand_des *look_at;
+
+       look_at = &Table[opCODE].operand[last_operand];
+       if (! (look_at->add_modes & NOVF))
+               if (word > 0x7fff || word < -0x8000) overflow_1;        
+       if (! (where->mode & W)) exception(infop, ILL_ADDRMOD);
+       switch (where->mode & ADDFIELD) /* Mask out R/W bits */
+       {
+       case Add:
+               put_word (infop, word, where->address);
+               break;
+       case Dir:
+               Replace (infop, where->reg_number, word);
+               break;
+       case SPmode: 
+               where->mode = where->mode & ~SPmode | Add; 
+               write_longword (infop, word, where);
+               break;
+       default:
+               printf("Unknown destination in write_word (alignment code)\n");
+       };
+}      
diff --git a/usr/src/sys/tahoealign/Awriteable.c b/usr/src/sys/tahoealign/Awriteable.c
new file mode 100644 (file)
index 0000000..95841f4
--- /dev/null
@@ -0,0 +1,79 @@
+/*     Awriteable.c    1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+
+long writeable(infop, address, length)
+process_info   *infop;
+long           address, length;
+/*
+ *   Return TRUE (= -1) if the specified bytes can be written without an access
+ * control violation (limit and/or protection). Page faults are OK.
+ *   If problems, return the code that would be pushed by HW on the
+ * stack (see the architecture manual).
+ *   Assumption is that in most cases, access is OK, so a quick 'probew'
+ * will be enough. If not, we have to work harder to determine the exact
+ * cause and return the right code, without getting the fault here in
+ * the kernel !!.
+ *
+ * The address is assumed to be write for the user.!
+ */
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    Register_11;
+       register        long    Register_10;
+       register        long    Register_9;
+       register        long    Register_8;
+       register        long    subspace;
+       register        long    last_page;
+
+       Register_12 = address;
+       Register_11 = length-1;
+       asm ("          probew  $1,(r12),$1     ");     /* Yeach ... */
+       asm ("          beql    no_access       ");
+       asm ("          addl2   r11,r12         ");     /* last byte */
+       asm ("          probew  $1,(r12),$1     ");
+       asm ("          beql    no_access       ");
+       asm ("          movl    $-1,r0          ");     /* TRUE */
+       asm ("          ret#1                   ");
+       asm ("no_access:                        ");
+/*
+ * Now the hard work. Have to check length violation first.
+ * If any byte (first or last) causes a length violation, report it as such.
+ */
+       asm ("  mfpr    $3,r8   ");     /* Get length registers. P0LR */
+       asm ("  mfpr    $5,r9   ");     /* P1LR */
+       asm ("  mfpr    $7,r10  ");     /* P2LR */
+       asm ("  mfpr    $1,r11  ");     /* SLR */
+
+       subspace = (address >> 30) & 3;
+       Register_12 = (address >> 10) & 0xfffff;        /* 1'st byte page # */
+       last_page = ( (address+length-1) >> 10) & 0xfffff;
+       switch ( subspace ) {
+       case 0:
+               if ( (Register_12 >= Register_8) ||
+                    (last_page   >= Register_8) ) return (1);
+               break;
+       case 1:
+               if ( (Register_12 >= Register_9) ||
+                    (last_page   >= Register_9) ) return (1);
+               break;
+       case 2:
+               if ( (Register_12 < Register_10) ||
+                    (last_page   < Register_10) ) return (1);
+               break;
+       case 3:
+               if ( (Register_12 >= Register_11) ||
+                    (last_page   >= Register_11) ) return (1);
+               break;
+       }
+/*
+ * OK, it's not a length violation. Must have been an access problem
+ * (no write by user).
+ *
+ * NOTE : I definitely ignore the case of 'no PTE access' since I
+ *     assume that's not the case for user mode. Besides, the poor
+ *     guy will just get an access violation that will most probably
+ *     send him into hyperspace anyway, so no need to be too acurate here.
+ */
+       return (4);
+}
diff --git a/usr/src/sys/tahoealign/Axor2.c b/usr/src/sys/tahoealign/Axor2.c
new file mode 100644 (file)
index 0000000..69399da
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Axor2.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+xor2(infop)    process_info *infop;
+/*
+/*     Xor , 2 operands.
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    result, data0, data1;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 ^ data1;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,1) );
+}
diff --git a/usr/src/sys/tahoealign/Axor3.c b/usr/src/sys/tahoealign/Axor3.c
new file mode 100644 (file)
index 0000000..2969990
--- /dev/null
@@ -0,0 +1,21 @@
+/*     Axor3.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+xor3 (infop)   process_info *infop;
+/*
+/*     Xor , 3 operands.
+/*
+/****************************************/
+{
+       register        long    Register_12;    /* Has to be first reg ! */
+       register        long    result, data0, data1;
+
+       data0 = operand(infop,0)->data; 
+       data1 = operand(infop,1)->data; 
+       Register_12=psl;
+       Set_psl(r12);   /* restore the user psl */
+       result = data0 ^ data1;
+       asm ("  movpsl  r12");
+       New_cc (Register_12);
+       write_back (infop,result, operand(infop,2) );
+}
diff --git a/usr/src/sys/tahoealign/align.c b/usr/src/sys/tahoealign/align.c
new file mode 100644 (file)
index 0000000..70d7d2b
--- /dev/null
@@ -0,0 +1,41 @@
+/*     align.c 1.1     86/07/20        */
+
+#include       "../tahoealign/align.h"
+
+/*
+ * Part of the parameter list is set up by locore.s.
+ * First 2 dummy variables MUST BE the first local
+ * variables; leaving place for registers 0 and 1
+ * which are not preserved by the current C compiler.
+ * Then, the array of structures and the last_operand
+ * HAVE to be in the given order, to correspond to the
+ * description of process_info in 'alignment.h'. 
+ */
+alignment()
+{
+       long    space_4_Register_1;     /* register 1 */
+       long    space_4_Register_0;     /* register 0 */
+       struct  oprnd   space_4_decoded[4];
+       long    space_4_opcode;
+       long    space_4_last_operand;   /* Last operand # processed */
+       long    space_4_saved_pc;
+       long    space_4_saved_sp;
+
+       register process_info *infop;
+
+       infop = (process_info *)&space_4_saved_sp;
+       saved_pc = pc;
+       saved_sp = sp;                          /* For possible exceptions */
+
+       last_operand = -1;   /* To get the operand routine going correctly */
+
+       opCODE = 0xff & *(char *)pc;
+       pc++;
+       (*Table[opCODE].routine) (infop);       /* Call relevant handler */
+       /*
+        * NOTE: nothing should follow, except the return.
+        * The register variables cannot be trusted anymore,
+        * if an exception is signalled.  See 'exception.c'
+        * to understand why.
+        */
+}
diff --git a/usr/src/sys/tahoealign/align.h b/usr/src/sys/tahoealign/align.h
new file mode 100644 (file)
index 0000000..7942a88
--- /dev/null
@@ -0,0 +1,133 @@
+/*     align.h 1.1     86/07/20        */
+
+#ifndef        LOCORE
+/*
+ * Some special registers definitions.
+ */
+
+#ifndef        SLR
+#define        SLR     1
+#define        P0LR    3
+#define        P1LR    5
+#define        P2LR    7
+#endif
+
+#include       "../tahoealign/defs.h"
+/*
+ * Definitions about the stack frame as seen by the routine
+ * 'alignment' in the kernel. If you ever wondered what's the
+ * meaning of 'machine dependent code', look here :-)
+ * This structure is partly set up by locore.s, for 'alignment',
+ * and partly by the allocation of local variables in 'alignment.c'
+ * itself.
+ *    All these things are passed between procedures on the
+ * (current process' kernel) stack. The alternative (static
+ * variables) is a little bit more elegant but it works fine
+ * for one process only. Will not work for multiple processes
+ * with alignment processing or for MP models of HW.
+ *
+ * WARNING : due to the intimate relationships involved, don't
+ *     change the process_info structure unless you also
+ *     change the alignment trap code in locore.s AND the
+ *     allocation of local variables in 'alignment.c' !!
+ */
+typedef        struct {
+       long            Saved_sp;               /* For exceptions */
+       long            Saved_pc;
+       long            Last_operand;           /* Last operand # processed */
+       long            Opcode;                 /* 'offending' opcode */
+       struct  oprnd   Decoded[4];     
+       long            REG0;
+       long            REG1;
+       long            REG2;
+       long            REG3;
+       long            REG4;
+       long            REG5;
+       long            REG6;
+       long            REG7;
+       long            REG8;
+       long            REG9;
+       long            REG10;
+       long            REG11;
+       long            REG12;
+       long            return_pc;      /* Points into locore.s */
+       long            mask_restored;
+       long            REG13;          /* Original, from the process */
+       long            Sp;             /* Alias R14 */
+       long            ret_code;
+       long            ret_addr;
+       long            ret_exception;  /* To tell locore.s about problems */
+       long            Ach;
+       long            Acl;
+       unsigned        unused:30;
+       unsigned        pcb_acc_pnt:1;
+       unsigned        acc_dbl:1;
+       long            Pc;             /* Alias R15 */
+       long            Psl;
+} process_info;
+
+#define        saved_pc        (infop->Saved_pc)
+#define        saved_sp        (infop->Saved_sp)
+#define last_operand   (infop->Last_operand)
+#define        opCODE          (infop->Opcode)
+#define        decoded         (infop->Decoded)
+#define        r0              (infop->REG0)
+#define        r1              (infop->REG1)
+#define        r2              (infop->REG2)
+#define        r3              (infop->REG3)
+#define        r4              (infop->REG4)
+#define        r5              (infop->REG5)
+#define        r6              (infop->REG6)
+#define        r7              (infop->REG7)
+#define        r8              (infop->REG8)
+#define        r9              (infop->REG9)
+#define        r10             (infop->REG10)
+#define        r11             (infop->REG11)
+#define        r12             (infop->REG12)
+#define        r13             (infop->REG13)
+#define        fp              (infop->REG13)
+#define        sp              (infop->Sp)
+#define        acc_high        (infop->Ach)
+#define        acc_low         (infop->Acl)
+#define        pc              (infop->Pc)
+#define        psl             (infop->Psl)
+
+#define        PCOUNTER                15
+#define        SPOINTER                14
+
+
+/*
+ * Setting new condition codes for the process.
+#define Set_psl(z)     asm("   movl    z,r6"); \
+                       asm("   andl2   $15,r6"); \
+                       asm("   mnegl   $1,r7"); \
+                       asm("   xorl2   r6,r7"); \
+                       asm("   andl2   $15,r7"); \
+                       asm("   bicpsw  r7"); \
+                       asm("   bispsw  r6")
+ */
+#define Set_psl(z)     asm("   andl2   $15,z"); \
+                       asm("   mnegl   $1,r6"); \
+                       asm("   xorl2   z,r6"); \
+                       asm("   andl2   $15,r6"); \
+                       asm("   bicpsw  r6"); \
+                       asm("   bispsw  z")
+#define        New_cc(x)       (x) &= PSL_ALLCC; psl = psl & ~PSL_ALLCC | (x)
+
+#endif
+
+/*
+ * Definitions for ret_code. NOTE : DON"T USE 0 !! locore.s knows that
+ *     0 means OK, no problems !
+ */
+
+#define        ILL_ADDRMOD     1
+#define        ILL_ACCESS      2
+#define        ILL_OPRND       3
+#define        ARITHMETIC      4
+#define        ALIGNMENT       5
+
+/*
+ * For use in u.u_eosys as a flag.
+ */
+#define        EMULATEALIGN    0x80
diff --git a/usr/src/sys/tahoealign/defs.h b/usr/src/sys/tahoealign/defs.h
new file mode 100644 (file)
index 0000000..9064b2f
--- /dev/null
@@ -0,0 +1,118 @@
+/*     defs.h  1.1     86/07/20        */
+
+#include "../tahoe/psl.h"
+
+/************************************************/
+/*     Basic 6/32 machine definitions          */
+/************************************************/
+
+#define        FALSE   0
+#define        TRUE    (~FALSE)
+#define READ   0
+#define WRITE  1
+
+/*
+ * Some floatng point stuff.
+ */
+
+#define exp(x)         ( (x) & 0x7f800000 )
+#define reserved(x)    ( (x) < 0  && (exp(x) == 0) )
+
+/************************************************/
+/*                                             */
+/*     Opcodes description table stuff         */
+/*                                             */
+/************************************************/
+
+struct operand_des     {               /* Operand descriptor in great table */
+               int     add_modes;      /* Allowed addressing modes */
+               int     length;         /* Length of this data (bytes) */
+};
+
+#define        Add     1       /* Any address except PC relative & ablsolute */
+#define        Dir     2       /* Direct register */
+#define        Imm     4       /* Immediate datum */
+#define        Lit     8       /* Short literal */
+#define        Brd     0x10    /* Branch displacement */
+#define        Pcrel   0x20    /* PC relative allowed */
+#define        Abs     0x40    /* Absolute address allowed */
+#define        SPmode  0x80    /* The stack pointer was involved , -(sp) or (sp)+ */
+#define        ADDFIELD 0xff   /* Allowed addressing modes */
+
+#define        W       0x100   /* Access is write */
+#define R      0x200   /* Access is 'read' */
+#define        Indx    0x400   /* Indexable base address */
+#define        NOVF    0x800   /* Inhibit overflow check when writing byte/word */
+#define FLP    0x1000  /* Floating point operand */
+
+#define        M       (R|W)   /* Access is 'modify' */
+#define PR     (Pcrel|Abs)
+#define ADDR   (PR|Add)
+#define        ADI     (ADDR|Dir|Imm|Lit)
+#define        AD      (ADDR|Dir)
+#define        MAD     (M|ADDR|Dir)
+#define        WAD     (W|ADDR|Dir)
+#define WD     (W|Dir)
+#define NWAD   (NOVF|WAD)
+#define        NMAD    (NOVF|MAD)
+#define        RADI    (R|ADI) /* Readable datum */
+#define RAD    (R|AD)  /* Modify type access for destinations */
+#define RADF   (RAD|FLP)
+#define WADF   (WAD|FLP)
+
+
+
+
+struct opcode_des      {       /* One line in the big table */
+       int     (*routine)      ();             /* Handler for this opcode */
+       struct  operand_des operand[4];         /* Up to 4 operands */
+};
+
+/************************************************/
+/*                                             */
+/*     Operand descriptor as returned          */
+/*     by the address mode decoder             */
+/*                                             */
+/************************************************/
+
+struct oprnd {
+       long    mode;                   /* Add, Imm, Dir or Brd */
+       long    reg_number;             /* returned for Dir mode */
+       long    address;                /* Relevant for Add or Brd */
+       long    data;
+       long    data2;                  /* Up to 8 bytes returned */
+       long    length;                 /* Length of data manipulated */
+};
+
+/************************************************/
+/*                                             */
+/*     Some PSL macros (usefull)               */
+/*                                             */
+/************************************************/
+#define        carry           (psl & PSL_C)
+#define        negative        (psl & PSL_N)
+#define overflow       (psl & PSL_V)
+#define zero           (psl & PSL_Z)
+
+#define carry_1                psl |= PSL_C
+#define negative_1     psl |= PSL_N
+#define overflow_1     psl |= PSL_V
+#define zero_1         psl |= PSL_Z
+
+#define carry_0                psl &= ~PSL_C
+#define negative_0     psl &= ~PSL_N
+#define overflow_0     psl &= ~PSL_V
+#define zero_0         psl &= ~PSL_Z
+
+
+struct oprnd           *operand ();
+struct opcode_des      Table[];
+
+struct double_length
+{
+       int     low;
+       int     high;
+};
+
+typedef        struct  double_length   quadword;
+
diff --git a/usr/src/sys/tahoealign/exception.c b/usr/src/sys/tahoealign/exception.c
new file mode 100644 (file)
index 0000000..ebfb8ac
--- /dev/null
@@ -0,0 +1,92 @@
+/*     exception.c     1.1     86/07/20        */
+
+#include "../tahoealign/align.h" 
+
+/*
+ * Signal an exception. It will be handled by 'locore.s'. Here, I:
+ *     1) Put the exception code where it belongs on the stack.
+ *     2) Restore pc and sp to show that the current opcode
+ *             'was not executed'.
+ *     3) Execute one big non-local-goto. In the process we take care
+ *             to reset the current HW fp such that 'alignment' will
+ *             indeed return to 'locore.s'.
+ *             IMPORTANT NOTE : the process I use will NOT restore
+ *             all registers (like normal returns) so the call to the
+ *             handling routine HAS TO BE the last thing in 'alignment'.
+ *             Otherwise, all its own register variables will be a mess !!
+ *             I also know that 'alignment' itself WILL restore all
+ *             registers for 'locore.s' since its entry mask is all-1.
+ */
+exception(infop, type, param1, param2)
+process_info *infop;
+int    type, param1, param2;
+{
+       register long *my_fp;
+       register long *current_fp, *prev_fp;
+
+       my_fp = (long *)&infop-1 ;
+       infop->ret_exception = type;
+       switch (type) {
+       case ARITHMETIC:
+               infop->ret_code = param1;
+               break;
+       case ILL_ACCESS:
+               infop->ret_addr = param1;
+               infop->ret_code = param2;
+               break;
+       case ALIGNMENT:
+       case ILL_ADDRMOD:
+       case ILL_OPRND:
+               break;
+       default :
+               printf ("Bad exception type %d (alignment code)\n", type);
+               break;
+       }
+/*
+ * Now the big trick. Look up the stack until the frame of
+ * 'alignment' is found. prev_fp will point to it and current_fp
+ * will then point to the frame of whoever 'alignment' called.
+ * This should better work ...
+ */
+       prev_fp = my_fp;
+       while (prev_fp != &fp) {
+               current_fp = prev_fp;
+               prev_fp = (long *) *prev_fp;
+       }
+/*
+ * Found it. Now fool the HW into thinking that 'alignment' called
+ * us directly here, so this routine's 'return' will go back
+ * all the way to 'alignment', stopping any further emulation
+ * for the current offending opcode.
+ *  "fool the HW..." ha ha, am I realy fooling myself ?
+ */
+       *my_fp = *current_fp;
+       *(my_fp - 2) = *(current_fp -2);        /* Alter program counter */
+/*
+ * Without further ado, just go back now !!!!
+ */
+}
+
+not_needed (infop)
+process_info *infop;
+{
+/*
+ * Shouldn't ever come to this routine.
+ */
+
+       printf ("Opcode 0x%x should not trap to alignment code.",
+               opCODE);
+       printf (" OS or machine problem!! \n");
+}
+
+
+cannot_do (infop)
+process_info *infop;
+{
+/*
+ * Some opcode-caused alignments cannot be emulated. See table.c for
+ * specific reasons. Reflect this back to the process as alignment
+ * exception.
+ */
+       exception (infop, ALIGNMENT);
+}
diff --git a/usr/src/sys/tahoealign/table.c b/usr/src/sys/tahoealign/table.c
new file mode 100644 (file)
index 0000000..5cf5f2f
--- /dev/null
@@ -0,0 +1,505 @@
+/*     table.c 1.1     86/07/20        */
+
+#include "../tahoealign/align.h"
+/*   WARNING !!!  Do not use register 6 and register 7 in any of the emulation
+ *       code.  The macro Set_psl has use these two registers to set the
+ *       user psl to the current kernel psl.
+ *
+ */
+
+#define        insque  cannot_do       /* Can't emulate un-interruptable opcode ! */
+#define        remque  cannot_do       /* Can't emulate un-interruptable opcode ! */
+#define        addb2   add2
+#define        addb3   add3
+#define        addl2   add2
+#define        addl3   add3
+#define        addw2   add2
+#define        addw3   add3
+#define        andb2   and2
+#define        andb3   and3
+#define        andl2   and2
+#define        andl3   and3
+#define        andw2   and2
+#define        andw3   and3
+#define        atanf   not_needed
+#define        kcall   cannot_do       /* Too complicated to emulate completely */
+#define        bbssi   cannot_do       /* Interlock memory during emulation ??? */
+#define        bcc     not_needed
+#define        bcs     not_needed
+#define        beql    not_needed
+#define        bgeq    not_needed
+#define        bgtr    not_needed
+#define        bgtru   not_needed
+#define        bitb    bit
+#define        bitl    bit
+#define        bitw    bit
+#define        bleq    not_needed
+#define        blequ   not_needed
+#define        blss    not_needed
+#define        bnequ   not_needed
+#define        bpt     not_needed
+#define        brb     not_needed
+#define        brw     not_needed
+#define        bvc     not_needed
+#define        bvs     not_needed
+#define        callf   not_needed 
+#define        calls   not_needed 
+#define        clrb    clr
+#define        clrl    clr
+#define        clrw    clr
+#define        cmpb    cmp
+#define        cmpl    cmp
+#define        cmps2   not_needed
+#define        cmps3   not_needed
+#define        cmpw    cmp
+#define        cosf    not_needed
+#define        cvdf    not_needed
+#define        cvtbl   cvt
+#define        cvtbw   cvt
+#define        cvtwl   cvt
+#define        cvtwb   cvtlb
+#define        decb    dec
+#define        decl    dec
+#define        decw    dec
+#define        expf    not_needed
+#define        ffs     ffs_op
+#define        incb    inc
+#define        incl    inc
+#define        incw    inc
+#define        ldpctx  not_needed
+#define        logf    not_needed
+#define        mcomb   mcom
+#define        mcoml   mcom
+#define        mcomw   mcom
+#define        mnegb   mneg
+#define        mnegl   mneg
+#define        mnegw   mneg
+#define        movab   mova
+#define        moval   mova
+#define        movaw   mova
+#define        movow   cannot_do       /* 2 X movob != movow !! See any HW spec ! */
+#define movob  movob_op
+#define        movb    mov
+#define        movblk  not_needed
+#define        movl    mov
+#define        movs2   not_needed
+#define        movs3   not_needed
+#define        movw    mov
+#define        negd    not_needed
+#define        negf    not_needed
+#define        nop     not_needed
+#define        orb2    or2
+#define        orb3    or3
+#define        orl2    or2
+#define        orl3    or3
+#define        orw2    or2
+#define        orw3    or3
+#define        pushab  pusha
+#define        pushal  pusha
+#define        pushaw  pusha
+#define        pushb   pushx
+#define        pushd   not_needed
+#define        pushl   pushx
+#define        pushw   pushx
+#define        rei     not_needed
+#define        ret     not_needed
+#define        sinf    not_needed
+#define        sqrtf   not_needed
+#define        subb2   sub2
+#define        subb3   sub3
+#define        subl2   sub2
+#define        subl3   sub3
+#define        subw2   sub2
+#define        subw3   sub3
+#define        svpctx  not_needed
+#define        tstb    tst
+#define        tstd    not_needed
+#define        tstf    not_needed
+#define        tstl    tst
+#define        tstw    tst
+#define        xorb2   xor2
+#define        xorb3   xor3
+#define        xorl2   xor2
+#define        xorl3   xor3
+#define        xorw2   xor2
+#define        xorw3   xor3
+#define movzbl movzb
+#define movzbw movzb
+#define        halt    not_needed              /* Privileged to user */
+#define        illegal not_needed              /* Should be trapped by HW */
+#define        mtpr    not_needed              /* Privileged to user */
+#define        mfpr    not_needed              /* Privileged to user */
+#define        btcs    not_needed              /* Privileged to user */
+
+int    add2();
+int    add3();
+int    adda();
+int    addd();
+int    addf();
+int    adwc();
+int    and2();
+int    and3();
+int    aobleq();
+int    aoblss();
+int    bbc();
+int    bbs();
+int    bbssi();
+int    bcc();
+int    bcs();
+int    beql();
+int    bgeq();
+int    bgtr();
+int    bgtru();
+int    bicpsw();
+int    bispsw();
+int    bit();
+int    bleq();
+int    blequ();
+int    blss();
+int    bnequ();
+int    btcs();
+int    bvc();
+int    bvs();
+int    call();
+int    casel();
+int    clr();
+int    cmp();
+int    cmpd();
+int    cmpd2();
+int    cmpf();
+int    cmpf2();
+int    cvdl();
+int    cvfl();
+int    cvld();
+int    cvlf();
+int    cvt();
+int    cvt();
+int    cvtlb();
+int    cvtlw();
+int    dec();
+int    divd();
+int    divf();
+int    divl2();
+int    divl3();
+int    ediv();
+int    emul();
+int    ffc();
+int    ffs_op();
+int    halt();
+int    illegal();
+int    inc();
+int    insque();
+int    jmp();
+int    kcall();
+int    ldd();
+int    ldf();
+int    ldfd();
+int    lnd();
+int    lnf();
+int    loadr();
+int    mcom();
+int    mfpr();
+int    mneg();
+int    mov();
+int    mova();
+int    movob_op();
+int    movow();
+int    movpsl();
+int    movzb();
+int    movzwl();
+int    mtpr();
+int    muld();
+int    mulf();
+int    mull2();
+int    mull3();
+int    or2();
+int    or3();
+int    prober();
+int    probew();
+int    pusha();
+int    pushx();
+int    remque();
+int    sbwc();
+int    shal();
+int    shar();
+int    shll();
+int    shlq();
+int    shrl();
+int    shrq();
+int    std();
+int    stf();
+int    storer();
+int    sub2();
+int    sub3();
+int    suba();
+int    subd();
+int    subf();
+int    tst();
+int    xor2();
+int    xor3();
+int    not_needed();
+
+
+/**************************************************/
+/*  The great opcodes table, it drives everything */
+/**************************************************/
+
+struct opcode_des      Table[]= {
+
+/* 00 */ halt      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 01 */ halt      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 02 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 03 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 04 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 05 */ sinf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 06 */ ldf       ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* 07 */ ldd       ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* 08 */ addb2     ,RADI,   1, MAD,   1,   0,   0,   0,   0,
+/* 09 */ movb      ,RADI,   1,NWAD,   1,   0,   0,   0,   0,
+/* 0A */ addw2     ,RADI,   2, MAD,   2,   0,   0,   0,   0,
+/* 0B */ movw      ,RADI,   2,NWAD,   2,   0,   0,   0,   0,
+/* 0C */ addl2     ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 0D */ movl      ,RADI,   4,NWAD,   4,   0,   0,   0,   0,
+/* 0E */ bbs       ,RADI,   4, RAD,   4, Brd,   2,   0,   0,
+/* 0F */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 10 */ nop       ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 11 */ brb       , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 12 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 13 */ brw       , Brd,   2,   0,   0,   0,   0,   0,   0,
+/* 14 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 15 */ cosf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 16 */ lnf       ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* 17 */ lnd       ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* 18 */ addb3     ,RADI,   1,RADI,   1, WAD,   1,   0,   0,
+/* 19 */ cmpb      ,RADI,   1,RADI,   1,   0,   0,   0,   0,
+/* 1A */ addw3     ,RADI,   2,RADI,   2, WAD,   2,   0,   0,
+/* 1B */ cmpw      ,RADI,   2,RADI,   2,   0,   0,   0,   0,
+/* 1C */ addl3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* 1D */ cmpl      ,RADI,   4,RADI,   4,   0,   0,   0,   0,
+/* 1E */ bbc       ,RADI,   4, RAD,   4, Brd,   2,   0,   0,
+/* 1F */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 20 */ rei       ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 21 */ bnequ     , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 22 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 23 */ cvtwl     ,RADI,   2, WAD,   4,   0,   0,   0,   0,
+/* 24 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 25 */ atanf     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 26 */ stf       , WAD,   4,   0,   0,   0,   0,   0,   0,
+/* 27 */ std       , WAD,   8,   0,   0,   0,   0,   0,   0,
+/* 28 */ subb2     ,RADI,   1, MAD,   1,   0,   0,   0,   0,
+/* 29 */ mcomb     ,RADI,   1,NWAD,   1,   0,   0,   0,   0,
+/* 2A */ subw2     ,RADI,   2, MAD,   2,   0,   0,   0,   0,
+/* 2B */ mcomw     ,RADI,   2,NWAD,   2,   0,   0,   0,   0,
+/* 2C */ subl2     ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 2D */ mcoml     ,RADI,   4, WAD,   4,   0,   0,   0,   0,
+/* 2E */ emul      ,RADI,   4,RADI,   4,RADI,   4, WAD,   8,
+/* 2F */ aoblss    ,RADI,   4, MAD,   4, Brd,   2,   0,   0,
+/* 30 */ bpt       ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 31 */ beql      , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 32 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 33 */ cvtwb     ,RADI,   2, WAD,   1,   0,   0,   0,   0,
+/* 34 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 35 */ logf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 36 */ cmpf      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* 37 */ cmpd      ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* 38 */ subb3     ,RADI,   1,RADI,   1, WAD,   1,   0,   0,
+/* 39 */ bitb      ,RADI,   1,RADI,   1,   0,   0,   0,   0,
+/* 3A */ subw3     ,RADI,   2,RADI,   2, WAD,   2,   0,   0,
+/* 3B */ bitw      ,RADI,   2,RADI,   2,   0,   0,   0,   0,
+/* 3C */ subl3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* 3D */ bitl      ,RADI,   4,RADI,   4,   0,   0,   0,   0,
+/* 3E */ ediv      ,RADI,   4,RADI,   8, WAD,   4,  WD,   4,
+/* 3F */ aobleq    ,RADI,   4, MAD,   4, Brd,   2,   0,   0,
+/* 40 */ ret       ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 41 */ bgtr      , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 42 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 43 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 44 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 45 */ sqrtf     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 46 */ cmpf2     ,RADF,   4,RADF,   4,   0,   0,   0,   0,
+/* 47 */ cmpd2     ,RADF,   8,RADF,   8,   0,   0,   0,   0,
+/* 48 */ shll      ,RADI,   1,RADI,   4, WAD,   4,   0,   0,
+/* 49 */ clrb      , WAD,   1,   0,   0,   0,   0,   0,   0,
+/* 4A */ shlq      ,RADI,   1,RADI,   8, WAD,   8,   0,   0,
+/* 4B */ clrw      , WAD,   2,   0,   0,   0,   0,   0,   0,
+/* 4C */ mull2     ,RADI,   4, MAD,   4,   0,   0,   0,   0, 
+/* 4D */ clrl      , WAD,   4,   0,   0,   0,   0,   0,   0,
+/* 4E */ shal      ,RADI,   1,RADI,   4, WAD,   4,   0,   0,
+/* 4F */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 50 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 51 */ bleq      , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 52 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 53 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 54 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 55 */ expf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 56 */ tstf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 57 */ tstd      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 58 */ shrl      ,RADI,   1,RADI,   4, WAD,   4,   0,   0,
+/* 59 */ tstb      ,RADI,   1,   0,   0,   0,   0,   0,   0,
+/* 5A */ shrq      ,RADI,   1,RADI,   8, WAD,   8,   0,   0,
+/* 5B */ tstw      ,RADI,   2,   0,   0,   0,   0,   0,   0,
+/* 5C */ mull3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* 5D */ tstl      ,RADI,   4,   0,   0,   0,   0,   0,   0,
+/* 5E */ shar      ,RADI,   1,RADI,   4, WAD,   4,   0,   0,
+/* 5F */ bbssi     ,RADI,   4, MAD,   4, Brd,   2,   0,   0,
+/* 60 */ ldpctx    ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 61 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 62 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 63 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 64 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 65 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 66 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 67 */ pushd     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 68 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 69 */ incb      , MAD,   1,   0,   0,   0,   0,   0,   0,
+/* 6A */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 6B */ incw      , MAD,   2,   0,   0,   0,   0,   0,   0,
+/* 6C */ divl2     ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 6D */ incl      , MAD,   4,   0,   0,   0,   0,   0,   0,
+/* 6E */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 6F */ cvtlb     ,RADI,   4, WAD,   1,   0,   0,   0,   0,
+/* 70 */ svpctx    ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 71 */ jmp       ,ADDR,   1,   0,   0,   0,   0,   0,   0,
+/* 72 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 73 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 74 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 75 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 76 */ cvlf      , RAD,   4,   0,   0,   0,   0,   0,   0,
+/* 77 */ cvld      , RAD,   4,   0,   0,   0,   0,   0,   0,
+/* 78 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 79 */ decb      , MAD,   1,   0,   0,   0,   0,   0,   0,
+/* 7A */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 7B */ decw      , MAD,   2,   0,   0,   0,   0,   0,   0,
+/* 7C */ divl3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* 7D */ decl      , MAD,   4,   0,   0,   0,   0,   0,   0,
+/* 7E */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 7F */ cvtlw     ,RADI,   4, WAD,   2,   0,   0,   0,   0,
+/* 80 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 81 */ bgeq      , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 82 */ movs2     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 83 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 84 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 85 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 86 */ cvfl      , WAD,   4,   0,   0,   0,   0,   0,   0,
+/* 87 */ cvdl      , WAD,   4,   0,   0,   0,   0,   0,   0,
+/* 88 */ orb2      ,RADI,   1,NMAD,   1,   0,   0,   0,   0, 
+/* 89 */ cvtbl     ,RADI,   1, WAD,   4,   0,   0,   0,   0,
+/* 8A */ orw2      ,RADI,   2,NMAD,   2,   0,   0,   0,   0,
+/* 8B */ bispsw    ,RADI,   2,   0,   0,   0,   0,   0,   0,
+/* 8C */ orl2      ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 8D */ adwc      ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 8E */ adda      ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 8F */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 90 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 91 */ blss      , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* 92 */ cmps2     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 93 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 94 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 95 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 96 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* 97 */ ldfd      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* 98 */ orb3      ,RADI,   1,RADI,   1,NWAD,   1,   0,   0,
+/* 99 */ cvtbw     ,RADI,   1, WAD,   2,   0,   0,   0,   0,
+/* 9A */ orw3      ,RADI,   2,RADI,   2,NWAD,   2,   0,   0,
+/* 9B */ bicpsw    ,RADI,   2,   0,   0,   0,   0,   0,   0,
+/* 9C */ orl3      ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* 9D */ sbwc      ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 9E */ suba      ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* 9F */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A0 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A1 */ bgtru     , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* A2 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A3 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A6 */ cvdf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A7 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* A8 */ andb2     ,RADI,   1,NMAD,   1,   0,   0,   0,   0,
+/* A9 */ movzbl    ,RADI,   1, WAD,   4,   0,   0,   0,   0,
+/* AA */ andw2     ,RADI,   2,NMAD,   2,   0,   0,   0,   0,
+/* AB */ loadr     ,RADI,   2,ADDR,   4,   0,   0,   0,   0,
+/* AC */ andl2     ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* AD */ mtpr      ,RADI,   4,RADI,   4,   0,   0,   0,   0,
+/* AE */ ffs       ,RADI,   4, WAD,   4,   0,   0,   0,   0,
+/* AF */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B0 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B1 */ blequ     , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* B2 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B3 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B6 */ negf      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B7 */ negd      ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* B8 */ andb3     ,RADI,   1,RADI,   1,NWAD,   1,   0,   0,
+/* B9 */ movzbw    ,RADI,   1, WAD,   2,   0,   0,   0,   0,
+/* BA */ andw3     ,RADI,   2,RADI,   2,NWAD,   2,   0,   0,
+/* BB */ storer    ,RADI,   2,W|ADDR, 4,   0,   0,   0,   0,
+/* BC */ andl3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* BD */ mfpr      ,RADI,   4, WAD,   4,   0,   0,   0,   0,
+/* BE */ ffc       ,RADI,   4, WAD,   4,   0,   0,   0,   0,
+/* BF */ calls     ,RADI,   1,ADDR,   1,   0,   0,   0,   0,
+/* C0 */ prober    ,RADI,   1,ADDR,   1,RADI,   4,   0,   0,
+/* C1 */ bvc       , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* C2 */ movs3     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* C3 */ movzwl    ,RADI,   2, WAD,   4,   0,   0,   0,   0,
+/* C4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* C5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* C6 */ addf      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* C7 */ addd      ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* C8 */ xorb2     ,RADI,   1,NMAD,   1,   0,   0,   0,   0,
+/* C9 */ movob     ,RADI,   1,NWAD,   1,   0,   0,   0,   0,
+/* CA */ xorw2     ,RADI,   2,NMAD,   2,   0,   0,   0,   0,
+/* CB */ movow     ,RADI,   2,NWAD,   2,   0,   0,   0,   0,
+/* CC */ xorl2     ,RADI,   4, MAD,   4,   0,   0,   0,   0,
+/* CD */ movpsl    , WAD,   4,   0,   0,   0,   0,   0,   0,
+/* CE */ btcs      ,RADI,   1,   0,   0,   0,   0,   0,   0,
+/* CF */ kcall     ,RADI,   2,   0,   0,   0,   0,   0,   0,
+/* D0 */ probew    ,RADI,   1,ADDR,   1,RADI,   4,   0,   0,
+/* D1 */ bvs       , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* D2 */ cmps3     ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* D3 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* D4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* D5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* D6 */ subf      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* D7 */ subd      ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* D8 */ xorb3     ,RADI,   1,RADI,   1,NWAD,   1,   0,   0,
+/* D9 */ pushb     ,RADI,   1,   0,   0,   0,   0,   0,   0,
+/* DA */ xorw3     ,RADI,   2,RADI,   2,NWAD,   2,   0,   0,
+/* DB */ pushw     ,RADI,   2,   0,   0,   0,   0,   0,   0,
+/* DC */ xorl3     ,RADI,   4,RADI,   4, WAD,   4,   0,   0,
+/* DD */ pushl     ,RADI,   4,   0,   0,   0,   0,   0,   0,
+/* DE */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* DF */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* E0 */ insque    ,ADDR,   4,ADDR,   4,   0,   0,   0,   0,
+/* E1 */ bcs       , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* E2 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* E3 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* E4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* E5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* E6 */ mulf      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* E7 */ muld      ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* E8 */ mnegb     ,RADI,   1, WAD,   1,   0,   0,   0,   0,
+/* E9 */ movab     ,ADDR,   1, WAD,   4,   0,   0,   0,   0,
+/* EA */ mnegw     ,RADI,   2, WAD,   2,   0,   0,   0,   0,
+/* EB */ movaw     ,ADDR,   2, WAD,   4,   0,   0,   0,   0,
+/* EC */ mnegl     ,RADI,   4, WAD,   4,   0,   0,   0,   0,
+/* ED */ moval     ,ADDR,   4, WAD,   4,   0,   0,   0,   0,
+/* EE */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* EF */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F0 */ remque    ,ADDR,   4,   0,   0,   0,   0,   0,   0,
+/* F1 */ bcc       , Brd,   1,   0,   0,   0,   0,   0,   0,
+/* F2 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F3 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F4 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F5 */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F6 */ divf      ,RADF,   4,   0,   0,   0,   0,   0,   0,
+/* F7 */ divd      ,RADF,   8,   0,   0,   0,   0,   0,   0,
+/* F8 */ movblk    ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* F9 */ pushab    ,ADDR,   1,   0,   0,   0,   0,   0,   0,
+/* FA */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0,
+/* FB */ pushaw    ,ADDR,   2,   0,   0,   0,   0,   0,   0,
+/* FC */ casel     ,RADI,   4,RADI,   4,RADI,   4,   0,   0,
+/* FD */ pushal    ,ADDR,   4,   0,   0,   0,   0,   0,   0,
+/* FE */ callf    ,Imm|Lit, 1,  PR,   1,   0,   0,   0,   0,
+/* FF */ illegal   ,   0,   0,   0,   0,   0,   0,   0,   0
+};