SCCS-vsn: sys/vax/vax/cons.h 4.3
SCCS-vsn: sys/vax/vax/flp.h 4.2
SCCS-vsn: sys/vax/mba/mbareg.h 4.2
SCCS-vsn: sys/vax/mba/mbavar.h 4.2
SCCS-vsn: sys/vax/include/mtpr.h 4.2
SCCS-vsn: sys/sys/param.h 4.2
SCCS-vsn: sys/sys/tty.h 4.2
SCCS-vsn: sys/vax/uba/ubareg.h 4.2
SCCS-vsn: sys/vax/uba/ubavar.h 4.2
+/* param.h 4.1 11/9/80 */
* NB: NBUF must be less than MAXNBUF in locore.s.
*/
* NB: NBUF must be less than MAXNBUF in locore.s.
*/
+#ifdef notdef
+#define NBUF 64 /* size of buffer cache */
+#define NINODE 200 /* number of in core inodes */
+#define NFILE 175 /* number of in core file structures */
+#define NMOUNT 7 /* number of mountable file systems */
+#define MSWAPX 7 /* pseudo mount table index for swapdev */
+#define NPROC 125 /* max number of processes */
+#define NTEXT 40 /* max number of pure texts */
+#define NCLIST 250 /* max total clist size */
+#endif
#define NBUF 128 /* size of buffer cache */
#define NINODE 400 /* number of in core inodes */
#define NFILE 350 /* number of in core file structures */
#define NMOUNT 15 /* number of mountable file systems */
#define MSWAPX 15 /* pseudo mount table index for swapdev */
#define NBUF 128 /* size of buffer cache */
#define NINODE 400 /* number of in core inodes */
#define NFILE 350 /* number of in core file structures */
#define NMOUNT 15 /* number of mountable file systems */
#define MSWAPX 15 /* pseudo mount table index for swapdev */
+#define NPROC 250 /* max number of processes */
+#define NTEXT 60 /* max number of pure texts */
+#define NCLIST 500 /* max total clist size */
#define MAXUPRC 25 /* max processes per user */
#define SSIZE 4 /* initial stack size (*512 bytes) */
#define SINCR 4 /* increment of stack (*512 bytes) */
#define MAXUPRC 25 /* max processes per user */
#define SSIZE 4 /* initial stack size (*512 bytes) */
#define SINCR 4 /* increment of stack (*512 bytes) */
#define CANBSIZ 256 /* max size of typewriter line */
#define SMAPSIZ (4*NPROC) /* size of swap allocation area */
#define NCALL 40 /* max simultaneous time callouts */
#define CANBSIZ 256 /* max size of typewriter line */
#define SMAPSIZ (4*NPROC) /* size of swap allocation area */
#define NCALL 40 /* max simultaneous time callouts */
-#define NPROC 250 /* max number of processes */
-#define NTEXT 60 /* max number of pure texts */
-#define NCLIST 500 /* max total clist size */
#define HZ 60 /* Ticks/second of the clock */
#define TIMEZONE (8*60) /* Minutes westward from Greenwich */
#define DSTFLAG 1 /* Daylight Saving Time applies in this locality */
#define HZ 60 /* Ticks/second of the clock */
#define TIMEZONE (8*60) /* Minutes westward from Greenwich */
#define DSTFLAG 1 /* Daylight Saving Time applies in this locality */
+#ifdef KERNEL
+#include "../h/ioctl.h"
+#else
+#endif
+#include <sgtty.h>
/*
* A clist structure is the head
/*
* A clist structure is the head
struct tchars t_chr;
struct clist t_ctlq;
} t_un;
struct tchars t_chr;
struct clist t_ctlq;
} t_un;
+ struct buf *t_ibp, *t_obp;
};
#define tun tp->t_un.t_chr
};
#define tun tp->t_un.t_chr
#define HUPCLS 01000 /* hang up upon last close */
#define TBLOCK 02000 /* tandem queue blocked */
#define SPEEDS 04000 /* t_ispeed and t_ospeed used by driver */
#define HUPCLS 01000 /* hang up upon last close */
#define TBLOCK 02000 /* tandem queue blocked */
#define SPEEDS 04000 /* t_ispeed and t_ospeed used by driver */
-#define PROTO1 010000 /* reserved for line discipline */
#define EXTPROC 020000 /* external processor (kmc) */
#define FSLEEP 040000 /* Wakeup on input framing */
#define EXTPROC 020000 /* external processor (kmc) */
#define FSLEEP 040000 /* Wakeup on input framing */
-#define CNTLQ 0100000 /* interpret t_un as clist */
+#define BEXT 0100000 /* use (external) system buffers */
/* define partab character types */
#define ORDINARY 0
/* define partab character types */
#define ORDINARY 0
/*
* VAX processor register numbers
/*
* VAX processor register numbers
#define PMR 61 /* performance monitor enable */
#define SID 62 /* system identification */
#define PMR 61 /* performance monitor enable */
#define SID 62 /* system identification */
-/*
- * VAX-11/780 specific registers
- */
#define ACCS 40 /* accelerator control and status */
#define ACCR 41 /* accelerator maintenance */
#define WCSA 44 /* WCS address */
#define ACCS 40 /* accelerator control and status */
#define ACCR 41 /* accelerator maintenance */
#define WCSA 44 /* WCS address */
#define SBITA 53 /* SBI timeout address */
#define SBIQC 54 /* SBI quadword clear */
#define MBRK 60 /* micro-program breakpoint */
#define SBITA 53 /* SBI timeout address */
#define SBIQC 54 /* SBI quadword clear */
#define MBRK 60 /* micro-program breakpoint */
+#endif
+
+#if VAX==750
+#define CSRS 0x1c /* console storage receive status register */
+#define CSRD 0x1d /* console storage receive data register */
+#define CSTS 0x1e /* console storage transmit status register */
+#define CSTD 0x1f /* console storage transmit data register */
+#define TBDR 0x24 /* translation buffer disable register */
+#define CADR 0x25 /* cache disable register */
+#define MCESR 0x26 /* machine check error summary register */
+#define CAER 0x27 /* cache error */
+#define IUR 0x37 /* init unibus register */
+#define TB 0x3b /* translation buffer */
+#endif
/*
* VAX Massbus adapter registers
*/
/*
* VAX Massbus adapter registers
*/
struct mba_info mbainfo[];
int mbaact;
#endif
struct mba_info mbainfo[];
int mbaact;
#endif
/*
* VAX Massbus adapter registers
*/
/*
* VAX Massbus adapter registers
*/
struct mba_info mbainfo[];
int mbaact;
#endif
struct mba_info mbainfo[];
int mbaact;
#endif
#define UBA0 0x80060000 /* sys virt i/o for UBA 0 */
#define UBA0_DEV (UBA0+0x2000-0160000) /* sys virt of device regs */
#define UBA0 0x80060000 /* sys virt i/o for UBA 0 */
#define UBA0_DEV (UBA0+0x2000-0160000) /* sys virt of device regs */
#define UNIBASE 0760000 /* UNIBUS phys base of i/o reg's */
#define UNIBASE 0760000 /* UNIBUS phys base of i/o reg's */
/* UBA Configuration Register, CNFGR */
#define PARFLT 0x80000000 /* SBI Parity Fault */
#define WSQFLT 0x40000000 /* SBI Write Sequence Fault */
/* UBA Configuration Register, CNFGR */
#define PARFLT 0x80000000 /* SBI Parity Fault */
#define WSQFLT 0x40000000 /* SBI Write Sequence Fault */
/* BR Receive Vector register, BRRVR */
#define AIRI 0x80000000 /* Adapter Interrupt Request */
#define DIV 0xffff /* Device Interrupt Vector Field */
/* BR Receive Vector register, BRRVR */
#define AIRI 0x80000000 /* Adapter Interrupt Request */
#define DIV 0xffff /* Device Interrupt Vector Field */
/* Data Path Register, DPR */
#define BNE 0x80000000 /* Buffer Not Empty - Purge */
/* Data Path Register, DPR */
#define BNE 0x80000000 /* Buffer Not Empty - Purge */
struct map ubamap[UAMSIZ];
char bdpwant; /* someone is waiting for buffered data path */
struct map ubamap[UAMSIZ];
char bdpwant; /* someone is waiting for buffered data path */
+#if VAX==780
+#define NUBABDP 15
+#else
+#define NUBABDP 3
+#endif
+
+struct map bdpmap[NUBABDP];
char umrwant; /* ... for unibus map registers */
#endif
char umrwant; /* ... for unibus map registers */
#endif
#define UBA0 0x80060000 /* sys virt i/o for UBA 0 */
#define UBA0_DEV (UBA0+0x2000-0160000) /* sys virt of device regs */
#define UBA0 0x80060000 /* sys virt i/o for UBA 0 */
#define UBA0_DEV (UBA0+0x2000-0160000) /* sys virt of device regs */
#define UNIBASE 0760000 /* UNIBUS phys base of i/o reg's */
#define UNIBASE 0760000 /* UNIBUS phys base of i/o reg's */
/* UBA Configuration Register, CNFGR */
#define PARFLT 0x80000000 /* SBI Parity Fault */
#define WSQFLT 0x40000000 /* SBI Write Sequence Fault */
/* UBA Configuration Register, CNFGR */
#define PARFLT 0x80000000 /* SBI Parity Fault */
#define WSQFLT 0x40000000 /* SBI Write Sequence Fault */
/* BR Receive Vector register, BRRVR */
#define AIRI 0x80000000 /* Adapter Interrupt Request */
#define DIV 0xffff /* Device Interrupt Vector Field */
/* BR Receive Vector register, BRRVR */
#define AIRI 0x80000000 /* Adapter Interrupt Request */
#define DIV 0xffff /* Device Interrupt Vector Field */
/* Data Path Register, DPR */
#define BNE 0x80000000 /* Buffer Not Empty - Purge */
/* Data Path Register, DPR */
#define BNE 0x80000000 /* Buffer Not Empty - Purge */
struct map ubamap[UAMSIZ];
char bdpwant; /* someone is waiting for buffered data path */
struct map ubamap[UAMSIZ];
char bdpwant; /* someone is waiting for buffered data path */
+#if VAX==780
+#define NUBABDP 15
+#else
+#define NUBABDP 3
+#endif
+
+struct map bdpmap[NUBABDP];
char umrwant; /* ... for unibus map registers */
#endif
char umrwant; /* ... for unibus map registers */
#endif
/*
* VAX console interface registers
/*
* VAX console interface registers
#define TXCS_RDY 0x80 /* transmitter ready for next char */
#define TXDB_DATA 0xff /* transmitter byte */
#define TXDB_ID 0xf00 /* channel id */
#define TXCS_RDY 0x80 /* transmitter ready for next char */
#define TXDB_DATA 0xff /* transmitter byte */
#define TXDB_ID 0xf00 /* channel id */
#define TXDB_WSI 0xf02 /* set warm start inhibit */
#define TXDB_CWSI 0xf03 /* clear warm start inhibit */
#define TXDB_BOOT 0xf04 /* enable boot */
#define TXDB_WSI 0xf02 /* set warm start inhibit */
#define TXDB_CWSI 0xf03 /* clear warm start inhibit */
#define TXDB_BOOT 0xf04 /* enable boot */
+#endif
+#if VAX==750
+#define TXDB_BOOT 0xf02 /* reboot */
+#define TXDB_CCSF 0xf04 /* clear cold-start flag */
+#endif
/*
* Console floppy command/status and sectoring information.
*/
/*
* Console floppy command/status and sectoring information.
*/
*/
#define FL_OPEN 1
#define FL_BUSY 2
*/
#define FL_OPEN 1
#define FL_BUSY 2
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