// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: FcNiuQual.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
// For the avoidance of doubt, and except that if any non-GPL license
// choice is available it will apply instead, Sun elects to use only
// the General Public License version 2 (GPLv2) at this time for any
// software where a choice of GPL license versions is made
// available with the language indicating that GPLv2 or any later version
// may be used, or where a choice of which version of the GPL is applied is
// otherwise unspecified.
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
// CA 95054 USA or visit www.sun.com if you need additional information or
// ========== Copyright Header End ============================================
<Fc_Niu_Qual name=Fc_Niu_Qual>
// ****************************************************************************
// ****************************************************************************
//<FcNiuPio_Qual name=FcNiuPio_Qual>
FcNiuPioWrRd basic_niu_pio_mask.s -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1
// ****************************************************************************
// ****************************************************************************
// 10G -> MAC0 -> NIU Tx.
// ****************************************************************************
//<FcNiu10GMac0Tx_Qual name=FcNiu10GMac0Tx_Qual>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
<runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
FcNiu10GMac0Tx FcNiuBasicTx.s
<runargs -midas_args=-DNIU_TX_DMA_NUM=15 -midas_args=-DNIU_TX_DMA_ACT_LIST=0x8000 >
<runargs -midas_args=-DNIU_TX_PKT_CNT=0x19 -midas_args=-Dloop_count=20 -midas_args=-DJUMBO_FRAME_EN >
<runargs -vcs_run_args=+TX_GATHER -vcs_run_args=+TX_PKT_LEN=200 -midas_args=-Dloop_count=100 -midas_args=-DJUMBO_FRAME_EN >
FcNiuTx_DMA15_PktCnt25_PktLen_Gather FcNiuBasicTx.s
<runargs -midas_args=-DXLATE_ON -vcs_run_args=+USE_RANDOM_ADDRESS >
FcNiuTx_DMA15_PktCnt25_PktLen_Gather_Xlate FcNiuBasicTx.s
// ****************************************************************************
// ****************************************************************************
// 10G -> MAC0 -> NIU Rx.
// ****************************************************************************
//<FcNiu10GMac0Rx_Qual name=FcNiu10GMac0Rx_Qual>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
<runargs -vcs_run_args=+no_verilog_finish >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
FcNiu10GMac0Rx FcNiuBasicRx_sweep1.s
<runargs -midas_args=-DRXDMA_CHNL=0x1 >
FcNiuRx_DMA1 FcNiuBasicRx_sweep1.s
<runargs -midas_args=-DXLATE_ON >
FcNiuRx_DMA1_Xlate FcNiuBasicRx_sweep1.s
// ****************************************************************************
// ****************************************************************************
// 10G -> MAC1 -> NIU Tx.
// ****************************************************************************
//<FcNiu10GMac1Tx_Qual name=FcNiu10GMac1Tx_Qual>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=1 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
<runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
<runargs -midas_args=-DMAC_ID=1 >
FcNiu10GMac1Tx FcNiuBasicTx.s
<runargs -midas_args=-DNIU_TX_DMA_NUM=15 -midas_args=-DNIU_TX_DMA_ACT_LIST=0x8000 >
<runargs -midas_args=-DNIU_TX_PKT_CNT=0x19 >
<runargs -vcs_run_args=+TX_GATHER -vcs_run_args=+TX_PKT_LEN=200 -midas_args=-Dloop_count=100 -midas_args=-DJUMBO_FRAME_EN >
FcNiuTx_McPort1_DMA15_PktCnt25_PktLen_Gather FcNiuBasicTx.s
// ****************************************************************************
// ****************************************************************************
// 10G -> MAC1 -> NIU Rx.
// ****************************************************************************
//<FcNiu10GMac1Rx_Qual name=FcNiu10GMac1Rx_Qual>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=1 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
<runargs -midas_args=-DMAC_ID=1 >
<runargs -vcs_run_args=+no_verilog_finish >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
FcNiu10GMac1Rx FcNiuBasicRx_sweep1.s
// ****************************************************************************
// ****************************************************************************
// NIU Tx + Rx (Multi-threaded).
// ****************************************************************************
//<FcNiuTxRx_Qual name=FcNiuTxRx_Qual>
<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=3 >
<runargs -vcs_run_args=+MAC_SPEED1=10000 >
<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
<runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
<runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
<runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
<runargs -midas_args=-DMAC_ID=0 >
<runargs -vcs_run_args=+no_verilog_finish >
<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
FcNiuBasicTxRx FcNiuBasicTxRx.s
// ****************************************************************************
projects / OpenSPARC-T2-DV / blob