// ========== Copyright Header Begin ==========================================
// OpenSPARC T2 Processor File: baseAsmToVeraIntf.vrh
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
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// GNU General Public License for more details.
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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// choice is available it will apply instead, Sun elects to use only
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// ========== Copyright Header End ============================================
#ifndef INC__TMP_BASEASMTOVERAINTF_VRH
#define INC__TMP_BASEASMTOVERAINTF_VRH
extern virtual class BaseAsmToVeraIntf {
reg [7:0] ccxPortMask = 0,
reg [7:0] ccxPortMask = 0,
//for counting traps taken in random
task L2ErrTrapCount(reg [8:0] count=0);
//random Error Injection in CCM: L2 Data Array
task L2DAErrInjection(integer injectErr=0);
//random Error Injection in CCM: L2 TAG Array
task L2TAErrInjection(integer errorinject=0);
task siuDmaRd(reg [63:0] addr=0,
task siuDmaWri(reg [63:0] addr=0,
task siuDmaWr8(reg [63:0] addr=0,
task jtagRdWrL2(reg [63:0] paAddr=0,
reg [63:0] jtagDoneAddrMem=0,
task IosErrInj (string errtype, bit [15:0] ctag, bit [39:0] pa);
task IosRandErrInj (string errtype, integer num_errs, integer weight);
task pktGenConfig(integer mac_port, integer frame_type, integer frame_class, integer data_length,
(integer tx_multi_port = 0, integer data_length_p1 = -1));
task NIU_SetTxRingKick (integer mac_port, integer dma_no,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_AddTxChannels (integer mac_port, integer dma_no,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_SetTxMaxBurst (integer mac_port, integer dma_no, integer SetTxMaxBurst_Data,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_TxDMAActivate (integer mac_port, integer dma_activelist,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_InitTxDma (integer mac_port, integer dma_no, bit Xlate,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_EXIT_chk (integer mac_port);
task TxPktGen (integer mac_port, integer dmaport, integer numofpacket,
(integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0));
task NIU_InitRxDma (integer RxDmaChnlNo,
bit [39:0] RxRingStartAddr,
(bit [15:0] rx_multi_dma = 16'h0));
task NIU_RxPktConf (integer RxPktCnt, (integer iport = 0));
task NIU_RxGenPkt (integer mac_port,
(integer rx_multi_PORT=0, bit [15:0] rx_multi_DMA= 16'h0));
task errCpxPkt(reg [2:0] tid,
reg [63:0] addr = 64'hffffffffffffffff,
task IC_hard_err_inj(reg [3:0] err_type,
task DC_hard_err_inj(reg [3:0] err_type,
task DTLB_err_enable(bit [2:0] err_type=~0,
task ITLB_err_enable(bit [2:0] err_type=~0,
task DC_err_enable(bit [3:0] err_type=~0,
task STB_err_enable(bit [4:0] err_type=~0,
task L2C_err_enable(bit [5:0] err_type=~0,
task IRF_err_enable(bit [2:0] err_type=~0,
task FRF_err_enable(bit [2:0] err_type=~0,
task MRA_err_enable(bit [1:0] err_type=~0,
task SCA_err_enable(integer err_freq=-1,
task TSA_err_enable(bit [1:0] err_type=~0,
task TCC_err_enable(bit [1:0] err_type=~0,
task IC_err_enable(bit [3:0] err_type=~0,
task registerSlam(string registerName,
task marker(string what, reg [5:0] fromTid, reg [63:0] pc);
task reset_now(string what);
task set_StartPEUTest ();
task EnablePCIeEgCmd (string cmdType,
task EnablePCIeIgCmd (string cmdType,
task watchDebugReg(integer which, integer wait=0,
reg verbose=0, reg [1:0] checkValue);