<soma original.input.version="0.001">
======================================================================
Copyright 1999-2003 by Denali Software, Inc. All rights reserved.
======================================================================
This SOMA file describes a memory model, using Denali Software's
proprietary SOMA language. By using this SOMA file, you agree to the
following terms. If you do not agree to these terms, you may not use
Subject to the restrictions set forth below, Denali Software grants
you a non-exclusive, non-transferable license only to use this SOMA
file to simulate the memory described in it using tools supplied by
(1) Use this SOMA file to create software programs or tools that use
SOMA files as either input or output.
(2) Modify this SOMA file or the SOMA language in any manner.
(3) Use this SOMA file to create other languages for describing
(4) Distribute this SOMA file to others.
This SOMA file is based on information received by Denali Software
from third parties. DENALI SOFTWARE PROVIDES THIS SOMA FILE "AS IS"
AND EXPRESSLY DISCLAIMS ALL REPRESENTATIONS, WARRANTIES AND
CONDITIONS, INCLUDING BUT NOT LIMITED TO WARRANTIES AND CONDITIONS OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND
NONINFRINGEMENT. DENALI SOFTWARE'S AGGREGATE LIABILITY ARISING FROM
YOUR USE OF THIS SOMA FILE IS LIMITED TO ONE U.S. DOLLAR.
If you have any questions or if you would like to inquire about
obtaining additional or different rights in SOMA files or the SOMA
language, please contact Denali Software, at www.denali.com or at
PureView version: 3.100 $DENALI: /home/scratch/guoqing/work/main/platform/SunOS/denali-->
<feature name="SpecVersion">
<feature name="linkWidths">
<feature name="numDownPort">
<feature name="BusNumber">
<feature name="portNumber">
<feature name="FuncNumber">
<feature name="configID">
<feature name="portRCRBid">
<feature name="VendorID">
<feature name="DeviceID">
<feature name="RevisionID">
<feature name="BaseClass">
<feature name="SubClass">
<feature name="InterfaceClass">
<feature name="InterruptNum">
<feature name="SubSysID">
<feature name="SubVendorID">
<feature name="Breg0Width">
<feature name="Breg0Size">
<feature name="Breg0RdMin">
<feature name="Breg0RdMax">
<feature name="Breg1Width">
<feature name="Breg1Size">
<feature name="Breg1RdMin">
<feature name="Breg1RdMax">
<feature name="Breg2Width">
<feature name="Breg2Size">
<feature name="Breg2RdMin">
<feature name="Breg2RdMax">
<feature name="Breg3Width">
<feature name="Breg3Size">
<feature name="Breg3RdMin">
<feature name="Breg3RdMax">
<feature name="Breg4Width">
<feature name="Breg4Size">
<feature name="Breg4RdMin">
<feature name="Breg4RdMax">
<feature name="Breg5Width">
<feature name="Breg5Size">
<feature name="Breg5RdMin">
<feature name="Breg5RdMax">
<feature name="BrPrimBus">
<feature name="BrSecBus">
<feature name="BrSubBus">
<feature name="brBreg0Width">
<feature name="brBreg0Size">
<feature name="brBreg0RdMin">
<feature name="brBreg0RdMax">
<feature name="brBreg1Width">
<feature name="brBreg1Size">
<feature name="brBreg1RdMin">
<feature name="brBreg1RdMax">
<feature name="PMSCdata">
<feature name="MSInumMsg">
<feature name="PCIEdevMaxPL">
<feature name="PCIEdevPF">
<feature name="PCIEdevTag">
<feature name="PCIEdevPowLimit">
<feature name="PCIEdcMaxPL">
<feature name="PCIEdcMaxRead">
<feature name="PCIElkPort">
<feature name="PCIElcRCB">
<feature name="PCIEslNum">
<feature name="PCIEslPowLimit">
<feature name="PCIEXvc1Evc">
<feature name="PCIEXvc1LEvc">
<feature name="PCIEXvc1Arb">
<feature name="PCIEXvcARsel">
<feature name="PCIEXvcARtab">
<feature name="PCIEXvcR0FCPH">
<feature name="PCIEXvcR0FCPD">
<feature name="PCIEXvcR0FCNPH">
<feature name="PCIEXvcR0FCNPD">
<feature name="PCIEXvcR0FCCPLH">
<feature name="PCIEXvcR0FCCPLD">
<feature name="PCIEXvcR0time">
<feature name="PCIEXvcR0map">
<feature name="PCIEXvcR0sel">
<feature name="PCIEXvcR0tab">
<feature name="PCIEXvcR1FCPH">
<feature name="PCIEXvcR1FCPD">
<feature name="PCIEXvcR1FCNPH">
<feature name="PCIEXvcR1FCNPD">
<feature name="PCIEXvcR1FCCPLH">
<feature name="PCIEXvcR1FCCPLD">
<feature name="PCIEXvcR1time">
<feature name="PCIEXvcR1map">
<feature name="PCIEXvcR1sel">
<feature name="PCIEXvcR1vcID">
<feature name="PCIEXvcR1tab">
<feature name="PCIEXds1">
<feature name="PCIEXds2">
<feature name="PCIEXpbDVal">
<feature name="PCIEXpbDsubState">
<feature name="PCIEXpbDstate">
<feature name="CntPollingActiveTS1">
<feature name="CntPollingConfigTS1">
<feature name="invertPolarity">
<feature name="DLretBuf">
<feature name="TLplSize">
<feature name="TLtrSize">
<feature name="TLCplQSize">
<feature name="vendorIDS">
<feature name="PCIEXvcR2FCPH">
<feature name="PCIEXvcR2FCPD">
<feature name="PCIEXvcR2FCNPH">
<feature name="PCIEXvcR2FCNPD">
<feature name="PCIEXvcR2FCCPLH">
<feature name="PCIEXvcR2FCCPLD">
<feature name="PCIEXvcR2time">
<feature name="PCIEXvcR2map">
<feature name="PCIEXvcR2sel">
<feature name="PCIEXvcR2vcID">
<feature name="PCIEXvcR2tab">
<feature name="PCIEXvcR3FCPH">
<feature name="PCIEXvcR3FCPD">
<feature name="PCIEXvcR3FCNPH">
<feature name="PCIEXvcR3FCNPD">
<feature name="PCIEXvcR3FCCPLH">
<feature name="PCIEXvcR3FCCPLD">
<feature name="PCIEXvcR3time">
<feature name="PCIEXvcR3map">
<feature name="PCIEXvcR3sel">
<feature name="PCIEXvcR3vcID">
<feature name="PCIEXvcR3tab">
<feature name="PCIEXvcR4FCPH">
<feature name="PCIEXvcR4FCPD">
<feature name="PCIEXvcR4FCNPH">
<feature name="PCIEXvcR4FCNPD">
<feature name="PCIEXvcR4FCCPLH">
<feature name="PCIEXvcR4FCCPLD">
<feature name="PCIEXvcR4time">
<feature name="PCIEXvcR4map">
<feature name="PCIEXvcR4sel">
<feature name="PCIEXvcR4vcID">
<feature name="PCIEXvcR4tab">
<feature name="PCIEXvcR5FCPH">
<feature name="PCIEXvcR5FCPD">
<feature name="PCIEXvcR5FCNPH">
<feature name="PCIEXvcR5FCNPD">
<feature name="PCIEXvcR5FCCPLH">
<feature name="PCIEXvcR5FCCPLD">
<feature name="PCIEXvcR5time">
<feature name="PCIEXvcR5map">
<feature name="PCIEXvcR5sel">
<feature name="PCIEXvcR5vcID">
<feature name="PCIEXvcR5tab">
<feature name="PCIEXvcR6FCPH">
<feature name="PCIEXvcR6FCPD">
<feature name="PCIEXvcR6FCNPH">
<feature name="PCIEXvcR6FCNPD">
<feature name="PCIEXvcR6FCCPLH">
<feature name="PCIEXvcR6FCCPLD">
<feature name="PCIEXvcR6time">
<feature name="PCIEXvcR6map">
<feature name="PCIEXvcR6sel">
<feature name="PCIEXvcR6vcID">
<feature name="PCIEXvcR6tab">
<feature name="PCIEXvcR7FCPH">
<feature name="PCIEXvcR7FCPD">
<feature name="PCIEXvcR7FCNPH">
<feature name="PCIEXvcR7FCNPD">
<feature name="PCIEXvcR7FCCPLH">
<feature name="PCIEXvcR7FCCPLD">
<feature name="PCIEXvcR7time">
<feature name="PCIEXvcR7map">
<feature name="PCIEXvcR7sel">
<feature name="PCIEXvcR7vcID">
<feature name="PCIEXvcR7tab">
<feature name="laneRXstatus">
<feature name="txLaneSKEW">
<feature name="laneTxDisable">
<feature name="laneRxDisable">
<feature name="redundantInitFc1Dllps">
<feature name="redundantInitFc2Dllps">
<feature name="DevNumber">
<feature name="portCount">
<feature name="CacheLsize">
<feature name="InterruptLine">
<feature name="ROMsize0">
<feature name="BrSLTval">
<feature name="ROMsize1">
<feature name="capPMPtr">
<feature name="capMSIPtr">
<feature name="capAGPPtr">
<feature name="capVPDPtr">
<feature name="SLOTaddr">
<feature name="capSLOTPtr">
<feature name="SLOTsize">
<feature name="capHSPtr">
<feature name="PCIXaddr">
<feature name="capPCIXPtr">
<feature name="PCIXsize">
<feature name="capAMDPtr">
<feature name="capVSPtr">
<feature name="capDPPtr">
<feature name="capCRCPtr">
<feature name="capHPPtr">
<feature name="PCIEaddr">
<feature name="capPEPtr">
<feature name="PCIEAEaddr">
<feature name="capAEPtr">
<feature name="PCIEVCaddr">
<feature name="capVCPtr">
<feature name="PCIEXvcARloc">
<feature name="PCIEDSaddr">
<feature name="capDSPtr">
<feature name="PCIEPBaddr">
<feature name="capPBPtr">
<feature name="numSymbolErrors">
<feature name="skipIntervalMax">
<feature name="skipIntervalMin">
<feature name="beaconSymbol">
<feature name="DlTxQueueDelay">
<feature name="DlRxQueueDelay">
<feature name="capSLOTcnt">
<feature name="capSSIDaddr">
<feature name="capSSIDPtr">
<feature name="capSSIDvid">
<feature name="capSSIDsid">
<feature name="ModelMode">
<feature name="DeviceMode">
<feature name="MonitorMode">
<feature name="modelTLP">
<feature name="modelLLP">
<feature name="modelPLP">
<feature name="intLayer">
<feature name="intLsymbol">
<feature name="intLbyte">
<feature name="intLpipe">
<feature name="intLpacket">
<feature name="DeviceType">
<feature name="PCIEtoPCI">
<feature name="PCItoPCIE">
<feature name="Endpoint">
<feature name="genConfig0">
<feature name="genConfig1">
<feature name="upstream">
<feature name="ConfigSpace">
<feature name="CommonConfig">
<feature name="ClassCode">
<feature name="MEMspace">
<feature name="EnBusMaster">
<feature name="EnParityError">
<feature name="baseReg0">
<feature name="Breg0Pref">
<feature name="baseReg1">
<feature name="Breg1Pref">
<feature name="baseReg2">
<feature name="Breg2Pref">
<feature name="baseReg3">
<feature name="Breg3Pref">
<feature name="baseReg4">
<feature name="Breg4Pref">
<feature name="baseReg5">
<feature name="Breg5Pref">
<feature name="brBaseReg0">
<feature name="brBreg0IO">
<feature name="brBreg0Pref">
<feature name="brBaseReg1">
<feature name="brBreg1IO">
<feature name="brBreg1Pref">
<feature name="BrIOrange">
<feature name="BrPreMemRange">
<feature name="BrPreMem32">
<feature name="BrPreMem64">
<feature name="BridgeCtrl">
<feature name="BrPerrRes">
<feature name="PMCd3cold">
<feature name="PMCd3hot">
<feature name="PCIEslot">
<feature name="PCIEdevL0">
<feature name="PCIEdevL00">
<feature name="PCIEdevL01">
<feature name="PCIEdevL02">
<feature name="PCIEdevL03">
<feature name="PCIEdevL04">
<feature name="PCIEdevL05">
<feature name="PCIEdevL06">
<feature name="PCIEdevL07">
<feature name="PCIEdevL1">
<feature name="PCIEdevL10">
<feature name="PCIEdevL11">
<feature name="PCIEdevL12">
<feature name="PCIEdevL13">
<feature name="PCIEdevL14">
<feature name="PCIEdevL15">
<feature name="PCIEdevL16">
<feature name="PCIEdevL17">
<feature name="PCIEdevAttB">
<feature name="PCIEdevAttI">
<feature name="PCIEdevPowI">
<feature name="PCIEdevPowScale">
<feature name="PCIEdevPowScale0">
<feature name="PCIEdevPowScale1">
<feature name="PCIEdevPowScale2">
<feature name="PCIEdevPowScale3">
<feature name="PCIEdcCorErr">
<feature name="PCIEdcNonFatalErr">
<feature name="PCIEdcFatalErr">
<feature name="PCIEdcUR">
<feature name="PCIEdcRelOrder">
<feature name="PCIEdcEtag">
<feature name="PCIEdcPF">
<feature name="PCIEdcAux">
<feature name="PCIEdcNoSnoop">
<feature name="PCIElkL0">
<feature name="PCIElkL00">
<feature name="PCIElkL01">
<feature name="PCIElkL02">
<feature name="PCIElkL03">
<feature name="PCIElkL04">
<feature name="PCIElkL05">
<feature name="PCIElkL06">
<feature name="PCIElkL1support">
<feature name="PCIElkL1">
<feature name="PCIElkL10">
<feature name="PCIElkL11">
<feature name="PCIElkL12">
<feature name="PCIElkL13">
<feature name="PCIElkL14">
<feature name="PCIElkL15">
<feature name="PCIElkL16">
<feature name="PCIElkL17">
<feature name="PCIElcL1">
<feature name="PCIElcLkDis">
<feature name="PCIElcExtSyn">
<feature name="PCIElsSlot">
<feature name="PCIEslAttB">
<feature name="PCIEslPow">
<feature name="PCIEslMRL">
<feature name="PCIEslAttI">
<feature name="PCIEslPowI">
<feature name="PCIEslHPS">
<feature name="PCIEslHPen">
<feature name="PCIEslPowScale">
<feature name="PCIEslPowScale0">
<feature name="PCIEslPowScale1">
<feature name="PCIEslPowScale2">
<feature name="PCIEslPowScale3">
<feature name="PCIEscAttB">
<feature name="PCIEscPowF">
<feature name="PCIEscMRL">
<feature name="PCIEscPres">
<feature name="PCIEscCom">
<feature name="PCIEscHPI">
<feature name="PCIErcCorErr">
<feature name="PCIErcNonFatalErr">
<feature name="PCIErcFatalErr">
<feature name="PCIErcPME">
<feature name="PCIEXaeUM">
<feature name="PCIEXaeUMtrain">
<feature name="PCIEXaeUMdll">
<feature name="PCIEXaeUMpoison">
<feature name="PCIEXaeUMfc">
<feature name="PCIEXaeUMcplTO">
<feature name="PCIEXaeUMcplAB">
<feature name="PCIEXaeUMun">
<feature name="PCIEXaeUMofl">
<feature name="PCIEXaeUMmal">
<feature name="PCIEXaeUMecrc">
<feature name="PCIEXaeUMus">
<feature name="PCIEXaeUV">
<feature name="PCIEXaeUVtrain">
<feature name="PCIEXaeUVdll">
<feature name="PCIEXaeUVpoison">
<feature name="PCIEXaeUVfc">
<feature name="PCIEXaeUVcplTO">
<feature name="PCIEXaeUVcplAB">
<feature name="PCIEXaeUVun">
<feature name="PCIEXaeUVofl">
<feature name="PCIEXaeUVmal">
<feature name="PCIEXaeUVecrc">
<feature name="PCIEXaeUVus">
<feature name="PCIEXaeCM">
<feature name="PCIEXaeCMrec">
<feature name="PCIEXaeCMtlp">
<feature name="PCIEXaeCMDLLP">
<feature name="PCIEXaeCMrepN">
<feature name="PCIEXaeCMrepT">
<feature name="PCIEXaeCT">
<feature name="PCIEXaeCTgenEn">
<feature name="PCIEXaeCTgenCap">
<feature name="PCIEXaeCTchkEn">
<feature name="PCIEXaeCTchkCap">
<feature name="PCIEXaeRC">
<feature name="PCIEXaeRCcor">
<feature name="PCIEXaeRCnonFatal">
<feature name="PCIEXaeRCfatal">
<feature name="PCIEXvc1">
<feature name="PCIEXvc2">
<feature name="PCIEXvc2arb1">
<feature name="PCIEXvc2arb2">
<feature name="PCIEXvc2arb4">
<feature name="PCIEXvc2arb8">
<feature name="PCIEXvcR0">
<feature name="PCIEXvcR0FC">
<feature name="PCIEXvcR0Ca">
<feature name="PCIEXvcR0Arb">
<feature name="PCIEXvcR0Arb0">
<feature name="PCIEXvcR0Arb1">
<feature name="PCIEXvcR0Arb2">
<feature name="PCIEXvcR0Arb3">
<feature name="PCIEXvcR0Arb4">
<feature name="PCIEXvcR0Arb5">
<feature name="PCIEXvcR0APS">
<feature name="PCIEXvcR0snoop">
<feature name="PCIEXvcR0CT">
<feature name="PCIEXvcR1">
<feature name="PCIEXvcR1FC">
<feature name="PCIEXvcR1Ca">
<feature name="PCIEXvcR1Arb">
<feature name="PCIEXvcR1Arb0">
<feature name="PCIEXvcR1Arb1">
<feature name="PCIEXvcR1Arb2">
<feature name="PCIEXvcR1Arb3">
<feature name="PCIEXvcR1Arb4">
<feature name="PCIEXvcR1Arb5">
<feature name="PCIEXvcR1APS">
<feature name="PCIEXvcR1snoop">
<feature name="PCIEXvcR1CT">
<feature name="PCIEXpbD">
<feature name="PCIEXpbDsca">
<feature name="PCIEXpbDsca0">
<feature name="PCIEXpbDsca1">
<feature name="PCIEXpbDsca2">
<feature name="PCIEXpbDsca3">
<feature name="PCIEXpbDtype">
<feature name="PCIEXpbDtype0">
<feature name="PCIEXpbDtype1">
<feature name="PCIEXpbDtype2">
<feature name="PCIEXpbDtype3">
<feature name="PCIEXpbDtype7">
<feature name="PCIEXpbDrail">
<feature name="PCIEXpbDrail0">
<feature name="PCIEXpbDrail1">
<feature name="PCIEXpbDrail2">
<feature name="PCIEXpbDrail7">
<feature name="PCIEXpbC">
<feature name="PCIEXpbCsys">
<feature name="supportLaneReversal">
<feature name="reverseLanes">
<feature name="elecIdleValue">
<feature name="elecIdleValue0">
<feature name="elecIdleValue1">
<feature name="elecIdleValueZ">
<feature name="usePosSKP">
<feature name="application">
<feature name="Sideband">
<feature name="PCIEXvcR2">
<feature name="PCIEXvcR2FC">
<feature name="PCIEXvcR2Ca">
<feature name="PCIEXvcR2Arb">
<feature name="PCIEXvcR2Arb0">
<feature name="PCIEXvcR2Arb1">
<feature name="PCIEXvcR2Arb2">
<feature name="PCIEXvcR2Arb3">
<feature name="PCIEXvcR2Arb4">
<feature name="PCIEXvcR2Arb5">
<feature name="PCIEXvcR2APS">
<feature name="PCIEXvcR2snoop">
<feature name="PCIEXvcR2CT">
<feature name="PCIEXvcR3">
<feature name="PCIEXvcR3FC">
<feature name="PCIEXvcR3Ca">
<feature name="PCIEXvcR3Arb">
<feature name="PCIEXvcR3Arb0">
<feature name="PCIEXvcR3Arb1">
<feature name="PCIEXvcR3Arb2">
<feature name="PCIEXvcR3Arb3">
<feature name="PCIEXvcR3Arb4">
<feature name="PCIEXvcR3Arb5">
<feature name="PCIEXvcR3APS">
<feature name="PCIEXvcR3snoop">
<feature name="PCIEXvcR3CT">
<feature name="PCIEXvcR4">
<feature name="PCIEXvcR4FC">
<feature name="PCIEXvcR4Ca">
<feature name="PCIEXvcR4Arb">
<feature name="PCIEXvcR4Arb0">
<feature name="PCIEXvcR4Arb1">
<feature name="PCIEXvcR4Arb2">
<feature name="PCIEXvcR4Arb3">
<feature name="PCIEXvcR4Arb4">
<feature name="PCIEXvcR4Arb5">
<feature name="PCIEXvcR4APS">
<feature name="PCIEXvcR4snoop">
<feature name="PCIEXvcR4CT">
<feature name="PCIEXvcR5">
<feature name="PCIEXvcR5FC">
<feature name="PCIEXvcR5Ca">
<feature name="PCIEXvcR5Arb">
<feature name="PCIEXvcR5Arb0">
<feature name="PCIEXvcR5Arb1">
<feature name="PCIEXvcR5Arb2">
<feature name="PCIEXvcR5Arb3">
<feature name="PCIEXvcR5Arb4">
<feature name="PCIEXvcR5Arb5">
<feature name="PCIEXvcR5APS">
<feature name="PCIEXvcR5snoop">
<feature name="PCIEXvcR5CT">
<feature name="PCIEXvcR6">
<feature name="PCIEXvcR6FC">
<feature name="PCIEXvcR6Ca">
<feature name="PCIEXvcR6Arb">
<feature name="PCIEXvcR6Arb0">
<feature name="PCIEXvcR6Arb1">
<feature name="PCIEXvcR6Arb2">
<feature name="PCIEXvcR6Arb3">
<feature name="PCIEXvcR6Arb4">
<feature name="PCIEXvcR6Arb5">
<feature name="PCIEXvcR6APS">
<feature name="PCIEXvcR6snoop">
<feature name="PCIEXvcR6CT">
<feature name="PCIEXvcR7">
<feature name="PCIEXvcR7FC">
<feature name="PCIEXvcR7Ca">
<feature name="PCIEXvcR7Arb">
<feature name="PCIEXvcR7Arb0">
<feature name="PCIEXvcR7Arb1">
<feature name="PCIEXvcR7Arb2">
<feature name="PCIEXvcR7Arb3">
<feature name="PCIEXvcR7Arb4">
<feature name="PCIEXvcR7Arb5">
<feature name="PCIEXvcR7APS">
<feature name="PCIEXvcR7snoop">
<feature name="PCIEXvcR7CT">
<feature name="pipeDevice">
<feature name="pipeMacro">
<feature name="pipe8bit">
<feature name="pipe16bit">
<feature name="ROMbase0">
<feature name="BrSecLat">
<feature name="BrSLTBurst2">
<feature name="BrSLThardW">
<feature name="BrSecSt66">
<feature name="BrSecStB2B">
<feature name="BrSecStDev">
<feature name="BrSecStDev0">
<feature name="BrSecStDev1">
<feature name="BrSecStDev2">
<feature name="ROMbase1">
<feature name="BrMasterAbort">
<feature name="BrFastB2B">
<feature name="BrSecDCTimer">
<feature name="BrTimerSerrEn">
<feature name="PMEsupport">
<feature name="PCIElcAspmDis">
<feature name="PCIEXae2UM">
<feature name="PCIEXae2UMta">
<feature name="PCIEXae2UMma">
<feature name="PCIEXae2UMrta">
<feature name="PCIEXae2UMrma">
<feature name="PCIEXae2UMue">
<feature name="PCIEXae2UMucMsg">
<feature name="PCIEXae2UMucData">
<feature name="PCIEXae2UMucAttr">
<feature name="PCIEXae2UMucAddr">
<feature name="PCIEXae2UMdelay">
<feature name="PCIEXae2UMperr">
<feature name="PCIEXae2UMserr">
<feature name="PCIEXae2UMint">
<feature name="PCIEXae2US">
<feature name="PCIEXae2USta">
<feature name="PCIEXae2USma">
<feature name="PCIEXae2USrta">
<feature name="PCIEXae2USrma">
<feature name="PCIEXae2USue">
<feature name="PCIEXae2USucMsg">
<feature name="PCIEXae2USucData">
<feature name="PCIEXae2USucAttr">
<feature name="PCIEXae2USucAddr">
<feature name="PCIEXae2USdelay">
<feature name="PCIEXae2USperr">
<feature name="PCIEXae2USserr">
<feature name="PCIEXae2USint">
<feature name="reverseLaneNumbers">
<feature name="skipInterval">
<feature name="mergeErrMsgs">
<feature name="disVDMsg0">
<feature name="disVDMsg1">
<feature name="disPoisonTX">
<feature name="capSLOT1st">
<username>CLK_TX</username>
<username>CLK_RX</username>
<username>TxData</username>
<username>TxDataK</username>
<username>RxData</username>
<username>RxDataK</username>
<username>PCLK</username>
<username>WAKE_</username>
<username>PERST_</username>
<username>TxDetectRx</username>
<username>TxElecIdle</username>
<pin name="TxCompliance">
<username>TxCompliance</username>
<username>RxPolarity</username>
<username>Reset_</username>
<username>PowerDown</username>
<username>RxValid</username>
<username>PhyStatus</username>
<username>RxElecIdle</username>
<username>RxStatus</username>
<feature name="PcieVersion">
<feature name="PcieSpecVersion">
<feature name="SpecVersion_1_0a2">
<feature name="SpecVersion_1_1">
<feature name="RelativeOrderOnlyInitDllps">
<feature name="fwdErrMsgEnSerr">
<feature name="EIisEIES">
<feature name="minK28_7L0sExit">
<feature name="maxK28_7L0sExit">
<feature name="autoChgSpd">
<feature name="upconfigure">
<feature name="discardReqFLR">
<feature name="discardCplFLR">
<feature name="sendCplFLR">
<feature name="brPciBus">
<feature name="brPciXBus">
<feature name="intLpinOrPacket">
<feature name="pipeDIW8G1">
<feature name="pipeDIW16G1">
<feature name="pipeDIW8G2">
<feature name="pipeDIW16G2">
<feature name="ImTxDeemph">
<feature name="ImTxMargin">
<feature name="ImTxSwing">
<feature name="phyLaneCount">
<feature name="refClkMultiplier">
<feature name="NFTSWithCommonClock">
<feature name="NFTSWithoutCommonClock">
<feature name="diffNFTSGen2">
<feature name="NFTSWithCommonClockGen2">
<feature name="NFTSWithoutCommonClockGen2">
<feature name="useMaxFtsTimeout">
<feature name="txBitSkewValues">
<feature name="unknownValue">
<feature name="unknownValue0">
<feature name="unknownValue1">
<feature name="unknownValueZ">
<feature name="unknownValueX">
<feature name="unknownTimingWindow">
<feature name="fifoRxSize">
<feature name="fifoTxSize">
<feature name="recoveryFinishesCurrentPkt">
<feature name="txSymbolSkewValues">
<feature name="capBeacon">
<feature name="beaconLanes">
<feature name="capLBmaster">
<feature name="laneLBSlaveOnly">
<feature name="capXLink">
<feature name="capFrameErr">
<feature name="capSymLossErr">
<feature name="capLnDeskewErr">
<feature name="capElasErr">
<feature name="dis8b10bCfg">
<feature name="dis8b10bDisabled">
<feature name="dis8b10bHotReset">
<feature name="inL0NoEIOS">
<feature name="ttxLoopbackDelay">
<feature name="ttxLoopbackUnder">
<feature name="ttxLoopbackOver">
<feature name="pollActiveLnCnt">
<feature name="eiesInterval">
<feature name="chkRsvDrate">
<feature name="enPollSpd">
<feature name="mfEcrcTlp">
<feature name="turnOffLane">
<feature name="minPLTlpBytes">
<feature name="maxPLTlpBytes">
<feature name="addlTS1Cfg">
<feature name="resetSkpTimerEItx">
<feature name="resetSkpTimerEIrx">
<feature name="sameSpeedPowerChg">
<feature name="multiLinkPerPort">
<feature name="noPipeP0s">
<feature name="noPipeP1">
<feature name="noPipeP2">
<feature name="pipeP2inL1">
<feature name="UImargin">
<feature name="ReEnterRecovery">
<feature name="assertDisScram">
<feature name="delayComplSymX1">
<feature name="suppLowSwing">
<feature name="deemphasis">
<feature name="PCIElc2SelDeem">
<feature name="PCIElc2SelDeemLB">
<feature name="PCIElc2SelDeemCompl">
<feature name="useDefaultTxL0sAdjustment">
<feature name="useDefaultRxL0sAdjustment">
<feature name="fcTimeout">
<feature name="fcTimeoutAnyDllp">
<feature name="TLpmeSize">
<feature name="TLCRSCnt">
<feature name="TLTxQDelay">
<feature name="oneErrPerRxTlp">
<feature name="accPoisonRX">
<feature name="accPoisonUR">
<feature name="noURPoison">
<feature name="retryNPReq">
<feature name="implRCMEM">
<feature name="implRCIO">
<feature name="pmL1aspmGap">
<feature name="pmL23Gap">
<feature name="pmAckGap">
<feature name="msgSlotPwr">
<feature name="txPLuseSelf">
<feature name="txPLuseMin">
<feature name="txPLuseMax">
<feature name="rxPLuseSelf">
<feature name="rxPLuseMin">
<feature name="rxPLuseMax">
<feature name="sameSrcOrd">
<feature name="bcUnlockMsg">
<feature name="disBEchk">
<feature name="dis4Kchk">
<feature name="disIOchk">
<feature name="disCFGchk">
<feature name="disINTXchk">
<feature name="disRCBchk">
<feature name="enMFTlpFC">
<feature name="disINTXRXchk">
<feature name="disFCMaxchk">
<feature name="autoMsiMask">
<feature name="CplMatchAttr">
<feature name="CplMatchTc">
<feature name="CplEndMemReq">
<feature name="splitMemTrans">
<feature name="iovMaxNumVF">
<feature name="ImInterruptLine">
<feature name="ImIOspace">
<feature name="ImMEMspace">
<feature name="ImDisINT">
<feature name="ImMwrInv">
<feature name="PMversion">
<feature name="PMEnoSoftRst">
<feature name="PMEd3cold">
<feature name="PMEd3hot">
<feature name="MSIPVMen">
<feature name="MSIXaddr">
<feature name="capMSIXPtr">
<feature name="MSIXtblOS">
<feature name="MSIXtblBIR">
<feature name="MSIXpbaOS">
<feature name="MSIXpbaBIR">
<feature name="PCIXversion">
<feature name="PCIX64bit">
<feature name="PCIX133Cap">
<feature name="PCIX266Cap">
<feature name="PCIX533Cap">
<feature name="PCIXtype0">
<feature name="PCIXbridge">
<feature name="PCIXmaxRd">
<feature name="PCIXmaxSplit">
<feature name="PCIXmaxCuRd">
<feature name="PCIXtype1">
<feature name="PCIXbrFreq">
<feature name="PCIXbrParity">
<feature name="PCIXbrFN">
<feature name="PCIXbrDN">
<feature name="PCIXbrBN">
<feature name="PCIXbrIdMsg">
<feature name="PCIXbrSplitCapUp">
<feature name="PCIXbrSplitCapDn">
<feature name="PCIEmsiIntxNum">
<feature name="PCIEmsixIntxNum">
<feature name="PCIEdevRole">
<feature name="PCIEdevFLR">
<feature name="PCIEdcImRelOrder">
<feature name="PCIEdcImEtag">
<feature name="PCIEdcImPF">
<feature name="PCIEdcImAux">
<feature name="PCIEdcImNoSnoop">
<feature name="PCIEdcImMaxPL">
<feature name="PCIEdcImMaxRead">
<feature name="PCIEdev2">
<feature name="PCIEdev2Range">
<feature name="PCIEdev2RangeA">
<feature name="PCIEdev2RangeB">
<feature name="PCIEdev2RangeAB">
<feature name="PCIEdev2RangeBC">
<feature name="PCIEdev2RangeABC">
<feature name="PCIEdev2RangeBCD">
<feature name="PCIEdev2RangeABCD">
<feature name="cplRngReq">
<feature name="cplRngReqNow">
<feature name="PCIEdev2CplDis">
<feature name="cplDisReq">
<feature name="cplDisReqNow">
<feature name="PCIEariSupp">
<feature name="PCIEiovSRemuEROM">
<feature name="PCIEdsOwnNP">
<feature name="PCIElkSpd2">
<feature name="PCIElkBandWidth">
<feature name="PCIElkL07">
<feature name="PCIElkClkPowMgmt">
<feature name="PCIElkDnErrRepCap">
<feature name="PCIElkDlActRepCap">
<feature name="PCIElcL0s">
<feature name="PCIElcClkPowMgmt">
<feature name="PCIElc2TgtSpdImpl">
<feature name="PCIElc2TgtSpd">
<feature name="PCIElc2EnCompImpl">
<feature name="PCIElc2HwAutoSpdDisImpl">
<feature name="PCIElc2SelDeImpl">
<feature name="PCIElc2TxMarginImpl">
<feature name="PCIElc2EnModCompImpl">
<feature name="PCIElc2CompSOSImpl">
<feature name="PCIElc2CompDeImpl">
<feature name="PCIEls2CurrDeImpl">
<feature name="PCIEslPowFaultDet">
<feature name="PCIEslLock">
<feature name="PCIEslCmdCplSupp">
<feature name="PCIEscAIC">
<feature name="PCIEscAICdef">
<feature name="PCIEscPIC">
<feature name="PCIEscPICdef">
<feature name="PCIEscDLE">
<feature name="PCIErcCRS">
<feature name="PCIErcap">
<feature name="PCIErcapCRS">
<feature name="PCIEXaeImpTr">
<feature name="PCIEXaeImpFC">
<feature name="PCIEXaeImpCA">
<feature name="PCIEXaeImpRcvrOvf">
<feature name="PCIEXaeImpEcrc">
<feature name="PCIEXaeImpRcvr">
<feature name="PCIEXaeImpSurpDown">
<feature name="PCIEXaeUMSurpDown">
<feature name="PCIEXaeUVSurpDown">
<feature name="PCIEXaeCMrepANF">
<feature name="PCIEXmfvc">
<feature name="PCIEXMFVCaddr">
<feature name="capMFVCPtr">
<feature name="PCIEXmfvc1">
<feature name="PCIEXmfvc1Evc">
<feature name="PCIEXmfvc1LEvc">
<feature name="PCIEXmfvc1Arb">
<feature name="PCIEXmfvc2">
<feature name="PCIEXmfvc2arb1">
<feature name="PCIEXmfvc2arb2">
<feature name="PCIEXmfvc2arb4">
<feature name="PCIEXmfvc2arb8">
<feature name="PCIEXmfvcARsel">
<feature name="PCIEXmfvcARloc">
<feature name="PCIEXmfvcARtab">
<feature name="PCIEXmfvcR0">
<feature name="PCIEXmfvcR0FC">
<feature name="PCIEXmfvcR0FCPHun">
<feature name="PCIEXmfvcR0FCPH">
<feature name="PCIEXmfvcR0FCPDun">
<feature name="PCIEXmfvcR0FCPD">
<feature name="PCIEXmfvcR0FCNPHun">
<feature name="PCIEXmfvcR0FCNPH">
<feature name="PCIEXmfvcR0FCNPDun">
<feature name="PCIEXmfvcR0FCNPD">
<feature name="PCIEXmfvcR0FCCPLHun">
<feature name="PCIEXmfvcR0FCCPLH">
<feature name="PCIEXmfvcR0FCCPLDun">
<feature name="PCIEXmfvcR0FCCPLD">
<feature name="PCIEXmfvcR0Ca">
<feature name="PCIEXmfvcR0Arb">
<feature name="PCIEXmfvcR0Arb0">
<feature name="PCIEXmfvcR0Arb1">
<feature name="PCIEXmfvcR0Arb2">
<feature name="PCIEXmfvcR0Arb3">
<feature name="PCIEXmfvcR0Arb4">
<feature name="PCIEXmfvcR0Arb5">
<feature name="PCIEXmfvcR0time">
<feature name="PCIEXmfvcR0offset">
<feature name="PCIEXmfvcR0CT">
<feature name="PCIEXmfvcR0map">
<feature name="PCIEXmfvcR0sel">
<feature name="PCIEXmfvcR0tab">
<feature name="PCIEXmfvcR1">
<feature name="PCIEXmfvcR1FC">
<feature name="PCIEXmfvcR1FCPHun">
<feature name="PCIEXmfvcR1FCPH">
<feature name="PCIEXmfvcR1FCPDun">
<feature name="PCIEXmfvcR1FCPD">
<feature name="PCIEXmfvcR1FCNPHun">
<feature name="PCIEXmfvcR1FCNPH">
<feature name="PCIEXmfvcR1FCNPDun">
<feature name="PCIEXmfvcR1FCNPD">
<feature name="PCIEXmfvcR1FCCPLHun">
<feature name="PCIEXmfvcR1FCCPLH">
<feature name="PCIEXmfvcR1FCCPLDun">
<feature name="PCIEXmfvcR1FCCPLD">
<feature name="PCIEXmfvcR1Ca">
<feature name="PCIEXmfvcR1Arb">
<feature name="PCIEXmfvcR1Arb0">
<feature name="PCIEXmfvcR1Arb1">
<feature name="PCIEXmfvcR1Arb2">
<feature name="PCIEXmfvcR1Arb3">
<feature name="PCIEXmfvcR1Arb4">
<feature name="PCIEXmfvcR1Arb5">
<feature name="PCIEXmfvcR1time">
<feature name="PCIEXmfvcR1offset">
<feature name="PCIEXmfvcR1CT">
<feature name="PCIEXmfvcR1map">
<feature name="PCIEXmfvcR1sel">
<feature name="PCIEXmfvcR1vcID">
<feature name="PCIEXmfvcR1tab">
<feature name="PCIEXmfvcR2">
<feature name="PCIEXmfvcR2FC">
<feature name="PCIEXmfvcR2FCPHun">
<feature name="PCIEXmfvcR2FCPH">
<feature name="PCIEXmfvcR2FCPDun">
<feature name="PCIEXmfvcR2FCPD">
<feature name="PCIEXmfvcR2FCNPHun">
<feature name="PCIEXmfvcR2FCNPH">
<feature name="PCIEXmfvcR2FCNPDun">
<feature name="PCIEXmfvcR2FCNPD">
<feature name="PCIEXmfvcR2FCCPLHun">
<feature name="PCIEXmfvcR2FCCPLH">
<feature name="PCIEXmfvcR2FCCPLDun">
<feature name="PCIEXmfvcR2FCCPLD">
<feature name="PCIEXmfvcR2Ca">
<feature name="PCIEXmfvcR2Arb">
<feature name="PCIEXmfvcR2Arb0">
<feature name="PCIEXmfvcR2Arb1">
<feature name="PCIEXmfvcR2Arb2">
<feature name="PCIEXmfvcR2Arb3">
<feature name="PCIEXmfvcR2Arb4">
<feature name="PCIEXmfvcR2Arb5">
<feature name="PCIEXmfvcR2time">
<feature name="PCIEXmfvcR2offset">
<feature name="PCIEXmfvcR2CT">
<feature name="PCIEXmfvcR2map">
<feature name="PCIEXmfvcR2sel">
<feature name="PCIEXmfvcR2vcID">
<feature name="PCIEXmfvcR2tab">
<feature name="PCIEXmfvcR3">
<feature name="PCIEXmfvcR3FC">
<feature name="PCIEXmfvcR3FCPHun">
<feature name="PCIEXmfvcR3FCPH">
<feature name="PCIEXmfvcR3FCPDun">
<feature name="PCIEXmfvcR3FCPD">
<feature name="PCIEXmfvcR3FCNPHun">
<feature name="PCIEXmfvcR3FCNPH">
<feature name="PCIEXmfvcR3FCNPDun">
<feature name="PCIEXmfvcR3FCNPD">
<feature name="PCIEXmfvcR3FCCPLHun">
<feature name="PCIEXmfvcR3FCCPLH">
<feature name="PCIEXmfvcR3FCCPLDun">
<feature name="PCIEXmfvcR3FCCPLD">
<feature name="PCIEXmfvcR3Ca">
<feature name="PCIEXmfvcR3Arb">
<feature name="PCIEXmfvcR3Arb0">
<feature name="PCIEXmfvcR3Arb1">
<feature name="PCIEXmfvcR3Arb2">
<feature name="PCIEXmfvcR3Arb3">
<feature name="PCIEXmfvcR3Arb4">
<feature name="PCIEXmfvcR3Arb5">
<feature name="PCIEXmfvcR3time">
<feature name="PCIEXmfvcR3offset">
<feature name="PCIEXmfvcR3CT">
<feature name="PCIEXmfvcR3map">
<feature name="PCIEXmfvcR3sel">
<feature name="PCIEXmfvcR3vcID">
<feature name="PCIEXmfvcR3tab">
<feature name="PCIEXmfvcR4">
<feature name="PCIEXmfvcR4FC">
<feature name="PCIEXmfvcR4FCPHun">
<feature name="PCIEXmfvcR4FCPH">
<feature name="PCIEXmfvcR4FCPDun">
<feature name="PCIEXmfvcR4FCPD">
<feature name="PCIEXmfvcR4FCNPHun">
<feature name="PCIEXmfvcR4FCNPH">
<feature name="PCIEXmfvcR4FCNPDun">
<feature name="PCIEXmfvcR4FCNPD">
<feature name="PCIEXmfvcR4FCCPLHun">
<feature name="PCIEXmfvcR4FCCPLH">
<feature name="PCIEXmfvcR4FCCPLDun">
<feature name="PCIEXmfvcR4FCCPLD">
<feature name="PCIEXmfvcR4Ca">
<feature name="PCIEXmfvcR4Arb">
<feature name="PCIEXmfvcR4Arb0">
<feature name="PCIEXmfvcR4Arb1">
<feature name="PCIEXmfvcR4Arb2">
<feature name="PCIEXmfvcR4Arb3">
<feature name="PCIEXmfvcR4Arb4">
<feature name="PCIEXmfvcR4Arb5">
<feature name="PCIEXmfvcR4time">
<feature name="PCIEXmfvcR4offset">
<feature name="PCIEXmfvcR4CT">
<feature name="PCIEXmfvcR4map">
<feature name="PCIEXmfvcR4sel">
<feature name="PCIEXmfvcR4vcID">
<feature name="PCIEXmfvcR4tab">
<feature name="PCIEXmfvcR5">
<feature name="PCIEXmfvcR5FC">
<feature name="PCIEXmfvcR5FCPHun">
<feature name="PCIEXmfvcR5FCPH">
<feature name="PCIEXmfvcR5FCPDun">
<feature name="PCIEXmfvcR5FCPD">
<feature name="PCIEXmfvcR5FCNPHun">
<feature name="PCIEXmfvcR5FCNPH">
<feature name="PCIEXmfvcR5FCNPDun">
<feature name="PCIEXmfvcR5FCNPD">
<feature name="PCIEXmfvcR5FCCPLHun">
<feature name="PCIEXmfvcR5FCCPLH">
<feature name="PCIEXmfvcR5FCCPLDun">
<feature name="PCIEXmfvcR5FCCPLD">
<feature name="PCIEXmfvcR5Ca">
<feature name="PCIEXmfvcR5Arb">
<feature name="PCIEXmfvcR5Arb0">
<feature name="PCIEXmfvcR5Arb1">
<feature name="PCIEXmfvcR5Arb2">
<feature name="PCIEXmfvcR5Arb3">
<feature name="PCIEXmfvcR5Arb4">
<feature name="PCIEXmfvcR5Arb5">
<feature name="PCIEXmfvcR5time">
<feature name="PCIEXmfvcR5offset">
<feature name="PCIEXmfvcR5CT">
<feature name="PCIEXmfvcR5map">
<feature name="PCIEXmfvcR5sel">
<feature name="PCIEXmfvcR5vcID">
<feature name="PCIEXmfvcR5tab">
<feature name="PCIEXmfvcR6">
<feature name="PCIEXmfvcR6FC">
<feature name="PCIEXmfvcR6FCPHun">
<feature name="PCIEXmfvcR6FCPH">
<feature name="PCIEXmfvcR6FCPDun">
<feature name="PCIEXmfvcR6FCPD">
<feature name="PCIEXmfvcR6FCNPHun">
<feature name="PCIEXmfvcR6FCNPH">
<feature name="PCIEXmfvcR6FCNPDun">
<feature name="PCIEXmfvcR6FCNPD">
<feature name="PCIEXmfvcR6FCCPLHun">
<feature name="PCIEXmfvcR6FCCPLH">
<feature name="PCIEXmfvcR6FCCPLDun">
<feature name="PCIEXmfvcR6FCCPLD">
<feature name="PCIEXmfvcR6Ca">
<feature name="PCIEXmfvcR6Arb">
<feature name="PCIEXmfvcR6Arb0">
<feature name="PCIEXmfvcR6Arb1">
<feature name="PCIEXmfvcR6Arb2">
<feature name="PCIEXmfvcR6Arb3">
<feature name="PCIEXmfvcR6Arb4">
<feature name="PCIEXmfvcR6Arb5">
<feature name="PCIEXmfvcR6time">
<feature name="PCIEXmfvcR6offset">
<feature name="PCIEXmfvcR6CT">
<feature name="PCIEXmfvcR6map">
<feature name="PCIEXmfvcR6sel">
<feature name="PCIEXmfvcR6vcID">
<feature name="PCIEXmfvcR6tab">
<feature name="PCIEXmfvcR7">
<feature name="PCIEXmfvcR7FC">
<feature name="PCIEXmfvcR7FCPHun">
<feature name="PCIEXmfvcR7FCPH">
<feature name="PCIEXmfvcR7FCPDun">
<feature name="PCIEXmfvcR7FCPD">
<feature name="PCIEXmfvcR7FCNPHun">
<feature name="PCIEXmfvcR7FCNPH">
<feature name="PCIEXmfvcR7FCNPDun">
<feature name="PCIEXmfvcR7FCNPD">
<feature name="PCIEXmfvcR7FCCPLHun">
<feature name="PCIEXmfvcR7FCCPLH">
<feature name="PCIEXmfvcR7FCCPLDun">
<feature name="PCIEXmfvcR7FCCPLD">
<feature name="PCIEXmfvcR7Ca">
<feature name="PCIEXmfvcR7Arb">
<feature name="PCIEXmfvcR7Arb0">
<feature name="PCIEXmfvcR7Arb1">
<feature name="PCIEXmfvcR7Arb2">
<feature name="PCIEXmfvcR7Arb3">
<feature name="PCIEXmfvcR7Arb4">
<feature name="PCIEXmfvcR7Arb5">
<feature name="PCIEXmfvcR7time">
<feature name="PCIEXmfvcR7offset">
<feature name="PCIEXmfvcR7CT">
<feature name="PCIEXmfvcR7map">
<feature name="PCIEXmfvcR7sel">
<feature name="PCIEXmfvcR7vcID">
<feature name="PCIEXmfvcR7tab">
<feature name="PCIEXrclk">
<feature name="PCIEXRCLKaddr">
<feature name="capRCLKPtr">
<feature name="PCIEXrclkType">
<feature name="PCIEXrclkTypeCfg">
<feature name="PCIEXrclkTypeMem">
<feature name="PCIEXrclkTypeLK">
<feature name="PCIEXrclkNumLK">
<feature name="PCIEXrclkCompID">
<feature name="PCIEXrclkPortNum">
<feature name="PCIEXrclkLK0">
<feature name="PCIEXrclkLK0Valid">
<feature name="PCIEXrclkLK0Type">
<feature name="PCIEXrclkLK0RCRB">
<feature name="PCIEXrclkLK0CompID">
<feature name="PCIEXrclkLK0PortNum">
<feature name="PCIEXrclkLK0AddrLow">
<feature name="PCIEXrclkLK0AddrHigh">
<feature name="PCIEXrclkLKOther">
<feature name="PCIEXrclc">
<feature name="PCIEXRCLCaddr">
<feature name="capRCLCPtr">
<feature name="PCIEXrclcWidth">
<feature name="PCIEXrclcAspm">
<feature name="PCIEXrclcL0s">
<feature name="PCIEXrclcL1">
<feature name="PCIEXrclcL0sExit">
<feature name="PCIEXrclcL0sExit0">
<feature name="PCIEXrclcL0sExit1">
<feature name="PCIEXrclcL0sExit2">
<feature name="PCIEXrclcL0sExit3">
<feature name="PCIEXrclcL0sExit4">
<feature name="PCIEXrclcL0sExit5">
<feature name="PCIEXrclcL0sExit6">
<feature name="PCIEXrclcL0sExit7">
<feature name="PCIEXrclcL1Exit">
<feature name="PCIEXrclcL1Exit0">
<feature name="PCIEXrclcL1Exit1">
<feature name="PCIEXrclcL1Exit2">
<feature name="PCIEXrclcL1Exit3">
<feature name="PCIEXrclcL1Exit4">
<feature name="PCIEXrclcL1Exit5">
<feature name="PCIEXrclcL1Exit6">
<feature name="PCIEXrclcL1Exit7">
<feature name="PCIEXrcec">
<feature name="PCIEXRCECaddr">
<feature name="capRCECPtr">
<feature name="PCIEXrcecMap">
<feature name="PCIEXRCRB">
<feature name="PCIEXRCRBaddr">
<feature name="capRCRBPtr">
<feature name="PCIEXvcR0FCPHun">
<feature name="PCIEXvcR0FCPDun">
<feature name="PCIEXvcR0FCNPHun">
<feature name="PCIEXvcR0FCNPDun">
<feature name="PCIEXvcR0FCCPLHun">
<feature name="PCIEXvcR0FCCPLDun">
<feature name="PCIEXvcR0offset">
<feature name="PCIEXvcR0pend">
<feature name="PCIEXvcR1FCPHun">
<feature name="PCIEXvcR1FCPDun">
<feature name="PCIEXvcR1FCNPHun">
<feature name="PCIEXvcR1FCNPDun">
<feature name="PCIEXvcR1FCCPLHun">
<feature name="PCIEXvcR1FCCPLDun">
<feature name="PCIEXvcR1offset">
<feature name="PCIEXvcR2FCPHun">
<feature name="PCIEXvcR2FCPDun">
<feature name="PCIEXvcR2FCNPHun">
<feature name="PCIEXvcR2FCNPDun">
<feature name="PCIEXvcR2FCCPLHun">
<feature name="PCIEXvcR2FCCPLDun">
<feature name="PCIEXvcR2offset">
<feature name="PCIEXvcR3FCPHun">
<feature name="PCIEXvcR3FCPDun">
<feature name="PCIEXvcR3FCNPHun">
<feature name="PCIEXvcR3FCNPDun">
<feature name="PCIEXvcR3FCCPLHun">
<feature name="PCIEXvcR3FCCPLDun">
<feature name="PCIEXvcR3offset">
<feature name="PCIEXvcR4FCPHun">
<feature name="PCIEXvcR4FCPDun">
<feature name="PCIEXvcR4FCNPHun">
<feature name="PCIEXvcR4FCNPDun">
<feature name="PCIEXvcR4FCCPLHun">
<feature name="PCIEXvcR4FCCPLDun">
<feature name="PCIEXvcR4offset">
<feature name="PCIEXvcR5FCPHun">
<feature name="PCIEXvcR5FCPDun">
<feature name="PCIEXvcR5FCNPHun">
<feature name="PCIEXvcR5FCNPDun">
<feature name="PCIEXvcR5FCCPLHun">
<feature name="PCIEXvcR5FCCPLDun">
<feature name="PCIEXvcR5offset">
<feature name="PCIEXvcR6FCPHun">
<feature name="PCIEXvcR6FCPDun">
<feature name="PCIEXvcR6FCNPHun">
<feature name="PCIEXvcR6FCNPDun">
<feature name="PCIEXvcR6FCCPLHun">
<feature name="PCIEXvcR6FCCPLDun">
<feature name="PCIEXvcR6offset">
<feature name="PCIEXvcR7FCPHun">
<feature name="PCIEXvcR7FCPDun">
<feature name="PCIEXvcR7FCNPHun">
<feature name="PCIEXvcR7FCNPDun">
<feature name="PCIEXvcR7FCCPLHun">
<feature name="PCIEXvcR7FCCPLDun">
<feature name="PCIEXvcR7offset">
<feature name="PCIEXpbDarr">
<feature name="PCIEXvsec">
<feature name="PCIEXvsecDef">
<feature name="AtsITagGlobal">
<feature name="AtsITagPerDevice">
<feature name="AtsNextPtr">
<feature name="AtsInvQDepth">
<feature name="PCIEACSaddr">
<feature name="capACSPtr">
<feature name="PCIEACSver">
<feature name="PCIEACSsrcValid">
<feature name="PCIEACStranBlock">
<feature name="PCIEACSp2pReqRedirect">
<feature name="PCIEACSp2pCplRedirect">
<feature name="PCIEACSupForward">
<feature name="PCIEACSp2pEctrl">
<feature name="PCIEACSdirTranP2p">
<feature name="PCIEACSEctrlSize">
<feature name="PCIEariCap">
<feature name="PCIEariAddr">
<feature name="PCIEariPtr">
<feature name="PCIEariVer">
<feature name="PCIEariMFVCcap">
<feature name="PCIEariACScap">
<feature name="PCIEariNextFunc">
<feature name="PCIEiovSRcap">
<feature name="PCIEiovSRaddr">
<feature name="PCIEiovSRptr">
<feature name="PCIEiovSRver">
<feature name="PCIEiovSRmigCap">
<feature name="PCIEiovSRinitialVF">
<feature name="PCIEiovSRtotalVF">
<feature name="PCIEiovSRfuncDepLink">
<feature name="PCIEiovSRVFoffset">
<feature name="PCIEiovSRVFstride">
<feature name="PCIEiovSRVFdeviceID">
<feature name="PCIEiovSRpageSize">
<feature name="PCIEiovSRmig">
<feature name="PCIEiovSRmigOffset">
<feature name="PCIEiovSRmigBIR">
<feature name="PCIEiovSRbar0impl">
<feature name="PCIEiovSRbar0width">
<feature name="PCIEiovSRbar0size">
<feature name="PCIEiovSRbar0Pref">
<feature name="PCIEiovSRbar1impl">
<feature name="PCIEiovSRbar1width">
<feature name="PCIEiovSRbar1size">
<feature name="PCIEiovSRbar1Pref">
<feature name="PCIEiovSRbar2impl">
<feature name="PCIEiovSRbar2width">
<feature name="PCIEiovSRbar2size">
<feature name="PCIEiovSRbar2Pref">
<feature name="PCIEiovSRbar3impl">
<feature name="PCIEiovSRbar3width">
<feature name="PCIEiovSRbar3size">
<feature name="PCIEiovSRbar3Pref">
<feature name="PCIEiovSRbar4impl">
<feature name="PCIEiovSRbar4width">
<feature name="PCIEiovSRbar4size">
<feature name="PCIEiovSRbar4Pref">
<feature name="PCIEiovSRbar5impl">
<feature name="PCIEiovSRbar5width">
<feature name="PCIEiovSRbar5size">
<feature name="PCIEiovSRbar5Pref">
<username>Rate</username>
<username>TxDeemph</username>
<username>TxMargin</username>
<username>TxSwing</username>
<timing.set default="yes" name="default">
<timing.parm name="ttoPollSpeed">
<timing.parm name="ttoCfgLnWaitUp">
<timing.parm name="ttoCfgLnWaitDn">
<timing.parm name="ttoPollConfig">
<timing.parm name="ttoPollActive">
<timing.parm name="ttoDetectQuiet">
<timing.parm name="ttoDetectActive">
<timing.parm name="ttoCfgLkStartDn">
<timing.parm name="ttoCfgLkStartUp">
<timing.parm name="ttoCfgCompDn">
<timing.parm name="ttoCfgCompUp">
<timing.parm name="ttoCfgLkAcceptDn">
<timing.parm name="ttoCfgLkAcceptUp">
<timing.parm name="ttoCfgIdle">
<timing.parm name="ttoRcvrCfg">
<timing.parm name="ttoRcvrLock">
<timing.parm name="ttoRcvrIdle">
<timing.parm name="ttoDisabled">
<timing.parm name="ttoHotReset">
<timing.parm name="ttoLoopback">
<timing.parm name="ttoTLCpl">
<timing.parm name="ttxUImin">
<timing.parm name="ttxUImax">
<timing.parm name="ttxIDLEmin">
<timing.parm name="ttxSetToIDLEmax">
<timing.parm name="ttxLaneSKEWmax">
<timing.parm name="ttxCxLKmin">
<timing.parm name="ttxCxLKmax">
<timing.parm name="trxUImin">
<timing.parm name="trxUImax">
<timing.parm name="trxSetToDetectmax">
<timing.parm name="trxTotalSKEWmax">
<timing.parm name="ttoFcInitRollover" enabled="no" />
<timing.parm name="ttxIdleToDiff" enabled="no" />
<timing.parm name="ttoResetTOCfg" enabled="no">
<timing.parm name="ttoResetTODetect" enabled="no">
<timing.parm name="ttoLoopbackEntry" enabled="no">
<timing.parm name="ttoLoopbackEntry2Active" enabled="no">
<timing.parm name="ttoLoopbackEntryEIMaster" enabled="no">
<timing.parm name="ttoLoopbackEntryEISlave" enabled="no">
<timing.parm name="ttoTLCplRx" enabled="no">
<timing.parm name="ttoFCmin" enabled="no">
<timing.parm name="ttoFCmax" enabled="no">
<timing.parm name="ttoPMEmin" enabled="no">
<timing.parm name="ttoPMEmax" enabled="no">
<timing.parm name="ttoL0smax" enabled="no">
<timing.parm name="ttoL0smin" enabled="no">
<timing.parm name="ttoL1min" enabled="no">
<timing.parm name="ttoL1max" enabled="no">
<timing.parm name="ttoL1aspmmin" enabled="no">
<timing.parm name="ttoL1aspmmax" enabled="no">
<timing.parm name="ttoTurnOffmax" enabled="no">
<timing.parm name="ttoPMmax" enabled="no">
<timing.parm name="ttoD3hot2D0max" enabled="no">
<timing.parm name="ttoPMHSmax" enabled="no">
<timing.parm name="ttoCRSmax" enabled="no">
<timing.parm name="ttoSysInit" enabled="no">
<timing.parm name="ttoPReqAccLimit" enabled="no">
<timing.parm name="ttoHPCmdMax" enabled="no">
<timing.parm name="ttoHPCmdMin" enabled="no">
<timing.parm name="ttoPCLKmarginMax" enabled="no">
<timing.parm name="ttoInferEIRcvrCfg2_5" enabled="no">
<timing.parm name="ttoInferEIRcvrCfg5_0" enabled="no">
<timing.parm name="ttoInferEISpeed2_5" enabled="no">
<timing.parm name="ttoInferEISpeed5_0" enabled="no">
<timing.parm name="ttoInferEIExitSpeed2_5" enabled="no">
<timing.parm name="ttoInferEIExitSpeed5_0" enabled="no">
<timing.parm name="ttoInL1N2_5Min" enabled="no">
<timing.parm name="ttoRecSpeedSuccTxEiMin" enabled="no">
<timing.parm name="ttoRecSpeedTxEiMin" enabled="no">
<timing.parm name="ttoRecSpeedTxEiMax" enabled="no">
<timing.parm name="ttoRecSpeed" enabled="no">
<timing.parm name="ttoPollCompTxEiMin" enabled="no">
<timing.parm name="ttoPollCompTxEiMax" enabled="no">
<timing.parm name="ttoUpconfig" enabled="no">
<timing.parm name="ttoFLRmax" enabled="no">
<timing.parm name="ttoFLRmin" enabled="no">
<timing.parm name="ttoFLRInit" enabled="no">
<timing.parm name="ttoIOVinit" enabled="no">
<timing.parm name="ttxIdleToValid" enabled="no">
<timing.parm name="ttxReceiverDetect" enabled="no">
<timing.parm name="ttxFCmin" enabled="no">
<timing.parm name="ttxFCmax" enabled="no">
<timing.parm name="ttxFCESmin" enabled="no">
<timing.parm name="ttxFCESmax" enabled="no">
<timing.parm name="ttxFCL1exitMax" enabled="no">
<timing.parm name="ttxTurnOffMin" enabled="no">
<timing.parm name="ttxTurnOffMax" enabled="no">
<timing.parm name="ttxPwrOffMin" enabled="no">
<timing.parm name="ttx2L1aspmMin" enabled="no">
<timing.parm name="ttx2L1aspmUpMin" enabled="no">
<timing.parm name="ttxReadyMax" enabled="no">
<timing.parm name="ttxPcie2UImin" enabled="no">
<timing.parm name="ttxPcie2UImax" enabled="no">
<timing.parm name="ttxG2DetectQuietMin" enabled="no">
<timing.parm name="trxPcie2UImin" enabled="no">
<timing.parm name="trxPcie2UImax" enabled="no">
<timing.parm name="trxInferEImax" enabled="no">
<timing.parm name="trxInferClkEIsuccmax" enabled="no">
<timing.parm name="trxInferClkEImax" enabled="no">
<timing.parm name="ttxPhyLatency" enabled="no">
<timing.parm name="trxPhyLatency" enabled="no">
<timing.parm name="ttxBeaconMax" enabled="no">
<timing.parm name="ttxBeaconMin" enabled="no">
<timing.parm name="trxBeaconMax" enabled="no">
<timing.parm name="trxBeaconMin" enabled="no">
<timing.parm name="trxElecIdleMax" enabled="no">
<timing.parm name="trxElecIdleMin" enabled="no">
<timing.parm name="ttxDetectRxMax" enabled="no">
<timing.parm name="ttxDetectRxMin" enabled="no">
<timing.parm name="trxPhyLockMax" enabled="no">
<timing.parm name="trxPhyLockMin" enabled="no">
<timing.parm name="ttxSymLockSkipSet" enabled="no">
<timing.parm name="tP0ToP0sMax" enabled="no">
<timing.parm name="tP0ToP0sMin" enabled="no">
<timing.parm name="tP0ToP1Max" enabled="no">
<timing.parm name="tP0ToP1Min" enabled="no">
<timing.parm name="tP0ToP2Max" enabled="no">
<timing.parm name="tP0ToP2Min" enabled="no">
<timing.parm name="tP0sToP0Max" enabled="no">
<timing.parm name="tP0sToP0Min" enabled="no">
<timing.parm name="tP1ToP0Max" enabled="no">
<timing.parm name="tP1ToP0Min" enabled="no">
<timing.parm name="tP2ToP1Max" enabled="no">
<timing.parm name="tP2ToP1Min" enabled="no">
<timing.parm name="tP2ShutdownMax" enabled="no">
<timing.parm name="tP2ShutdownMin" enabled="no">
<timing.parm name="tP1StartupMax" enabled="no">
<timing.parm name="tP1StartupMin" enabled="no">
<timing.parm name="tResetToReadyMax" enabled="no">
<timing.parm name="tResetToReadyMin" enabled="no">
<timing.parm name="ttxPCLKToDataValidMax" enabled="no">
<timing.parm name="ttxPCLKToDataValidMin" enabled="no">
<timing.parm name="trxPCLKSetupMax" enabled="no">
<timing.parm name="trxPCLKHoldMin" enabled="no">
<timing.parm name="ttxResetToOutputMax" enabled="no">
<timing.parm name="ttxResetToOutputMin" enabled="no">
<timing.parm name="ttxAsyncPhyStatusMax" enabled="no">
<timing.parm name="ttxAsyncPhyStatusMin" enabled="no">
<timing.parm name="ttxDataRateChangeMin" enabled="no">
<timing.parm name="ttxDataRateChange2Min" enabled="no">