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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: dmu_common_ccc_pkt.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module dmu_common_ccc_pkt | |
36 | ( | |
37 | clk, | |
38 | rst_l, | |
39 | ||
40 | cdp2pkt_addr, | |
41 | cdp2pkt_data, | |
42 | cdp2pkt_src_bus, | |
43 | cdp2pkt_wr, | |
44 | ||
45 | fsm2pkt_valid, | |
46 | ||
47 | csr_ring_out | |
48 | ); | |
49 | ||
50 | // ---------------------------------------------------------------------------- | |
51 | // Parameters | |
52 | // ---------------------------------------------------------------------------- | |
53 | parameter IDLE = 2'b00, // state machine states | |
54 | RDMS = 2'b01, | |
55 | RDLS = 2'b10, | |
56 | BUSY = 2'b11; | |
57 | ||
58 | // ---------------------------------------------------------------------------- | |
59 | // Ports | |
60 | // ---------------------------------------------------------------------------- | |
61 | input clk; | |
62 | input rst_l; | |
63 | ||
64 | input [`FIRE_CSR_DATA_BITS] cdp2pkt_data; | |
65 | input cdp2pkt_wr; | |
66 | input [`FIRE_CSR_SRCB_BITS] cdp2pkt_src_bus; | |
67 | input [`FIRE_CSR_ADDR_BITS] cdp2pkt_addr; | |
68 | ||
69 | input fsm2pkt_valid; | |
70 | ||
71 | output [`FIRE_CSR_RING_BITS] csr_ring_out; | |
72 | ||
73 | // ---------------------------------------------------------------------------- | |
74 | // Variables | |
75 | // ---------------------------------------------------------------------------- | |
76 | wire [`FIRE_CSR_RING_BITS] csr_ring_out, addr_phase; | |
77 | wire [`FIRE_CSR_CMND_BITS] cmnd; | |
78 | ||
79 | reg [`FIRE_CSR_RING_BITS] ring, nxt_ring; | |
80 | reg [1:0] state, nxt_state; | |
81 | reg [1:0] select; | |
82 | ||
83 | // ---------------------------------------------------------------------------- | |
84 | // Zero In Checkers | |
85 | // ---------------------------------------------------------------------------- | |
86 | ||
87 | // ---------------------------------------------------------------------------- | |
88 | // Combinational | |
89 | // ---------------------------------------------------------------------------- | |
90 | assign csr_ring_out = ring; | |
91 | ||
92 | // next state | |
93 | always @ (state or fsm2pkt_valid) begin | |
94 | case (state) | |
95 | IDLE : begin | |
96 | if (fsm2pkt_valid) nxt_state = RDMS; | |
97 | else nxt_state = IDLE; | |
98 | end | |
99 | RDMS : nxt_state = RDLS; | |
100 | RDLS : nxt_state = BUSY; | |
101 | BUSY : begin | |
102 | if (fsm2pkt_valid) nxt_state = BUSY; | |
103 | else nxt_state = IDLE; | |
104 | end | |
105 | endcase | |
106 | end | |
107 | ||
108 | always @ (state or fsm2pkt_valid or cdp2pkt_wr) begin | |
109 | case (state) | |
110 | IDLE : begin | |
111 | if (fsm2pkt_valid) begin | |
112 | select = 2'b01; | |
113 | end | |
114 | else begin | |
115 | select = 0; | |
116 | end | |
117 | end | |
118 | RDMS : begin | |
119 | select = {cdp2pkt_wr, 1'b0}; | |
120 | end | |
121 | RDLS : begin | |
122 | select = {cdp2pkt_wr, cdp2pkt_wr}; | |
123 | end | |
124 | BUSY : begin | |
125 | select = 0; | |
126 | end | |
127 | endcase | |
128 | end | |
129 | ||
130 | assign cmnd = cdp2pkt_wr ? `FIRE_CSR_CMND_WREQ : `FIRE_CSR_CMND_RREQ; | |
131 | ||
132 | assign addr_phase[`FIRE_CSR_RING_CMND_BITS] = cmnd; | |
133 | assign addr_phase[`FIRE_CSR_RING_SRCB_BITS] = cdp2pkt_src_bus; | |
134 | assign addr_phase[`FIRE_CSR_RING_ADDR_BITS] = cdp2pkt_addr; | |
135 | ||
136 | always @ (select or addr_phase or cdp2pkt_data) begin | |
137 | case (select) // synopsys infer_mux | |
138 | 2'b00 : nxt_ring = 0; | |
139 | 2'b01 : nxt_ring = addr_phase; | |
140 | 2'b10 : nxt_ring = cdp2pkt_data[`FIRE_CSR_RDMS_BITS]; | |
141 | 2'b11 : nxt_ring = cdp2pkt_data[`FIRE_CSR_RDLS_BITS]; | |
142 | endcase | |
143 | end | |
144 | ||
145 | // ---------------------------------------------------------------------------- | |
146 | // Sequential | |
147 | // ---------------------------------------------------------------------------- | |
148 | always @ (posedge clk) begin | |
149 | if (!rst_l) begin | |
150 | ring <= 0; | |
151 | state <= IDLE; | |
152 | end | |
153 | else begin | |
154 | ring <= nxt_ring; | |
155 | state <= nxt_state; | |
156 | end | |
157 | end | |
158 | ||
159 | endmodule // dmu_common_ccc_pkt |