* ========== Copyright Header Begin ==========================================
* OpenSPARC T2 Processor File: interrupt_mondo_intr_all_threads.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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* ========== Copyright Header End ============================================
#define ENABLE_PCIE_LINK_TRAINING
#define ENABLE_INTR0x60 1
#define INTR0x60_EVENT_QUEUE_BASE event_queue_base
#define INTR0x60_MSI_START_ADDRESS 0x0
!#define INTR0x60_MONDO_IV 63
!#define INTR0x60_MSI_0_NUM 0
!#define INTR0x60_MSI_0_EQN 0
!/* Event Queue 0 == Mondo 24 */
!#define INTR0x60_MONDO_24_V 1
!#define INTR0x60_MONDO_24_THREAD 0
!#define INTR0x60_MONDO_24_CNTRL 0
#define INTR0x60_MONDO_IV 49
#define INTR0x60_MONDO_50_V 1
#define INTR0x60_MONDO_50_MODE 1
#define INTR0x60_MONDO_50_THREAD 0
#define INTR0x60_MONDO_50_CNTRL 2
#define INTR0x60_MSI_0_NUM 243
#define INTR0x60_MSI_0_EQN 26
/* Increment the thread to send the next interrupt to. */
#define INTR0x60_MSI_EXTRA_HANDLER_WHILE_EQ_DISABLED \
best_set_reg(mpeval(PCI_E_INT_MAP_ADDR \
+PCI_E_INT_MAP_STEP*(INTR0x60_MSI_0_EQN+4)), \
setx 0x2000000, %g7, %g4; \
/* Get the thread id and calculate the address for this thread in user_data.
* Has interrupt to this thread already occured?
* Record the interrupt as done. */
#define MASK_THREAD_ID and %g1, 0x7, %g1;
#define MASK_THREAD_ID /*nothing*/
#endif /* PORTABLE_CORE */
#define INTR0x60_MSI_EXTRA_HANDLER \
setx user_data_start, %g7, %g5; \
brz %g5, msi_extra_handler_continue; \
msi_extra_handler_continue:\
#include "interrupt0x60_defines.h"
#include "interrupt0x60_handler.s"
/************************************************************************
************************************************************************/
or %g7, 0x2, %g7 ! Set interrupt enable
mov %o1, %g6 ! %o1, %g6 = thread ID
setx user_data_start, %g1, %g3
add %l7, %g3, %g7 ! %g7 = pointer to thread's data area
stx %g0, [%g7] ! Clear this thread's interrupt count
be main_t0 ! branch if thread 0
ba main_t1_to_t63 ! branch if not thread 0
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
/* Initialize the NCU for the interrupt. */
/* Sync up all the threads. */
SYNC_THREAD_MAIN( local_test_failed, %g1, %g2, %g3 )
/* Kick off first interrupt, trap handler kicks off rest */
! user event to generate MSI msg.
nop ! $EV trig_pc_d(1, @VA(.MAIN.first_mondo_intr)) -> EnablePCIeIgCmd ("MSI32", eval(INTR0x60_MSI_0_NUM, 16), 0, 4, 1, *, 1 )
/* Wait for interrupt to occur. */
setx 0x400, %g1, %g2 ! DTM timeout count
setx 0x100, %g1, %g2 ! timeout count
! Kick off next interrupt to next thread.
ldx [%g7], %g0 ! Wait for last store
nop ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo_gen)) -> EnablePCIeIgCmd ("MSI32", eval(INTR0x60_MSI_0_NUM, 16), 0, 4, 1, *, 1 )
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
! All Threads Except 0 Start Here
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
SYNC_THREAD_OTHER( %g6,%g1,%g2 )
/* Wait for interrupt to occur. */
setx 0x400, %g1, %g2 ! DTM timeout count
setx 0x100, %g1, %g2 ! timeout count
mulx %g2, %g6, %g2 ! Multiply by thread number
t1_t63_intr_wait_loop_top:
bne t1_t63_intr_wait_loop_top
! Kick off next interrupt to next thread.
ldx [%g7], %g0 ! Wait for last store
nop ! $EV trig_pc_d(1, @VA(.MAIN.t1_t63_mondo_gen)) -> EnablePCIeIgCmd ("MSI32", eval(INTR0x60_MSI_0_NUM, 16), 0, 4, 1, *, 1 )
/************************************************************************
************************************************************************/
/************************************************************************/