projects / OpenSPARC-T2-SAM / blame
| Commit | Line | Data |
|---|---|---|
| 920dae64 AT |
1 | <!-- interpreter=xml2reg args='-t' --> |
| 2 | <register_list> | |
| 3 | <register name="L2_ADDRESSING_FIELDS (L2_ADDRESSING_FIELDS)"> | |
| 4 | <class_name>N2_L2AddressingFields</class_name> | |
| 5 | <submodule>N2</submodule> | |
| 6 | <comment> | |
| 7 | This class is based on N2 PRM 1.1 Table B-4 and splits a virtual | |
| 8 | address into the bit fields needed to index the L2 cache. This class | |
| 9 | assumes 8 L2 banks. | |
| 10 | </comment> | |
| 11 | <priv>yes</priv> | |
| 12 | <field name="RSVD"> | |
| 13 | <start_offset>0</start_offset> | |
| 14 | <end_offset>2</end_offset> | |
| 15 | <initial_value>0</initial_value> | |
| 16 | <protection>RO</protection> | |
| 17 | <field_type>ZERO</field_type> | |
| 18 | <comment> | |
| 19 | All zero for 64-bit access. | |
| 20 | </comment> | |
| 21 | <format type="hex"/> | |
| 22 | </field> | |
| 23 | <field name="WORD"> | |
| 24 | <start_offset>3</start_offset> | |
| 25 | <end_offset>5</end_offset> | |
| 26 | <initial_value>0</initial_value> | |
| 27 | <protection>RW</protection> | |
| 28 | <field_type>NORMAL</field_type> | |
| 29 | <comment> | |
| 30 | Selects 64-bit (doubleword) in cache line. See PRM Rev 1.1 Tbl. 28-43 | |
| 31 | </comment> | |
| 32 | <format type="hex"/> | |
| 33 | </field> | |
| 34 | <field name="BANK"> | |
| 35 | <start_offset>6</start_offset> | |
| 36 | <end_offset>8</end_offset> | |
| 37 | <initial_value>0</initial_value> | |
| 38 | <protection>RW</protection> | |
| 39 | <field_type>NORMAL</field_type> | |
| 40 | <comment> | |
| 41 | Selects bank containing the cache line. | |
| 42 | </comment> | |
| 43 | <format type="hex"/> | |
| 44 | </field> | |
| 45 | <field name="SET"> | |
| 46 | <start_offset>9</start_offset> | |
| 47 | <end_offset>17</end_offset> | |
| 48 | <initial_value>0</initial_value> | |
| 49 | <protection>RW</protection> | |
| 50 | <field_type>NORMAL</field_type> | |
| 51 | <comment> | |
| 52 | Selects cache set containing the cache line. Assumes L2 cache | |
| 53 | hashing is disabled. | |
| 54 | </comment> | |
| 55 | </field> | |
| 56 | <field name="TAG"> | |
| 57 | <start_offset>18</start_offset> | |
| 58 | <end_offset>39</end_offset> | |
| 59 | <initial_value>0</initial_value> | |
| 60 | <protection>RW</protection> | |
| 61 | <field_type>NORMAL</field_type> | |
| 62 | <comment> | |
| 63 | Tag for cache line. | |
| 64 | </comment> | |
| 65 | </field> | |
| 66 | </register> | |
| 67 | </register_list> |