projects / OpenSPARC-T2-SAM / blame
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1 | # ========== Copyright Header Begin ========================================== |
| 2 | # | |
| 3 | # OpenSPARC T2 Processor File: SS_StateCtr.py | |
| 4 | # Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. | |
| 5 | # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. | |
| 6 | # | |
| 7 | # The above named program is free software; you can redistribute it and/or | |
| 8 | # modify it under the terms of the GNU General Public | |
| 9 | # License version 2 as published by the Free Software Foundation. | |
| 10 | # | |
| 11 | # The above named program is distributed in the hope that it will be | |
| 12 | # useful, but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 14 | # General Public License for more details. | |
| 15 | # | |
| 16 | # You should have received a copy of the GNU General Public | |
| 17 | # License along with this work; if not, write to the Free Software | |
| 18 | # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. | |
| 19 | # | |
| 20 | # ========== Copyright Header End ============================================ | |
| 21 | ||
| 22 | import sys | |
| 23 | ||
| 24 | from SS_State import * | |
| 25 | from SS_Setup import * | |
| 26 | ||
| 27 | setup = setups[sys.argv[1]] | |
| 28 | ||
| 29 | import SS_StateAsr | |
| 30 | import SS_StatePrf | |
| 31 | import SS_StateHrf | |
| 32 | import SS_StateSrf | |
| 33 | ||
| 34 | ctr_regs=[] | |
| 35 | ctr_regs.extend(SS_StateAsr.ctr_regs) | |
| 36 | ctr_regs.extend(SS_StatePrf.ctr_regs) | |
| 37 | ctr_regs.extend(SS_StateHrf.ctr_regs) | |
| 38 | ctr_regs.extend(SS_StateSrf.ctr_regs) | |
| 39 | ||
| 40 | asi_regs=[ | |
| 41 | SS_AsiCtrReg('SS','lsu_ctr',PRIVATE, | |
| 42 | [ | |
| 43 | ('ic' , 0, 0,RW,0), | |
| 44 | ('dc' , 1, 1,RW,0), | |
| 45 | ('im' , 2, 2,RW,0), | |
| 46 | ('dm' , 3, 3,RW,0), | |
| 47 | ('pw' ,19,19,RW,0), | |
| 48 | ('pr' ,20,20,RW,0), | |
| 49 | ('vw' ,21,21,RW,0), | |
| 50 | ('vr' ,22,22,RW,0), | |
| 51 | ('vm' ,25,32,RW,0), | |
| 52 | ('pm' ,33,40,RW,0), | |
| 53 | ('mode' ,33,34,RW,0) | |
| 54 | ]) | |
| 55 | , SS_CtrReg('SS','tsb_tte_tag',0,0,0,64, | |
| 56 | [ | |
| 57 | ('va' , 0,41,RW,0), # va bits 63:22 actually | |
| 58 | ('context' ,48,63,RW,0) | |
| 59 | ]) | |
| 60 | , SS_CtrReg('SS','tsb_tte_data',0,0,0,64, | |
| 61 | [ | |
| 62 | ('size' , 0, 3,RW,0), # note 4 bits | |
| 63 | ('soft' , 4, 5,RW,0), | |
| 64 | ('w' , 6, 6,RW,0), | |
| 65 | ('x' , 7, 7,RW,0), | |
| 66 | ('p' , 8, 8,RW,0), | |
| 67 | ('cv' , 9, 9,RW,0), | |
| 68 | ('cp' ,10,10,RW,0), | |
| 69 | ('e' ,11,11,RW,0), | |
| 70 | ('ie' ,12,12,RW,0), | |
| 71 | ('pa' ,13,55,RW,0), # note 56 bits of PA ... | |
| 72 | ('soft2' ,56,61,RW,0), | |
| 73 | ('nfo' ,62,62,RW,0), | |
| 74 | ('v' ,63,63,RW,0) | |
| 75 | ]) | |
| 76 | ] | |
| 77 | ||
| 78 | ctr_regs.extend(asi_regs) | |
| 79 | ||
| 80 | h_file=open('%s' % sys.argv[2],'w') | |
| 81 | ||
| 82 | h_base_name = sys.argv[2].split('/')[-1].split('.')[0] | |
| 83 | ||
| 84 | h_file.write('#ifndef __'+h_base_name+'_h__\n') | |
| 85 | h_file.write('#define __'+h_base_name+'_h__\n') | |
| 86 | h_file.write('\n') | |
| 87 | h_file.write('#include "SS_AsiCtrReg.h"\n') | |
| 88 | h_file.write('#include "SS_SnapShot.h"\n') | |
| 89 | h_file.write('\n') | |
| 90 | ||
| 91 | for reg in ctr_regs: | |
| 92 | reg.cpp(h_file) | |
| 93 | ||
| 94 | h_file.write('\n') | |
| 95 | h_file.write('#endif\n') | |
| 96 | h_file.write('\n') | |
| 97 | ||
| 98 | h_file.close() | |
| 99 | ||
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