Commit | Line | Data |
---|---|---|
da7c5cc6 | 1 | /* |
0880b18e | 2 | * Copyright (c) 1982, 1986 Regents of the University of California. |
da7c5cc6 KM |
3 | * All rights reserved. The Berkeley software License Agreement |
4 | * specifies the terms and conditions for redistribution. | |
5 | * | |
95f51977 | 6 | * @(#)nexus.h 7.1 (Berkeley) 6/5/86 |
da7c5cc6 | 7 | */ |
9c319e96 BJ |
8 | |
9 | /* | |
10 | * Information about nexus's. | |
53e0a350 BJ |
11 | * |
12 | * Each machine has an address of backplane slots (nexi). | |
13 | * Each nexus is some type of adapter, whose code is the low | |
14 | * byte of the first word of the adapter address space. | |
15 | * At boot time the system looks through the array of available | |
16 | * slots and finds the interconnects for the machine. | |
9c319e96 | 17 | */ |
cdd3a7e3 | 18 | #define NNEXSBI 16 |
6692a5c8 | 19 | #if VAX8600 |
cdd3a7e3 | 20 | #define NNEX8600 NNEXSBI |
6692a5c8 JB |
21 | #define NEXA8600 ((struct nexus *)(0x20000000)) |
22 | #define NEXB8600 ((struct nexus *)(0x22000000)) | |
23 | #endif | |
9c319e96 | 24 | #if VAX780 |
cdd3a7e3 | 25 | #define NNEX780 NNEXSBI |
9c319e96 BJ |
26 | #define NEX780 ((struct nexus *)0x20000000) |
27 | #endif | |
28 | #if VAX750 | |
cdd3a7e3 | 29 | #define NNEX750 NNEXSBI |
53e0a350 | 30 | #define NEX750 ((struct nexus *)0xf20000) |
9c319e96 | 31 | #endif |
10f66600 | 32 | #if VAX730 |
cdd3a7e3 | 33 | #define NNEX730 NNEXSBI |
10f66600 | 34 | #define NEX730 ((struct nexus *)0xf20000) |
ea4d5e21 | 35 | #endif |
95f51977 C |
36 | #if VAX630 |
37 | #define NNEX630 1 | |
38 | #define NEX630 ((struct nexus *)0x20088000) | |
39 | #endif | |
9c319e96 BJ |
40 | #define NEXSIZE 0x2000 |
41 | ||
6692a5c8 | 42 | #if VAX8600 |
cdd3a7e3 | 43 | #define MAXNNEXUS (2 * NNEXSBI) |
6692a5c8 | 44 | #else |
cdd3a7e3 | 45 | #define MAXNNEXUS NNEXSBI |
6692a5c8 | 46 | #endif |
b6e137a6 BJ |
47 | |
48 | #ifndef LOCORE | |
9c319e96 BJ |
49 | struct nexus { |
50 | union nexcsr { | |
51 | long nex_csr; | |
52 | u_char nex_type; | |
53 | } nexcsr; | |
54 | long nex_pad[NEXSIZE / sizeof (long) - 1]; | |
55 | }; | |
56 | #ifdef KERNEL | |
53e0a350 | 57 | struct nexus nexus[MAXNNEXUS]; |
9c319e96 | 58 | #endif |
b5fa1937 | 59 | #endif |
9c319e96 BJ |
60 | |
61 | /* | |
62 | * Bits in high word of nexus's. | |
63 | */ | |
64 | #define SBI_PARFLT (1<<31) /* sbi parity fault */ | |
65 | #define SBI_WSQFLT (1<<30) /* write sequence fault */ | |
f7c4179b | 66 | #define SBI_URDFLT (1<<29) /* unexpected read data fault */ |
9c319e96 BJ |
67 | #define SBI_ISQFLT (1<<28) /* interlock sequence fault */ |
68 | #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */ | |
69 | #define SBI_XMTFLT (1<<26) /* transmit fault */ | |
70 | ||
71 | #define NEX_CFGFLT (0xfc000000) | |
72 | ||
f7c4179b | 73 | #ifndef LOCORE |
c8a964c6 | 74 | #if defined(VAX780) || defined(VAX8600) |
f7c4179b BJ |
75 | #define NEXFLT_BITS \ |
76 | "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT" | |
f7c4179b BJ |
77 | #endif |
78 | #endif | |
79 | ||
9c319e96 BJ |
80 | #define NEX_APD (1<<23) /* adaptor power down */ |
81 | #define NEX_APU (1<<22) /* adaptor power up */ | |
82 | ||
83 | #define MBA_OT (1<<21) /* overtemperature */ | |
84 | ||
85 | #define UBA_UBINIT (1<<18) /* unibus init */ | |
86 | #define UBA_UBPDN (1<<17) /* unibus power down */ | |
87 | #define UBA_UBIC (1<<16) /* unibus initialization complete */ | |
88 | ||
89 | /* | |
90 | * Types for nex_type. | |
91 | */ | |
53e0a350 | 92 | #define NEX_ANY 0 /* pseudo for handling 11/750 */ |
9c319e96 BJ |
93 | #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */ |
94 | #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */ | |
95 | #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */ | |
96 | #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */ | |
97 | #define NEX_MBA 0x20 /* Massbus adaptor */ | |
98 | #define NEX_UBA0 0x28 /* Unibus adaptor */ | |
53e0a350 | 99 | #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */ |
9c319e96 BJ |
100 | #define NEX_UBA2 0x2a |
101 | #define NEX_UBA3 0x2b | |
102 | #define NEX_DR32 0x30 /* DR32 user i'face to SBI */ | |
096eb64d | 103 | #define NEX_CI 0x38 /* CI adaptor */ |
9c319e96 BJ |
104 | #define NEX_MPM0 0x40 /* Multi-port mem */ |
105 | #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */ | |
106 | #define NEX_MPM2 0x42 | |
107 | #define NEX_MPM3 0x43 | |
096eb64d SL |
108 | #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */ |
109 | #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */ | |
110 | #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */ | |
111 | #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */ | |
112 | #define NEX_MEM64I 0x6c /* 64K chips, interleaved */ | |
96f412b7 JB |
113 | #define NEX_MEM256L 0x70 /* 256K chips, non-interleaved, lower */ |
114 | #define NEX_MEM256LI 0x71 /* 256K chips, ext-interleaved, lower */ | |
115 | #define NEX_MEM256U 0x72 /* 256K chips, non-interleaved, upper */ | |
116 | #define NEX_MEM256UI 0x73 /* 256K chips, ext-interleaved, upper */ | |
117 | #define NEX_MEM256I 0x74 /* 256K chips, interleaved */ |