BSD 4_3 release

[unix-history] / usr / src / sys / vax / nexus.h

/*
* Copyright (c) 1982, 1986 Regents of the University of California.
* All rights reserved.  The Berkeley software License Agreement
* specifies the terms and conditions for redistribution.
*
*      @(#)nexus.h     7.1 (Berkeley) 6/5/86
*/

/*
* Information about nexus's.
*
* Each machine has an address of backplane slots (nexi).
* Each nexus is some type of adapter, whose code is the low
* byte of the first word of the adapter address space.
* At boot time the system looks through the array of available
* slots and finds the interconnects for the machine.
*/
#define NNEXSBI         16
#if VAX8600
#define NNEX8600        NNEXSBI
#define NEXA8600        ((struct nexus *)(0x20000000))
#define NEXB8600        ((struct nexus *)(0x22000000))
#endif
#if VAX780
#define NNEX780 NNEXSBI
#define NEX780  ((struct nexus *)0x20000000)
#endif
#if VAX750
#define NNEX750 NNEXSBI
#define NEX750  ((struct nexus *)0xf20000)
#endif
#if VAX730
#define NNEX730 NNEXSBI
#define NEX730  ((struct nexus *)0xf20000)
#endif
#if VAX630
#define NNEX630 1
#define NEX630  ((struct nexus *)0x20088000)
#endif
#define NEXSIZE 0x2000

#if VAX8600
#define MAXNNEXUS (2 * NNEXSBI)
#else 
#define MAXNNEXUS NNEXSBI
#endif

#ifndef LOCORE
struct  nexus {
       union nexcsr {
               long    nex_csr;
               u_char  nex_type;
       } nexcsr;
       long    nex_pad[NEXSIZE / sizeof (long) - 1];
};
#ifdef  KERNEL
struct nexus nexus[MAXNNEXUS];
#endif
#endif

/*
* Bits in high word of nexus's.
*/
#define SBI_PARFLT      (1<<31)         /* sbi parity fault */
#define SBI_WSQFLT      (1<<30)         /* write sequence fault */
#define SBI_URDFLT      (1<<29)         /* unexpected read data fault */
#define SBI_ISQFLT      (1<<28)         /* interlock sequence fault */
#define SBI_MXTFLT      (1<<27)         /* multiple transmitter fault */
#define SBI_XMTFLT      (1<<26)         /* transmit fault */

#define NEX_CFGFLT      (0xfc000000)

#ifndef LOCORE
#if defined(VAX780) || defined(VAX8600)
#define NEXFLT_BITS \
"\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
#endif
#endif

#define NEX_APD         (1<<23)         /* adaptor power down */
#define NEX_APU         (1<<22)         /* adaptor power up */

#define MBA_OT          (1<<21)         /* overtemperature */

#define UBA_UBINIT      (1<<18)         /* unibus init */
#define UBA_UBPDN       (1<<17)         /* unibus power down */
#define UBA_UBIC        (1<<16)         /* unibus initialization complete */

/*
* Types for nex_type.
*/
#define NEX_ANY         0               /* pseudo for handling 11/750 */
#define NEX_MEM4        0x08            /* 4K chips, non-interleaved mem */
#define NEX_MEM4I       0x09            /* 4K chips, interleaved mem */
#define NEX_MEM16       0x10            /* 16K chips, non-interleaved mem */
#define NEX_MEM16I      0x11            /* 16K chips, interleaved mem */
#define NEX_MBA         0x20            /* Massbus adaptor */
#define NEX_UBA0        0x28            /* Unibus adaptor */
#define NEX_UBA1        0x29            /* 4 flavours for 4 addr spaces */
#define NEX_UBA2        0x2a
#define NEX_UBA3        0x2b
#define NEX_DR32        0x30            /* DR32 user i'face to SBI */
#define NEX_CI          0x38            /* CI adaptor */
#define NEX_MPM0        0x40            /* Multi-port mem */
#define NEX_MPM1        0x41            /* Who knows why 4 different ones ? */
#define NEX_MPM2        0x42
#define NEX_MPM3        0x43
#define NEX_MEM64L      0x68            /* 64K chips, non-interleaved, lower */
#define NEX_MEM64LI     0x69            /* 64K chips, ext-interleaved, lower */
#define NEX_MEM64U      0x6a            /* 64K chips, non-interleaved, upper */
#define NEX_MEM64UI     0x6b            /* 64K chips, ext-interleaved, upper */
#define NEX_MEM64I      0x6c            /* 64K chips, interleaved */
#define NEX_MEM256L     0x70            /* 256K chips, non-interleaved, lower */
#define NEX_MEM256LI    0x71            /* 256K chips, ext-interleaved, lower */
#define NEX_MEM256U     0x72            /* 256K chips, non-interleaved, upper */
#define NEX_MEM256UI    0x73            /* 256K chips, ext-interleaved, upper */
#define NEX_MEM256I     0x74            /* 256K chips, interleaved */