date and time created 82/06/14 18:09:52 by peter
[unix-history] / usr / src / sys / vax / if / if_acc.c
CommitLineData
7dfb87a5 1/* if_acc.c 4.16 82/06/14 */
28081cf8
SL
2
3#include "acc.h"
4#ifdef NACC > 0
5
6/*
7 * ACC LH/DH ARPAnet IMP interface driver.
8 */
9
10#include "../h/param.h"
11#include "../h/systm.h"
12#include "../h/mbuf.h"
13#include "../h/pte.h"
14#include "../h/buf.h"
15#include "../h/protosw.h"
16#include "../h/socket.h"
17#include "../h/ubareg.h"
18#include "../h/ubavar.h"
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19#include "../h/cpu.h"
20#include "../h/mtpr.h"
21#include "../h/vmmac.h"
22#include "../net/in.h"
23#include "../net/in_systm.h"
24#include "../net/if.h"
a2cd4df7 25#include "../net/if_acc.h"
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26#include "../net/if_imp.h"
27#include "../net/if_uba.h"
28
29int accprobe(), accattach(), accrint(), accxint();
30struct uba_device *accinfo[NACC];
31u_short accstd[] = { 0 };
32struct uba_driver accdriver =
33 { accprobe, 0, accattach, 0, accstd, "acc", accinfo };
34#define ACCUNIT(x) minor(x)
35
36int accinit(), accstart(), accreset();
37
38/*
39 * "Lower half" of IMP interface driver.
40 *
41 * Each IMP interface is handled by a common module which handles
42 * the IMP-host protocol and a hardware driver which manages the
43 * hardware specific details of talking with the IMP.
44 *
45 * The hardware portion of the IMP driver handles DMA and related
46 * management of UNIBUS resources. The IMP protocol module interprets
47 * contents of these messages and "controls" the actions of the
48 * hardware module during IMP resets, but not, for instance, during
49 * UNIBUS resets.
50 *
51 * The two modules are coupled at "attach time", and ever after,
52 * through the imp interface structure. Higher level protocols,
53 * e.g. IP, interact with the IMP driver, rather than the ACC.
54 */
55struct acc_softc {
56 struct ifnet *acc_if; /* pointer to IMP's ifnet struct */
57 struct impcb *acc_ic; /* data structure shared with IMP */
58 struct ifuba acc_ifuba; /* UNIBUS resources */
59 struct mbuf *acc_iq; /* input reassembly queue */
60 short acc_olen; /* size of last message sent */
61 char acc_flush; /* flush remainder of message */
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62} acc_softc[NACC];
63
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64#define NACCDEBUG 10000
65char accdebug[NACCDEBUG];
66int accdebugx;
67
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68/*
69 * Reset the IMP and cause a transmitter interrupt by
70 * performing a null DMA.
71 */
72accprobe(reg)
73 caddr_t reg;
74{
75 register int br, cvec; /* r11, r10 value-result */
76 register struct accdevice *addr = (struct accdevice *)reg;
77
78COUNT(ACCPROBE);
79#ifdef lint
80 br = 0; cvec = br; br = cvec;
81 accrint(0); accxint(0);
82#endif
a2cd4df7
BJ
83 addr->icsr = ACC_RESET; DELAY(5000);
84 addr->ocsr = ACC_RESET; DELAY(5000);
85 addr->ocsr = OUT_BBACK; DELAY(5000);
86 addr->owc = 0;
87 addr->ocsr = ACC_IE | ACC_GO; DELAY(5000);
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88 addr->icsr = ACC_RESET; DELAY(5000);
89 addr->ocsr = ACC_RESET; DELAY(5000);
a2cd4df7 90 if (cvec && cvec != 0x200) /* transmit -> receive */
28081cf8 91 cvec -= 4;
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92#ifdef ECHACK
93 br = 0x16;
94#endif
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95 return (1);
96}
97
98/*
99 * Call the IMP module to allow it to set up its internal
100 * state, then tie the two modules together by setting up
101 * the back pointers to common data structures.
102 */
103accattach(ui)
104 struct uba_device *ui;
105{
106 register struct acc_softc *sc = &acc_softc[ui->ui_unit];
107 register struct impcb *ip;
108 struct ifimpcb {
109 struct ifnet ifimp_if;
110 struct impcb ifimp_impcb;
111 } *ifimp;
112
113COUNT(ACCATTACH);
114 if ((ifimp = (struct ifimpcb *)impattach(ui)) == 0)
a2cd4df7 115 panic("accattach");
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116 sc->acc_if = &ifimp->ifimp_if;
117 ip = &ifimp->ifimp_impcb;
118 sc->acc_ic = ip;
119 ip->ic_init = accinit;
120 ip->ic_start = accstart;
7dfb87a5 121 sc->acc_ifuba.ifu_flags = UBA_CANTWAIT;
a2cd4df7 122#ifdef notdef
7dfb87a5 123 sc->acc_ifuba.ifu_flags |= UBA_NEEDBDP;
a2cd4df7 124#endif
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125}
126
127/*
128 * Reset interface after UNIBUS reset.
129 * If interface is on specified uba, reset its state.
130 */
131accreset(unit, uban)
132 int unit, uban;
133{
134 register struct uba_device *ui;
135 struct acc_softc *sc;
136
137COUNT(ACCRESET);
138 if (unit >= NACC || (ui = accinfo[unit]) == 0 || ui->ui_alive == 0 ||
139 ui->ui_ubanum != uban)
140 return;
141 printf(" acc%d", unit);
142 sc = &acc_softc[unit];
143 /* must go through IMP to allow it to set state */
144 (*sc->acc_if->if_init)(unit);
145}
146
147/*
148 * Initialize interface: clear recorded pending operations,
a2cd4df7
BJ
149 * and retrieve, and initialize UNIBUS resources. Note
150 * return value is used by IMP init routine to mark IMP
151 * unavailable for outgoing traffic.
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SL
152 */
153accinit(unit)
154 int unit;
155{
a2cd4df7
BJ
156 register struct acc_softc *sc;
157 register struct uba_device *ui;
28081cf8 158 register struct accdevice *addr;
521c9128 159 int info, i;
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160
161COUNT(ACCINIT);
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BJ
162 if (unit >= NACC || (ui = accinfo[unit]) == 0 || ui->ui_alive == 0) {
163 printf("acc%d: not alive\n", unit);
164 return (0);
165 }
166 sc = &acc_softc[unit];
167 /*
168 * Header length is 0 since we have to passs
169 * the IMP leader up to the protocol interpretation
170 * routines. If we had the header length as
171 * sizeof(struct imp_leader), then the if_ routines
172 * would asssume we handle it on input and output.
173 */
668cc26d 174 if (if_ubainit(&sc->acc_ifuba, ui->ui_ubanum, 0,
e431883e 175 (int)btoc(IMPMTU)) == 0) {
28081cf8 176 printf("acc%d: can't initialize\n", unit);
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177 ui->ui_alive = 0;
178 return (0);
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179 }
180 addr = (struct accdevice *)ui->ui_addr;
181
a0b7c7fb 182 /*
a2cd4df7
BJ
183 * Reset the imp interface;
184 * the delays are pure guesswork.
a0b7c7fb 185 */
a2cd4df7 186 addr->ocsr = ACC_RESET; DELAY(5000);
8129679e 187 addr->ocsr = OUT_BBACK; DELAY(5000); /* reset host master ready */
a2cd4df7 188 addr->ocsr = 0;
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SL
189 if (accinputreset(addr, unit) == 0) {
190 ui->ui_alive = 0;
191 return (0);
a2cd4df7 192 }
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193
194 /*
195 * Put up a read. We can't restart any outstanding writes
196 * until we're back in synch with the IMP (i.e. we've flushed
197 * the NOOPs it throws at us).
e431883e 198 * Note: IMPMTU includes the leader.
28081cf8 199 */
7dfb87a5 200 acctrace("init", addr->icsr);
28081cf8 201 info = sc->acc_ifuba.ifu_r.ifrw_info;
a2cd4df7 202 addr->iba = (u_short)info;
e431883e 203 addr->iwc = -(IMPMTU >> 1);
a2cd4df7
BJ
204#ifdef LOOPBACK
205 addr->ocsr |= OUT_BBACK;
206#endif
207 addr->icsr =
28081cf8 208 IN_MRDY | ACC_IE | IN_WEN | ((info & 0x30000) >> 12) | ACC_GO;
a2cd4df7 209 return (1);
28081cf8
SL
210}
211
7dfb87a5
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212accinputreset(addr, unit)
213 register struct accdevice *addr;
214 register int unit;
215{
216 register int i;
217
218 addr->icsr = ACC_RESET; DELAY(5000);
219 addr->icsr = IN_MRDY | IN_WEN; /* close the relay */
220 DELAY(10000);
221 /* YECH!!! */
222 for (i = 0; i < 500; i++) {
223 if ((addr->icsr & IN_HRDY) ||
224 (addr->icsr & (IN_RMR | IN_IMPBSY)) == 0)
225 return (1);
226 addr->icsr = IN_MRDY | IN_WEN; DELAY(10000);
227 /* keep turning IN_RMR off */
228 }
229 printf("acc%d: imp doesn't respond, icsr=%b\n", unit,
230 addr->icsr, ACC_INBITS);
231 return (0);
232}
233
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234/*
235 * Start output on an interface.
236 */
237accstart(dev)
238 dev_t dev;
239{
240 int unit = ACCUNIT(dev), info;
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241 register struct acc_softc *sc = &acc_softc[unit];
242 register struct accdevice *addr;
243 struct mbuf *m;
244 u_short cmd;
245
246COUNT(ACCSTART);
7dfb87a5 247 acctrace("start", sc->acc_ic->ic_oactive);
28081cf8
SL
248 if (sc->acc_ic->ic_oactive)
249 goto restart;
250
251 /*
252 * Not already active, deqeue a request and
253 * map it onto the UNIBUS. If no more
254 * requeusts, just return.
255 */
256 IF_DEQUEUE(&sc->acc_if->if_snd, m);
257 if (m == 0) {
7dfb87a5 258 acctrace("q empty", 0);
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SL
259 sc->acc_ic->ic_oactive = 0;
260 return;
261 }
262 sc->acc_olen = if_wubaput(&sc->acc_ifuba, m);
263
264restart:
265 /*
a2cd4df7
BJ
266 * Have request mapped to UNIBUS for
267 * transmission; start the output.
28081cf8 268 */
a2cd4df7
BJ
269 if (sc->acc_ifuba.ifu_flags & UBA_NEEDBDP)
270 UBAPURGE(sc->acc_ifuba.ifu_uba, sc->acc_ifuba.ifu_w.ifrw_bdp);
bcb5db7d 271 addr = (struct accdevice *)accinfo[unit]->ui_addr;
28081cf8 272 info = sc->acc_ifuba.ifu_w.ifrw_info;
a2cd4df7
BJ
273 addr->oba = (u_short)info;
274 addr->owc = -((sc->acc_olen + 1) >> 1);
28081cf8 275 cmd = ACC_IE | OUT_ENLB | ((info & 0x30000) >> 12) | ACC_GO;
a2cd4df7
BJ
276#ifdef LOOPBACK
277 cmd |= OUT_BBACK;
278#endif
279 addr->ocsr = cmd;
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SL
280 sc->acc_ic->ic_oactive = 1;
281}
282
283/*
284 * Output interrupt handler.
285 */
286accxint(unit)
287{
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SL
288 register struct acc_softc *sc = &acc_softc[unit];
289 register struct accdevice *addr;
290
291COUNT(ACCXINT);
7dfb87a5
SL
292 acctrace("xint", sc->acc_ic->ic_oactive);
293 addr = (struct accdevice *)accinfo[unit]->ui_addr;
28081cf8 294 if (sc->acc_ic->ic_oactive == 0) {
7dfb87a5
SL
295 printf("acc%d: stray xmit interrupt, csr=%b\n", unit,
296 addr->ocsr, ACC_OUTBITS);
297 addr->ocsr = ACC_RESET;
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298 return;
299 }
7dfb87a5 300 acctrace("ocsr", addr->ocsr);
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301 sc->acc_if->if_opackets++;
302 sc->acc_ic->ic_oactive = 0;
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SL
303 if (addr->ocsr & (ACC_ERR|OUT_TMR)) {
304 printf("acc%d: output error, ocsr=%b, icsr=%b\n", unit,
305 addr->ocsr, ACC_OUTBITS, addr->icsr, ACC_INBITS);
28081cf8 306 sc->acc_if->if_oerrors++;
a0b7c7fb 307 }
a2cd4df7
BJ
308 if (sc->acc_ifuba.ifu_xtofree) {
309 m_freem(sc->acc_ifuba.ifu_xtofree);
310 sc->acc_ifuba.ifu_xtofree = 0;
28081cf8 311 }
41e530c7
BJ
312 if (sc->acc_if->if_snd.ifq_head)
313 accstart(unit);
28081cf8
SL
314}
315
316/*
317 * Input interrupt handler
318 */
319accrint(unit)
320{
321 register struct acc_softc *sc = &acc_softc[unit];
322 register struct accdevice *addr;
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SL
323 struct mbuf *m;
324 int len, info;
325
326COUNT(ACCRINT);
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327 addr = (struct accdevice *)accinfo[unit]->ui_addr;
328 if ((addr->icsr & ACC_RDY) == 0) {
329 printf("acc%d: stray input interrupt\n", unit);
330 accinputreset(addr, unit);
331 goto setup;
332 }
28081cf8
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333 sc->acc_if->if_ipackets++;
334
335 /*
336 * Purge BDP; flush message if error indicated.
337 */
a2cd4df7
BJ
338 if (sc->acc_ifuba.ifu_flags & UBA_NEEDBDP)
339 UBAPURGE(sc->acc_ifuba.ifu_uba, sc->acc_ifuba.ifu_r.ifrw_bdp);
7dfb87a5
SL
340 acctrace("rint", addr->icsr);
341 if (addr->icsr & (ACC_ERR|IN_RMR)) {
342 printf("acc%d: input error, icsr=%b, ocsr=%b\n", unit,
343 addr->icsr, ACC_INBITS, addr->ocsr, ACC_OUTBITS);
28081cf8 344 sc->acc_if->if_ierrors++;
7dfb87a5
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345 if (addr->icsr & IN_RMR)
346 accinputreset(addr, unit);
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347 sc->acc_flush = 1;
348 }
349
7dfb87a5 350 acctrace("flush", sc->acc_flush);
28081cf8 351 if (sc->acc_flush) {
a2cd4df7 352 if (addr->icsr & IN_EOM)
28081cf8
SL
353 sc->acc_flush = 0;
354 goto setup;
355 }
e431883e 356 len = IMPMTU + (addr->iwc << 1);
7dfb87a5 357 acctrace("length", len);
e431883e 358 if (len < 0 || len > IMPMTU) {
a2cd4df7
BJ
359 printf("acc%d: bad length=%d\n", len);
360 sc->acc_if->if_ierrors++;
361 goto setup;
362 }
28081cf8
SL
363
364 /*
365 * The last parameter is always 0 since using
366 * trailers on the ARPAnet is insane.
367 */
368 m = if_rubaget(&sc->acc_ifuba, len, 0);
369 if (m == 0)
370 goto setup;
a2cd4df7 371 if ((addr->icsr & IN_EOM) == 0) {
a0b7c7fb 372 if (sc->acc_iq)
28081cf8 373 m_cat(sc->acc_iq, m);
a0b7c7fb 374 else
28081cf8 375 sc->acc_iq = m;
28081cf8
SL
376 goto setup;
377 }
a0b7c7fb 378 if (sc->acc_iq) {
28081cf8
SL
379 m_cat(sc->acc_iq, m);
380 m = sc->acc_iq;
381 sc->acc_iq = 0;
28081cf8 382 }
7dfb87a5 383 acctrace("impinput", 0);
28081cf8
SL
384 impinput(unit, m);
385
386setup:
387 /*
388 * Setup for next message.
389 */
390 info = sc->acc_ifuba.ifu_r.ifrw_info;
a2cd4df7 391 addr->iba = (u_short)info;
e431883e 392 addr->iwc = -(IMPMTU >> 1);
a2cd4df7 393 addr->icsr =
28081cf8
SL
394 IN_MRDY | ACC_IE | IN_WEN | ((info & 0x30000) >> 12) | ACC_GO;
395}
7dfb87a5
SL
396
397int accprintf = 0;
398
399acctrace(cmd, value)
400 char *cmd;
401 int value;
402{
403 register int i;
404 register char *p = (char *)&value;
405
406 if (accprintf)
407 printf("%s: %x", cmd, value);
408 do {
409 if (accdebugx >= NACCDEBUG)
410 accdebugx = 0;
411 accdebug[accdebugx++] = *cmd;
412 } while (*cmd++);
413 for (i = 0; i < sizeof (int); i++) {
414 if (accdebugx >= NACCDEBUG)
415 accdebugx = 0;
416 accdebug[accdebugx++] = *p++;
417 }
418}
28081cf8 419#endif