move vax headers into vax directories
[unix-history] / usr / src / sys / vax / if / if_dmc.c
CommitLineData
a9687d27 1/* if_dmc.c 4.19 82/10/10 */
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2
3#include "dmc.h"
4#if NDMC > 0
5#define printd if(dmcdebug)printf
6int dmcdebug = 1;
7/*
8 * DMC11 device driver, internet version
9 *
10 * TODO
11 * allow more than one outstanding read or write.
12 */
13
14#include "../h/param.h"
15#include "../h/systm.h"
16#include "../h/mbuf.h"
17#include "../h/pte.h"
18#include "../h/buf.h"
19#include "../h/tty.h"
20#include "../h/protosw.h"
21#include "../h/socket.h"
63665984 22#include "../h/vmmac.h"
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23#include <errno.h>
24
25#include "../net/if.h"
26#include "../net/route.h"
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27#include "../netinet/in.h"
28#include "../netinet/in_systm.h"
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29
30#include "../vax/cpu.h"
31#include "../vax/mtpr.h"
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32#include "../vaxif/if_uba.h"
33#include "../vaxif/if_dmc.h"
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34#include "../vaxuba/ubareg.h"
35#include "../vaxuba/ubavar.h"
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36
37/*
38 * Driver information for auto-configuration stuff.
39 */
40int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
41struct uba_device *dmcinfo[NDMC];
42u_short dmcstd[] = { 0 };
43struct uba_driver dmcdriver =
44 { dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
45
ee787340 46#define DMC_AF 0xff /* 8 bits of address type in ui_flags */
6187f8f4 47#define DMC_NET 0xffffff00 /* 24 bits of net number in ui_flags */
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48
49/*
50 * DMC software status per interface.
51 *
52 * Each interface is referenced by a network interface structure,
53 * sc_if, which the routing code uses to locate the interface.
54 * This structure contains the output queue for the interface, its address, ...
55 * We also have, for each interface, a UBA interface structure, which
56 * contains information about the UNIBUS resources held by the interface:
57 * map registers, buffered data paths, etc. Information is cached in this
58 * structure for use by the if_uba.c routines in running the interface
59 * efficiently.
60 */
61struct dmc_softc {
62 struct ifnet sc_if; /* network-visible interface */
63 struct ifuba sc_ifuba; /* UNIBUS resources */
64 short sc_flag; /* flags */
65 short sc_oactive; /* output active */
66 int sc_ubinfo; /* UBA mapping info for base table */
67 struct clist sc_que; /* command queue */
68} dmc_softc[NDMC];
69
70/* flags */
71#define DMCRUN 01
72#define DMCBMAPPED 02 /* base table mapped */
73
74struct dmc_base {
75 short d_base[128]; /* DMC base table */
76} dmc_base[NDMC];
77
78#define loword(x) ((short *)&x)[0]
79#define hiword(x) ((short *)&x)[1]
80
81dmcprobe(reg)
82 caddr_t reg;
83{
84 register int br, cvec;
85 register struct dmcdevice *addr = (struct dmcdevice *)reg;
86 register int i;
87
88#ifdef lint
89 br = 0; cvec = br; br = cvec;
90 dmcrint(0); dmcxint(0);
91#endif
92 addr->bsel1 = DMC_MCLR;
93 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
94 ;
95 if ((addr->bsel1 & DMC_RUN) == 0)
ee787340 96 return (0);
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97 addr->bsel1 &= ~DMC_MCLR;
98 addr->bsel0 = DMC_RQI|DMC_IEI;
99 DELAY(100000);
100 addr->bsel1 = DMC_MCLR;
101 for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
102 ;
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103#ifdef ECHACK
104 br = 0x16;
105#endif
ee787340 106 return (1);
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107}
108
109/*
110 * Interface exists: make available by filling in network interface
111 * record. System will initialize the interface when it is ready
112 * to accept packets.
113 */
114dmcattach(ui)
115 register struct uba_device *ui;
116{
117 register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
ee787340 118 register struct sockaddr_in *sin;
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119
120 sc->sc_if.if_unit = ui->ui_unit;
121 sc->sc_if.if_name = "dmc";
122 sc->sc_if.if_mtu = DMCMTU;
123 sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
124 sc->sc_if.if_host[0] = 17; /* random number */
ee787340 125 sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
bfa2d860 126 sin->sin_family = AF_INET;
ee787340 127 sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
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128 sc->sc_if.if_init = dmcinit;
129 sc->sc_if.if_output = dmcoutput;
130 sc->sc_if.if_ubareset = dmcreset;
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131 /* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */
132 sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT;
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133 if_attach(&sc->sc_if);
134}
135
136/*
137 * Reset of interface after UNIBUS reset.
138 * If interface is on specified UBA, reset it's state.
139 */
140dmcreset(unit, uban)
141 int unit, uban;
142{
143 register struct uba_device *ui;
144
145 if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
146 ui->ui_ubanum != uban)
147 return;
148 printf(" dmc%d", unit);
149 dmcinit(unit);
150}
151
152/*
153 * Initialization of interface; reinitialize UNIBUS usage.
154 */
155dmcinit(unit)
156 int unit;
157{
158 register struct dmc_softc *sc = &dmc_softc[unit];
159 register struct uba_device *ui = dmcinfo[unit];
160 register struct dmcdevice *addr;
161 int base;
162
163 printd("dmcinit\n");
164 if ((sc->sc_flag&DMCBMAPPED) == 0) {
165 sc->sc_ubinfo = uballoc(ui->ui_ubanum,
166 (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
167 sc->sc_flag |= DMCBMAPPED;
168 }
169 if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
b3a74b5e 170 (int)btoc(DMCMTU)) == 0) {
63665984 171 printf("dmc%d: can't initialize\n", unit);
ee787340 172 sc->sc_if.if_flags &= ~IFF_UP;
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173 return;
174 }
175 addr = (struct dmcdevice *)ui->ui_addr;
176 addr->bsel2 |= DMC_IEO;
177 base = sc->sc_ubinfo & 0x3ffff;
178 printd(" base 0x%x\n", base);
179 dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
180 dmcload(sc, DMC_CNTLI, 0, 0);
181 base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
182 dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
183 printd(" first read queued, addr 0x%x\n", base);
ee787340 184 sc->sc_if.if_flags |= IFF_UP;
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185 /* set up routing table entry */
186 if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
a13c006d 187 rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr, RTF_HOST|RTF_UP);
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188 sc->sc_if.if_flags |= IFF_ROUTE;
189 }
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190}
191
192/*
193 * Start output on interface. Get another datagram
194 * to send from the interface queue and map it to
195 * the interface before starting output.
196 */
197dmcstart(dev)
198 dev_t dev;
199{
200 int unit = minor(dev);
201 struct uba_device *ui = dmcinfo[unit];
202 register struct dmc_softc *sc = &dmc_softc[unit];
203 int addr, len;
204 struct mbuf *m;
205
206 printd("dmcstart\n");
207 /*
208 * Dequeue a request and map it to the UNIBUS.
209 * If no more requests, just return.
210 */
211 IF_DEQUEUE(&sc->sc_if.if_snd, m);
212 if (m == 0)
213 return;
214 len = if_wubaput(&sc->sc_ifuba, m);
215
216 /*
217 * Have request mapped to UNIBUS for transmission.
218 * Purge any stale data from this BDP and start the output.
219 */
bfa2d860 220 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
791be395 221 UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
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222 addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
223 printd(" len %d, addr 0x%x, ", len, addr);
224 printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
225 dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
226 sc->sc_oactive = 1;
227}
228
229/*
230 * Utility routine to load the DMC device registers.
231 */
232dmcload(sc, type, w0, w1)
233 register struct dmc_softc *sc;
234 int type, w0, w1;
235{
236 register struct dmcdevice *addr;
237 register int unit, sps, n;
238
239 printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
240 unit = sc - dmc_softc;
241 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
242 sps = spl5();
243 if ((n = sc->sc_que.c_cc) == 0)
244 addr->bsel0 = type | DMC_RQI;
245 else
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246 (void) putc(type | DMC_RQI, &sc->sc_que);
247 (void) putw(w0, &sc->sc_que);
248 (void) putw(w1, &sc->sc_que);
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249 if (n == 0)
250 dmcrint(unit);
251 splx(sps);
252}
253
254/*
255 * DMC interface receiver interrupt.
256 * Ready to accept another command,
257 * pull one off the command queue.
258 */
259dmcrint(unit)
260 int unit;
261{
262 register struct dmc_softc *sc;
263 register struct dmcdevice *addr;
264 register int n;
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265
266 addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
267 sc = &dmc_softc[unit];
268 while (addr->bsel0&DMC_RDYI) {
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269 addr->sel4 = getw(&sc->sc_que);
270 addr->sel6 = getw(&sc->sc_que);
63665984 271 addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
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272 while (addr->bsel0&DMC_RDYI)
273 ;
274 if (sc->sc_que.c_cc == 0)
275 return;
276 addr->bsel0 = getc(&sc->sc_que);
277 n = RDYSCAN;
278 while (n-- && (addr->bsel0&DMC_RDYI) == 0)
279 ;
280 }
281 if (sc->sc_que.c_cc)
282 addr->bsel0 |= DMC_IEI;
283}
284
285/*
286 * DMC interface transmitter interrupt.
287 * A transfer has completed, check for errors.
288 * If it was a read, notify appropriate protocol.
289 * If it was a write, pull the next one off the queue.
290 */
291dmcxint(unit)
292 int unit;
293{
294 register struct dmc_softc *sc;
295 struct uba_device *ui = dmcinfo[unit];
296 struct dmcdevice *addr;
297 struct mbuf *m;
298 register struct ifqueue *inq;
299 int arg, cmd, len;
300
301 addr = (struct dmcdevice *)ui->ui_addr;
302 arg = addr->sel6;
303 cmd = addr->bsel2&7;
304 addr->bsel2 &= ~DMC_RDYO;
305 sc = &dmc_softc[unit];
306 printd("dmcxint\n");
307 switch (cmd) {
308
309 case DMC_OUR:
310 /*
311 * A read has completed. Purge input buffered
312 * data path. Pass packet to type specific
313 * higher-level input routine.
314 */
315 sc->sc_if.if_ipackets++;
bfa2d860 316 if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
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317 UBAPURGE(sc->sc_ifuba.ifu_uba,
318 sc->sc_ifuba.ifu_r.ifrw_bdp);
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319 len = arg & DMC_CCOUNT;
320 printd(" read done, len %d\n", len);
ee787340 321 switch (ui->ui_flags & DMC_AF) {
63665984 322#ifdef INET
ee787340 323 case AF_INET:
9c8692e9 324 schednetisr(NETISR_IP);
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325 inq = &ipintrq;
326 break;
327#endif
328
329 default:
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SL
330 printf("dmc%d: unknown address type %d\n", unit,
331 ui->ui_flags & DMC_AF);
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332 goto setup;
333 }
334 m = if_rubaget(&sc->sc_ifuba, len, 0);
335 if (m == 0)
336 goto setup;
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337 if (IF_QFULL(inq)) {
338 IF_DROP(inq);
339 (void) m_freem(m);
340 } else
341 IF_ENQUEUE(inq, m);
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342
343setup:
344 arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
345 dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
346 return;
347
348 case DMC_OUX:
349 /*
350 * A write has completed, start another
351 * transfer if there is more data to send.
352 */
353 if (sc->sc_oactive == 0)
354 return; /* SHOULD IT BE A FATAL ERROR? */
355 printd(" write done\n");
356 sc->sc_if.if_opackets++;
357 sc->sc_oactive = 0;
358 if (sc->sc_ifuba.ifu_xtofree) {
1e977657 359 (void) m_freem(sc->sc_ifuba.ifu_xtofree);
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360 sc->sc_ifuba.ifu_xtofree = 0;
361 }
362 if (sc->sc_if.if_snd.ifq_head == 0)
363 return;
364 dmcstart(unit);
365 return;
366
367 case DMC_CNTLO:
368 arg &= DMC_CNTMASK;
369 if (arg&DMC_FATAL) {
370 addr->bsel1 = DMC_MCLR;
371 sc->sc_flag &= ~DMCRUN;
372 /*** DO SOMETHING TO RESTART DEVICE ***/
373 printf("DMC FATAL ERROR 0%o\n", arg);
374 } else {
375 /* ACCUMULATE STATISTICS */
376 printf("DMC SOFT ERROR 0%o\n", arg);
377 }
378 return;
379
380 default:
381 printf("dmc%d: bad control %o\n", unit, cmd);
382 }
383}
384
385/*
386 * DMC output routine.
387 * Just send the data, header was supplied by
388 * upper level protocol routines.
389 */
ee787340 390dmcoutput(ifp, m, dst)
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391 register struct ifnet *ifp;
392 register struct mbuf *m;
ee787340 393 struct sockaddr *dst;
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394{
395 struct uba_device *ui = dmcinfo[ifp->if_unit];
396 int s;
397
398 printd("dmcoutput\n");
ee787340
SL
399 if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
400 printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
401 m_freem(m);
8a2f82db 402 return (EAFNOSUPPORT);
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403 }
404 s = splimp();
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405 if (IF_QFULL(&ifp->if_snd)) {
406 IF_DROP(&ifp->if_snd);
ee787340 407 m_freem(m);
1e977657 408 splx(s);
8a2f82db 409 return (ENOBUFS);
1e977657 410 }
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411 IF_ENQUEUE(&ifp->if_snd, m);
412 if (dmc_softc[ifp->if_unit].sc_oactive == 0)
413 dmcstart(ifp->if_unit);
414 splx(s);
8a2f82db 415 return (0);
63665984 416}