[unix-history] / usr / src / sys / vax / if / if_dmc.c

/*	if_dmc.c	4.14	82/04/24	*/

#include "dmc.h"
#if NDMC > 0
#define printd if(dmcdebug)printf
int dmcdebug = 1;
/*
 * DMC11 device driver, internet version
 *
 * TODO
 *	allow more than one outstanding read or write.
 */

#include "../h/param.h"
#include "../h/systm.h"
#include "../h/mbuf.h"
#include "../h/pte.h"
#include "../h/buf.h"
#include "../h/tty.h"
#include "../h/protosw.h"
#include "../h/socket.h"
#include "../h/ubareg.h"
#include "../h/ubavar.h"
#include "../h/cpu.h"
#include "../h/mtpr.h"
#include "../h/vmmac.h"
#include "../net/in.h"
#include "../net/in_systm.h"
#include "../net/if.h"
#include "../net/if_uba.h"
#include "../net/if_dmc.h"
#include "../net/ip.h"
#include "../net/ip_var.h"
#include "../net/route.h"
#include <errno.h>

/*
 * Driver information for auto-configuration stuff.
 */
int	dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
struct	uba_device *dmcinfo[NDMC];
u_short	dmcstd[] = { 0 };
struct	uba_driver dmcdriver =
	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };

#define	DMC_AF	0xff		/* 8 bits of address type in ui_flags */
#define	DMC_NET	0xff00		/* 8 bits of net number in ui_flags */

/*
 * DMC software status per interface.
 *
 * Each interface is referenced by a network interface structure,
 * sc_if, which the routing code uses to locate the interface.
 * This structure contains the output queue for the interface, its address, ...
 * We also have, for each interface, a UBA interface structure, which
 * contains information about the UNIBUS resources held by the interface:
 * map registers, buffered data paths, etc.  Information is cached in this
 * structure for use by the if_uba.c routines in running the interface
 * efficiently.
 */
struct dmc_softc {
	struct	ifnet sc_if;		/* network-visible interface */
	struct	ifuba sc_ifuba;		/* UNIBUS resources */
	short	sc_flag;		/* flags */
	short	sc_oactive;		/* output active */
	int	sc_ubinfo;		/* UBA mapping info for base table */
	struct clist sc_que;		/* command queue */
} dmc_softc[NDMC];

/* flags */
#define	DMCRUN		01
#define	DMCBMAPPED	02		/* base table mapped */

struct dmc_base {
	short	d_base[128];		/* DMC base table */
} dmc_base[NDMC];

#define	loword(x)	((short *)&x)[0]
#define	hiword(x)	((short *)&x)[1]

dmcprobe(reg)
	caddr_t reg;
{
	register int br, cvec;
	register struct dmcdevice *addr = (struct dmcdevice *)reg;
	register int i;

COUNT(DMCPROBE);
#ifdef lint
	br = 0; cvec = br; br = cvec;
	dmcrint(0); dmcxint(0);
#endif
	addr->bsel1 = DMC_MCLR;
	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
		;
	if ((addr->bsel1 & DMC_RUN) == 0)
		return (0);
	addr->bsel1 &= ~DMC_MCLR;
	addr->bsel0 = DMC_RQI|DMC_IEI;
	DELAY(100000);
	addr->bsel1 = DMC_MCLR;
	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
		;
#ifdef ECHACK
	br = 0x16;
#endif
	return (1);
}

/*
 * Interface exists: make available by filling in network interface
 * record.  System will initialize the interface when it is ready
 * to accept packets.
 */
dmcattach(ui)
	register struct uba_device *ui;
{
	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
	register struct sockaddr_in *sin;

COUNT(DMCATTACH);
	sc->sc_if.if_unit = ui->ui_unit;
	sc->sc_if.if_name = "dmc";
	sc->sc_if.if_mtu = DMCMTU;
	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
	sc->sc_if.if_host[0] = 17;	/* random number */
	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
	sin->sin_family = AF_INET;
	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
	sc->sc_if.if_init = dmcinit;
	sc->sc_if.if_output = dmcoutput;
	sc->sc_if.if_ubareset = dmcreset;
	/* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */
	sc->sc_ifuba.ifu_flags = UBA_NEEDBDP | UBA_CANTWAIT;
	if_attach(&sc->sc_if);
}

/*
 * Reset of interface after UNIBUS reset.
 * If interface is on specified UBA, reset it's state.
 */
dmcreset(unit, uban)
	int unit, uban;
{
	register struct uba_device *ui;

COUNT(DMCRESET);
	if (unit >= NDMC || (ui = dmcinfo[unit]) == 0 || ui->ui_alive == 0 ||
	    ui->ui_ubanum != uban)
		return;
	printf(" dmc%d", unit);
	dmcinit(unit);
}

/*
 * Initialization of interface; reinitialize UNIBUS usage.
 */
dmcinit(unit)
	int unit;
{
	register struct dmc_softc *sc = &dmc_softc[unit];
	register struct uba_device *ui = dmcinfo[unit];
	register struct dmcdevice *addr;
	int base;

COUNT(DMCINIT);
	printd("dmcinit\n");
	if ((sc->sc_flag&DMCBMAPPED) == 0) {
		sc->sc_ubinfo = uballoc(ui->ui_ubanum,
		    (caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
		sc->sc_flag |= DMCBMAPPED;
	}
	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
	    (int)btoc(DMCMTU)) == 0) {
		printf("dmc%d: can't initialize\n", unit);
		sc->sc_if.if_flags &= ~IFF_UP;
		return;
	}
	addr = (struct dmcdevice *)ui->ui_addr;
	addr->bsel2 |= DMC_IEO;
	base = sc->sc_ubinfo & 0x3ffff;
	printd("  base 0x%x\n", base);
	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
	dmcload(sc, DMC_CNTLI, 0, 0);
	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)|DMCMTU);
	printd("  first read queued, addr 0x%x\n", base);
	sc->sc_if.if_flags |= IFF_UP;
	/* set up routing table entry */
	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
		rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
			RTF_DIRECT|RTF_HOST|RTF_UP);
		sc->sc_if.if_flags |= IFF_ROUTE;
	}
}

/*
 * Start output on interface.  Get another datagram
 * to send from the interface queue and map it to
 * the interface before starting output.
 */
dmcstart(dev)
	dev_t dev;
{
	int unit = minor(dev);
	struct uba_device *ui = dmcinfo[unit];
	register struct dmc_softc *sc = &dmc_softc[unit];
	int addr, len;
	struct mbuf *m;

COUNT(DMCSTART);
	printd("dmcstart\n");
	/*
	 * Dequeue a request and map it to the UNIBUS.
	 * If no more requests, just return.
	 */
	IF_DEQUEUE(&sc->sc_if.if_snd, m);
	if (m == 0)
		return;
	len = if_wubaput(&sc->sc_ifuba, m);

	/*
	 * Have request mapped to UNIBUS for transmission.
	 * Purge any stale data from this BDP and start the output.
	 */
	if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
		UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
	printd("  len %d, addr 0x%x, ", len, addr);
	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)|((addr>>2)&DMC_XMEM));
	sc->sc_oactive = 1;
}

/*
 * Utility routine to load the DMC device registers.
 */
dmcload(sc, type, w0, w1)
	register struct dmc_softc *sc;
	int type, w0, w1;
{
	register struct dmcdevice *addr;
	register int unit, sps, n;

COUNT(DMCLOAD);
	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
	unit = sc - dmc_softc;
	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	sps = spl5();
	if ((n = sc->sc_que.c_cc) == 0)
		addr->bsel0 = type | DMC_RQI;
	else
		(void) putc(type | DMC_RQI, &sc->sc_que);
	(void) putw(w0, &sc->sc_que);
	(void) putw(w1, &sc->sc_que);
	if (n == 0)
		dmcrint(unit);
	splx(sps);
}

/*
 * DMC interface receiver interrupt.
 * Ready to accept another command,
 * pull one off the command queue.
 */
dmcrint(unit)
	int unit;
{
	register struct dmc_softc *sc;
	register struct dmcdevice *addr;
	register int n;

COUNT(DMCRINT);
	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	sc = &dmc_softc[unit];
	while (addr->bsel0&DMC_RDYI) {
		addr->sel4 = getw(&sc->sc_que);
		addr->sel6 = getw(&sc->sc_que);
		addr->bsel0 &= ~(DMC_IEI|DMC_RQI);
		while (addr->bsel0&DMC_RDYI)
			;
		if (sc->sc_que.c_cc == 0)
			return;
		addr->bsel0 = getc(&sc->sc_que);
		n = RDYSCAN;
		while (n-- && (addr->bsel0&DMC_RDYI) == 0)
			;
	}
	if (sc->sc_que.c_cc)
		addr->bsel0 |= DMC_IEI;
}

/*
 * DMC interface transmitter interrupt.
 * A transfer has completed, check for errors.
 * If it was a read, notify appropriate protocol.
 * If it was a write, pull the next one off the queue.
 */
dmcxint(unit)
	int unit;
{
	register struct dmc_softc *sc;
	struct uba_device *ui = dmcinfo[unit];
	struct dmcdevice *addr;
	struct mbuf *m;
	register struct ifqueue *inq;
	int arg, cmd, len;

COUNT(DMCXINT);
	addr = (struct dmcdevice *)ui->ui_addr;
	arg = addr->sel6;
	cmd = addr->bsel2&7;
	addr->bsel2 &= ~DMC_RDYO;
	sc = &dmc_softc[unit];
	printd("dmcxint\n");
	switch (cmd) {

	case DMC_OUR:
		/*
		 * A read has completed.  Purge input buffered
		 * data path.  Pass packet to type specific
		 * higher-level input routine.
		 */
		sc->sc_if.if_ipackets++;
		if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
			UBAPURGE(sc->sc_ifuba.ifu_uba,
				sc->sc_ifuba.ifu_r.ifrw_bdp);
		len = arg & DMC_CCOUNT;
		printd("  read done, len %d\n", len);
		switch (ui->ui_flags & DMC_AF) {
#ifdef INET
		case AF_INET:
			schednetisr(NETISR_IP);
			inq = &ipintrq;
			break;
#endif

		default:
			printf("dmc%d: unknown address type %d\n", unit,
			    ui->ui_flags & DMC_AF);
			goto setup;
		}
		m = if_rubaget(&sc->sc_ifuba, len, 0);
		if (m == 0)
			goto setup;
		if (IF_QFULL(inq)) {
			IF_DROP(inq);
			(void) m_freem(m);
		} else
			IF_ENQUEUE(inq, m);

setup:
		arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
		dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) | DMCMTU);
		return;

	case DMC_OUX:
		/*
		 * A write has completed, start another
		 * transfer if there is more data to send.
		 */
		if (sc->sc_oactive == 0)
			return;		/* SHOULD IT BE A FATAL ERROR? */
		printd("  write done\n");
		sc->sc_if.if_opackets++;
		sc->sc_oactive = 0;
		if (sc->sc_ifuba.ifu_xtofree) {
			(void) m_freem(sc->sc_ifuba.ifu_xtofree);
			sc->sc_ifuba.ifu_xtofree = 0;
		}
		if (sc->sc_if.if_snd.ifq_head == 0)
			return;
		dmcstart(unit);
		return;

	case DMC_CNTLO:
		arg &= DMC_CNTMASK;
		if (arg&DMC_FATAL) {
			addr->bsel1 = DMC_MCLR;
			sc->sc_flag &= ~DMCRUN;
			/*** DO SOMETHING TO RESTART DEVICE ***/
			printf("DMC FATAL ERROR 0%o\n", arg);
		} else {
			/* ACCUMULATE STATISTICS */
			printf("DMC SOFT ERROR 0%o\n", arg);
		}
		return;

	default:
		printf("dmc%d: bad control %o\n", unit, cmd);
	}
}

/*
 * DMC output routine.
 * Just send the data, header was supplied by
 * upper level protocol routines.
 */
dmcoutput(ifp, m, dst)
	register struct ifnet *ifp;
	register struct mbuf *m;
	struct sockaddr *dst;
{
	struct uba_device *ui = dmcinfo[ifp->if_unit];
	int s;

COUNT(DMCOUTPUT);
	printd("dmcoutput\n");
	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
		printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
		m_freem(m);
		return (EAFNOSUPPORT);
	}
	s = splimp();
	if (IF_QFULL(&ifp->if_snd)) {
		IF_DROP(&ifp->if_snd);
		m_freem(m);
		splx(s);
		return (ENOBUFS);
	}
	IF_ENQUEUE(&ifp->if_snd, m);
	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
		dmcstart(ifp->if_unit);
	splx(s);
	return (0);
}
Commit	Line	Data
bfa2d860	1	/* if_dmc.c 4.14 82/04/24 */
63665984 BJ	2
	3	#include "dmc.h"
	4	#if NDMC > 0
	5	#define printd if(dmcdebug)printf
	6	int dmcdebug = 1;
	7	/*
	8	* DMC11 device driver, internet version
	9	*
	10	* TODO
	11	* allow more than one outstanding read or write.
	12	*/
	13
	14	#include "../h/param.h"
	15	#include "../h/systm.h"
	16	#include "../h/mbuf.h"
	17	#include "../h/pte.h"
	18	#include "../h/buf.h"
	19	#include "../h/tty.h"
	20	#include "../h/protosw.h"
	21	#include "../h/socket.h"
	22	#include "../h/ubareg.h"
	23	#include "../h/ubavar.h"
	24	#include "../h/cpu.h"
	25	#include "../h/mtpr.h"
	26	#include "../h/vmmac.h"
	27	#include "../net/in.h"
	28	#include "../net/in_systm.h"
	29	#include "../net/if.h"
	30	#include "../net/if_uba.h"
791be395	31	#include "../net/if_dmc.h"
63665984 BJ	32	#include "../net/ip.h"
63665984 BJ	33	#include "../net/ip_var.h"
f6311fb6	34	#include "../net/route.h"
8a2f82db	35	#include <errno.h>
63665984 BJ	36
	37	/*
	38	* Driver information for auto-configuration stuff.
	39	*/
	40	int dmcprobe(), dmcattach(), dmcinit(), dmcoutput(), dmcreset();
	41	struct uba_device *dmcinfo[NDMC];
	42	u_short dmcstd[] = { 0 };
	43	struct uba_driver dmcdriver =
	44	{ dmcprobe, 0, dmcattach, 0, dmcstd, "dmc", dmcinfo };
	45
ee787340	46	#define DMC_AF 0xff /* 8 bits of address type in ui_flags */
63665984 BJ	47	#define DMC_NET 0xff00 /* 8 bits of net number in ui_flags */
	48
	49	/*
	50	* DMC software status per interface.
	51	*
	52	* Each interface is referenced by a network interface structure,
	53	* sc_if, which the routing code uses to locate the interface.
	54	* This structure contains the output queue for the interface, its address, ...
	55	* We also have, for each interface, a UBA interface structure, which
	56	* contains information about the UNIBUS resources held by the interface:
	57	* map registers, buffered data paths, etc. Information is cached in this
	58	* structure for use by the if_uba.c routines in running the interface
	59	* efficiently.
	60	*/
	61	struct dmc_softc {
	62	struct ifnet sc_if; /* network-visible interface */
	63	struct ifuba sc_ifuba; /* UNIBUS resources */
	64	short sc_flag; /* flags */
	65	short sc_oactive; /* output active */
	66	int sc_ubinfo; /* UBA mapping info for base table */
	67	struct clist sc_que; /* command queue */
	68	} dmc_softc[NDMC];
	69
	70	/* flags */
	71	#define DMCRUN 01
	72	#define DMCBMAPPED 02 /* base table mapped */
	73
	74	struct dmc_base {
	75	short d_base[128]; /* DMC base table */
	76	} dmc_base[NDMC];
	77
	78	#define loword(x) ((short *)&x)[0]
	79	#define hiword(x) ((short *)&x)[1]
	80
	81	dmcprobe(reg)
	82	caddr_t reg;
	83	{
	84	register int br, cvec;
	85	register struct dmcdevice addr = (struct dmcdevice )reg;
	86	register int i;
	87
f6311fb6	88	COUNT(DMCPROBE);
63665984 BJ	89	#ifdef lint
	90	br = 0; cvec = br; br = cvec;
	91	dmcrint(0); dmcxint(0);
	92	#endif
	93	addr->bsel1 = DMC_MCLR;
	94	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
	95	;
	96	if ((addr->bsel1 & DMC_RUN) == 0)
ee787340	97	return (0);
63665984 BJ	98	addr->bsel1 &= ~DMC_MCLR;
	99	addr->bsel0 = DMC_RQI\|DMC_IEI;
	100	DELAY(100000);
	101	addr->bsel1 = DMC_MCLR;
	102	for (i = 100000; i && (addr->bsel1 & DMC_RUN) == 0; i--)
	103	;
7d6f1cd5 SL	104	#ifdef ECHACK
	105	br = 0x16;
	106	#endif
ee787340	107	return (1);
63665984 BJ	108	}
	109
	110	/*
	111	* Interface exists: make available by filling in network interface
	112	* record. System will initialize the interface when it is ready
	113	* to accept packets.
	114	*/
	115	dmcattach(ui)
	116	register struct uba_device *ui;
	117	{
	118	register struct dmc_softc *sc = &dmc_softc[ui->ui_unit];
ee787340	119	register struct sockaddr_in *sin;
63665984	120
f6311fb6	121	COUNT(DMCATTACH);
63665984 BJ	122	sc->sc_if.if_unit = ui->ui_unit;
	123	sc->sc_if.if_name = "dmc";
	124	sc->sc_if.if_mtu = DMCMTU;
	125	sc->sc_if.if_net = (ui->ui_flags & DMC_NET) >> 8;
	126	sc->sc_if.if_host[0] = 17; /* random number */
ee787340	127	sin = (struct sockaddr_in *)&sc->sc_if.if_addr;
bfa2d860	128	sin->sin_family = AF_INET;
ee787340	129	sin->sin_addr = if_makeaddr(sc->sc_if.if_net, sc->sc_if.if_host[0]);
63665984 BJ	130	sc->sc_if.if_init = dmcinit;
	131	sc->sc_if.if_output = dmcoutput;
	132	sc->sc_if.if_ubareset = dmcreset;
bfa2d860 SL	133	/* DON'T KNOW IF THIS WILL WORK WITH A BDP AT HIGH SPEEDS */
bfa2d860 SL	134	sc->sc_ifuba.ifu_flags = UBA_NEEDBDP \| UBA_CANTWAIT;
63665984 BJ	135	if_attach(&sc->sc_if);
	136	}
	137
	138	/*
	139	* Reset of interface after UNIBUS reset.
	140	* If interface is on specified UBA, reset it's state.
	141	*/
	142	dmcreset(unit, uban)
	143	int unit, uban;
	144	{
	145	register struct uba_device *ui;
	146
f6311fb6	147	COUNT(DMCRESET);
63665984 BJ	148	if (unit >= NDMC \|\| (ui = dmcinfo[unit]) == 0 \|\| ui->ui_alive == 0 \|\|
	149	ui->ui_ubanum != uban)
	150	return;
	151	printf(" dmc%d", unit);
	152	dmcinit(unit);
	153	}
	154
	155	/*
	156	* Initialization of interface; reinitialize UNIBUS usage.
	157	*/
	158	dmcinit(unit)
	159	int unit;
	160	{
	161	register struct dmc_softc *sc = &dmc_softc[unit];
	162	register struct uba_device *ui = dmcinfo[unit];
	163	register struct dmcdevice *addr;
	164	int base;
	165
f6311fb6	166	COUNT(DMCINIT);
63665984 BJ	167	printd("dmcinit\n");
	168	if ((sc->sc_flag&DMCBMAPPED) == 0) {
	169	sc->sc_ubinfo = uballoc(ui->ui_ubanum,
	170	(caddr_t)&dmc_base[unit], sizeof (struct dmc_base), 0);
	171	sc->sc_flag \|= DMCBMAPPED;
	172	}
	173	if (if_ubainit(&sc->sc_ifuba, ui->ui_ubanum, 0,
b3a74b5e	174	(int)btoc(DMCMTU)) == 0) {
63665984	175	printf("dmc%d: can't initialize\n", unit);
ee787340	176	sc->sc_if.if_flags &= ~IFF_UP;
63665984 BJ	177	return;
	178	}
	179	addr = (struct dmcdevice *)ui->ui_addr;
	180	addr->bsel2 \|= DMC_IEO;
	181	base = sc->sc_ubinfo & 0x3ffff;
	182	printd(" base 0x%x\n", base);
	183	dmcload(sc, DMC_BASEI, base, (base>>2)&DMC_XMEM);
	184	dmcload(sc, DMC_CNTLI, 0, 0);
	185	base = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	186	dmcload(sc, DMC_READ, base, ((base>>2)&DMC_XMEM)\|DMCMTU);
	187	printd(" first read queued, addr 0x%x\n", base);
ee787340	188	sc->sc_if.if_flags \|= IFF_UP;
f6311fb6 SL	189	/* set up routing table entry */
	190	if ((sc->sc_if.if_flags & IFF_ROUTE) == 0) {
	191	rtinit(&sc->sc_if.if_addr, &sc->sc_if.if_addr,
fc74f0c9	192	RTF_DIRECT\|RTF_HOST\|RTF_UP);
f6311fb6 SL	193	sc->sc_if.if_flags \|= IFF_ROUTE;
f6311fb6 SL	194	}
63665984 BJ	195	}
	196
	197	/*
	198	* Start output on interface. Get another datagram
	199	* to send from the interface queue and map it to
	200	* the interface before starting output.
	201	*/
	202	dmcstart(dev)
	203	dev_t dev;
	204	{
	205	int unit = minor(dev);
	206	struct uba_device *ui = dmcinfo[unit];
	207	register struct dmc_softc *sc = &dmc_softc[unit];
	208	int addr, len;
	209	struct mbuf *m;
	210
f6311fb6	211	COUNT(DMCSTART);
63665984 BJ	212	printd("dmcstart\n");
	213	/*
	214	* Dequeue a request and map it to the UNIBUS.
	215	* If no more requests, just return.
	216	*/
	217	IF_DEQUEUE(&sc->sc_if.if_snd, m);
	218	if (m == 0)
	219	return;
	220	len = if_wubaput(&sc->sc_ifuba, m);
	221
	222	/*
	223	* Have request mapped to UNIBUS for transmission.
	224	* Purge any stale data from this BDP and start the output.
	225	*/
bfa2d860	226	if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
791be395	227	UBAPURGE(sc->sc_ifuba.ifu_uba, sc->sc_ifuba.ifu_w.ifrw_bdp);
63665984 BJ	228	addr = sc->sc_ifuba.ifu_w.ifrw_info & 0x3ffff;
	229	printd(" len %d, addr 0x%x, ", len, addr);
	230	printd("mr 0x%x\n", sc->sc_ifuba.ifu_w.ifrw_mr[0]);
	231	dmcload(sc, DMC_WRITE, addr, (len&DMC_CCOUNT)\|((addr>>2)&DMC_XMEM));
	232	sc->sc_oactive = 1;
	233	}
	234
	235	/*
	236	* Utility routine to load the DMC device registers.
	237	*/
	238	dmcload(sc, type, w0, w1)
	239	register struct dmc_softc *sc;
	240	int type, w0, w1;
	241	{
	242	register struct dmcdevice *addr;
	243	register int unit, sps, n;
	244
f6311fb6	245	COUNT(DMCLOAD);
63665984 BJ	246	printd("dmcload: 0x%x 0x%x 0x%x\n", type, w0, w1);
	247	unit = sc - dmc_softc;
	248	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	249	sps = spl5();
	250	if ((n = sc->sc_que.c_cc) == 0)
	251	addr->bsel0 = type \| DMC_RQI;
	252	else
668cc26d SL	253	(void) putc(type \| DMC_RQI, &sc->sc_que);
	254	(void) putw(w0, &sc->sc_que);
	255	(void) putw(w1, &sc->sc_que);
63665984 BJ	256	if (n == 0)
	257	dmcrint(unit);
	258	splx(sps);
	259	}
	260
	261	/*
	262	* DMC interface receiver interrupt.
	263	* Ready to accept another command,
	264	* pull one off the command queue.
	265	*/
	266	dmcrint(unit)
	267	int unit;
	268	{
	269	register struct dmc_softc *sc;
	270	register struct dmcdevice *addr;
	271	register int n;
63665984	272
f6311fb6	273	COUNT(DMCRINT);
63665984 BJ	274	addr = (struct dmcdevice *)dmcinfo[unit]->ui_addr;
	275	sc = &dmc_softc[unit];
	276	while (addr->bsel0&DMC_RDYI) {
63665984 BJ	277	addr->sel4 = getw(&sc->sc_que);
63665984 BJ	278	addr->sel6 = getw(&sc->sc_que);
63665984	279	addr->bsel0 &= ~(DMC_IEI\|DMC_RQI);
63665984 BJ	280	while (addr->bsel0&DMC_RDYI)
	281	;
	282	if (sc->sc_que.c_cc == 0)
	283	return;
	284	addr->bsel0 = getc(&sc->sc_que);
	285	n = RDYSCAN;
	286	while (n-- && (addr->bsel0&DMC_RDYI) == 0)
	287	;
	288	}
	289	if (sc->sc_que.c_cc)
	290	addr->bsel0 \|= DMC_IEI;
	291	}
	292
	293	/*
	294	* DMC interface transmitter interrupt.
	295	* A transfer has completed, check for errors.
	296	* If it was a read, notify appropriate protocol.
	297	* If it was a write, pull the next one off the queue.
	298	*/
	299	dmcxint(unit)
	300	int unit;
	301	{
	302	register struct dmc_softc *sc;
	303	struct uba_device *ui = dmcinfo[unit];
	304	struct dmcdevice *addr;
	305	struct mbuf *m;
	306	register struct ifqueue *inq;
	307	int arg, cmd, len;
	308
f6311fb6	309	COUNT(DMCXINT);
63665984 BJ	310	addr = (struct dmcdevice *)ui->ui_addr;
	311	arg = addr->sel6;
	312	cmd = addr->bsel2&7;
	313	addr->bsel2 &= ~DMC_RDYO;
	314	sc = &dmc_softc[unit];
	315	printd("dmcxint\n");
	316	switch (cmd) {
	317
	318	case DMC_OUR:
	319	/*
	320	* A read has completed. Purge input buffered
	321	* data path. Pass packet to type specific
	322	* higher-level input routine.
	323	*/
	324	sc->sc_if.if_ipackets++;
bfa2d860	325	if (sc->sc_ifuba.ifu_flags & UBA_NEEDBDP)
791be395 BJ	326	UBAPURGE(sc->sc_ifuba.ifu_uba,
791be395 BJ	327	sc->sc_ifuba.ifu_r.ifrw_bdp);
63665984 BJ	328	len = arg & DMC_CCOUNT;
63665984 BJ	329	printd(" read done, len %d\n", len);
ee787340	330	switch (ui->ui_flags & DMC_AF) {
63665984	331	#ifdef INET
ee787340	332	case AF_INET:
9c8692e9	333	schednetisr(NETISR_IP);
63665984 BJ	334	inq = &ipintrq;
	335	break;
	336	#endif
	337
	338	default:
ee787340 SL	339	printf("dmc%d: unknown address type %d\n", unit,
ee787340 SL	340	ui->ui_flags & DMC_AF);
63665984 BJ	341	goto setup;
	342	}
	343	m = if_rubaget(&sc->sc_ifuba, len, 0);
	344	if (m == 0)
	345	goto setup;
1e977657 BJ	346	if (IF_QFULL(inq)) {
	347	IF_DROP(inq);
	348	(void) m_freem(m);
	349	} else
	350	IF_ENQUEUE(inq, m);
63665984 BJ	351
	352	setup:
	353	arg = sc->sc_ifuba.ifu_r.ifrw_info & 0x3ffff;
	354	dmcload(sc, DMC_READ, arg, ((arg >> 2) & DMC_XMEM) \| DMCMTU);
	355	return;
	356
	357	case DMC_OUX:
	358	/*
	359	* A write has completed, start another
	360	* transfer if there is more data to send.
	361	*/
	362	if (sc->sc_oactive == 0)
	363	return; /* SHOULD IT BE A FATAL ERROR? */
	364	printd(" write done\n");
	365	sc->sc_if.if_opackets++;
	366	sc->sc_oactive = 0;
	367	if (sc->sc_ifuba.ifu_xtofree) {
1e977657	368	(void) m_freem(sc->sc_ifuba.ifu_xtofree);
63665984 BJ	369	sc->sc_ifuba.ifu_xtofree = 0;
	370	}
	371	if (sc->sc_if.if_snd.ifq_head == 0)
	372	return;
	373	dmcstart(unit);
	374	return;
	375
	376	case DMC_CNTLO:
	377	arg &= DMC_CNTMASK;
	378	if (arg&DMC_FATAL) {
	379	addr->bsel1 = DMC_MCLR;
	380	sc->sc_flag &= ~DMCRUN;
	381	/* DO SOMETHING TO RESTART DEVICE */
	382	printf("DMC FATAL ERROR 0%o\n", arg);
	383	} else {
	384	/* ACCUMULATE STATISTICS */
	385	printf("DMC SOFT ERROR 0%o\n", arg);
	386	}
	387	return;
	388
	389	default:
	390	printf("dmc%d: bad control %o\n", unit, cmd);
	391	}
	392	}
	393
	394	/*
	395	* DMC output routine.
	396	* Just send the data, header was supplied by
	397	* upper level protocol routines.
	398	*/
ee787340	399	dmcoutput(ifp, m, dst)
63665984 BJ	400	register struct ifnet *ifp;
63665984 BJ	401	register struct mbuf *m;
ee787340	402	struct sockaddr *dst;
63665984 BJ	403	{
	404	struct uba_device *ui = dmcinfo[ifp->if_unit];
	405	int s;
	406
f6311fb6	407	COUNT(DMCOUTPUT);
63665984	408	printd("dmcoutput\n");
ee787340 SL	409	if (dst->sa_family != (ui->ui_flags & DMC_AF)) {
	410	printf("dmc%d: af%d not supported\n", ifp->if_unit, pf);
	411	m_freem(m);
8a2f82db	412	return (EAFNOSUPPORT);
63665984 BJ	413	}
63665984 BJ	414	s = splimp();
1e977657 BJ	415	if (IF_QFULL(&ifp->if_snd)) {
1e977657 BJ	416	IF_DROP(&ifp->if_snd);
ee787340	417	m_freem(m);
1e977657	418	splx(s);
8a2f82db	419	return (ENOBUFS);
1e977657	420	}
63665984 BJ	421	IF_ENQUEUE(&ifp->if_snd, m);
	422	if (dmc_softc[ifp->if_unit].sc_oactive == 0)
	423	dmcstart(ifp->if_unit);
	424	splx(s);
8a2f82db	425	return (0);
63665984	426	}